Commit graph

5 commits

Author SHA1 Message Date
Joseph Lo 25a0644265 soc/tegra: Add Tegra186 support
The Tegra186 features a combination of Denver and Cortex-A57 CPU cores
and a GPU based on the Pascal architecture. It contains an ADSP with a
Cortex-A9 CPU used for audio processing, hardware video encoders and
decoders with multi-format support, ISP for image capture processing
and BPMP for power management.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-11-15 15:50:50 +01:00
Masahiro Yamada 955d809bde ARM: tegra: Remove redundant ARM_L1_CACHE_SHIFT_6 select
These two are both ARMv7 SoCs.  They need not explicitly select
ARM_L1_CACHE_SHIFT_6 because it is enabled along with CPU_V7.

Refer to commit a092f2b153 ("ARM: 7291/1: cache: assume 64-byte L1
cachelines for ARMv7 CPUs").

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-04-12 17:09:28 +02:00
Arnd Bergmann a262e87ff3 ARM: tegra: select USB_ULPI from EHCI rather than platform
For historic reasons, the tegra platform selects USB_ULPI from architecture
code, but that hasn't really made sense for a long time, as the only
user of that code is the Tegra EHCI driver that has its own Kconfig
symbol.

This removes the 'select' statements from mach-tegra and drivers/soc/tegra
and adds them with the device driver that actually needs them.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-11-24 16:47:26 +01:00
Thierry Reding 9544595262 soc/tegra: Add Tegra210 support
Also known as Tegra X1, the Tegra210 has four Cortex-A57 cores paired
with four Cortex-A53 cores in a switched configuration. It features a
GPU using the Maxwell architecture with support for DX11, SM4, OpenGL
4.5, OpenGL ES 3.1 and providing 256 CUDA cores. It supports hardware
accelerated en- and decoding of various video standards including
H.265, H.264 and VP8 at 4K resolutions and up to 60 fps.

Besides the multimedia features it also comes with a variety of I/O
controllers such as GPIO, I2C, SPI, SDHCI, PCIe, SATA and XHCI, to
name only a few.

Add a Kconfig option for Tegra210 to allow SoC-specific support to be
enabled for this new generation.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-11-24 16:47:24 +01:00
Thierry Reding 099a6644f5 soc/tegra: Provide per-SoC Kconfig symbols
Move per-SoC generation Kconfig symbols to drivers/soc/tegra/Kconfig to
gather them all in a single place. This directory is a natural location
for these options since it already contains the drivers that are shared
across 32-bit and 64-bit ARM architectures.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-11-24 16:47:24 +01:00