The chan_name is missed, otherwise:
[ 68.051062] of_dma_request_slave_channel: not enough information provided
[ 68.058700] fsl-esai-dai 59010000.esai: ASoC: can't open component 59010000.esai: -6
Fixes: 6ee6ebd6efae ("LF-601-1: ASoC: fsl_esai: Switch to imx-pcm-dma-v2")
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
SLSLICE[2] cannot be accessed on 8DXL platform since it is
fixed and locked clock, but can be accessed on 8qm/8qxp platforms
who want to assign the clock to 250Mhz.
Reviewed-by: Richard Zhu <hongxing.zhu@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
RC can't access EP's DDR memory on i.MX8MQ/i.MX8MM platforms.
Rootcause: The BAR# of EP are not configured correct.
The BAR# offset is 1Mbytes on i.MX8MQ/i.MX8MM, but is 4Kbytes on
other i.MX platforms(e.x 6/7/8QM/8QXP/8MP).
Correct the BAR# access offset on i.MX8MQ/i.MX8MM to fix it.
Let DBI always be writeable in EP/RC validation system.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
When no master exists, the sec dsim device can also be
probed successfully, but the component cannot be bound
successfully. So add bound check to runtime suspend and
resume ops to avoid reference NULL pointer in this case.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Tested-by: Liu Ying <victor.liu@nxp.com>
Align i.MX 8mm Job ring node naming
with the rest of the i.MX 8 platforms.
Signed-off-by: Silvano di Ninno <silvano.dininno@nxp.com>
Reviewed-by: Horia Geantă <horia.geanta@nxp.com>
Align i.MX 8QXP/QM Job ring node naming
with the rest of the i.MX 8 platforms.
Signed-off-by: Silvano di Ninno <silvano.dininno@nxp.com>
Reviewed-by: Horia Geantă <horia.geanta@nxp.com>
LCDIF DMA disable should be done before display is
turned off. And enough delay should be added after
DMA disable to make sure it is really done.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Reviewed-by: Robby Cai <robby.cai@nxp.com>
Tested-by: Liu Ying <victor.liu@nxp.com>
Some display flicker issue may be observed when doing mode
switch or display disable and enable switch. The frame clear
bit can clear the FIFO data on every vsync blank period to
avoid any affect for next frame display and can solve this
kind of flicker issues.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Reviewed-by: Robby Cai <robby.cai@nxp.com>
Tested-by: Liu Ying <victor.liu@nxp.com>
There is a shared gate clock exists after 'IMX8MP_CLK_MEDIA_
AXI_ROOT' and 'IMX8MP_CLK_MEDIA_AXI_ROOT' clocks according to
the clock tree, so correct clock values for 'mediamix-pd' by
using the corresponding gate clocks.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Reviewed-by: Robby Cai <robby.cai@nxp.com>
Tested-by: Liu Ying <victor.liu@nxp.com>
The GPU3D shader clock must be on to make sure that GPU3D can be reset
successfully.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Reviewed-by: Anson Huang <Anson.Huang@nxp.com>
With EDMA, there is two dma channels can be used for p2p,
one is from ASRC, one is from another peripheral (ESAI or SAI)
previously we select the dma channel of ASRC, but find an issue
for ideal ratio case, there is no control for data copy
speed, the speed is faster than expected.
So we switch to dma channel of peripheral (ESAI or SAI), that
copy speed of DMA is controlled by data consumption speed
in the peripheral FIFO.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Viorel Suman <viorel.suman@nxp.com>
With the imx-pcm-dma, the dma channel will be allocated in probe,
with EDMA, the channel allocation is fixed for each peripheral.
In ASRC->ESAI->CODEC case, we have two sound card device, hw:x,0
and hw:x,1, with imx-pcm-dma, the channel for esai will be ocuppied
by hw:x,0 in boot up. when asrc platform driver want to request
the dma channnel for esai, it will fail.
So we switch to imx-pcm-dma-v2, with imx-pcm-dma-v2, the dma
channel is allocated when running, not in probe.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Viorel Suman <viorel.suman@nxp.com>
correct property name. power-active-high
USB OTG2 power pin function set problem is fixed by scfw
848498bf4c6d79b33cc5018969574a5369479bc4
Signed-off-by: Frank Li <Frank.Li@nxp.com>
Initial version of XUVI/PPM driver source code. The driver is based
on DVB core. It will work with XUVI/PPM FW to provide TS stream
filtering and demux.
Signed-off-by: Bing Song <bing.song@nxp.com>
Reviewed-by: Jian Li <jian.li@nxp.com>
Reviewed-by: Zhou Peng <eagle.zhou@nxp.com>
Ring buffer will flush if set the error when overflow. The ring
buffer in our case is always full as our source is from file,
not tuner. So we need disable flush and send data to ring buffer
again if ring buffer full. Please revert the patch if use real
tuner.
Signed-off-by: Bing Song <bing.song@nxp.com>
Reviewed-by: Jian Li <jian.li@nxp.com>
Reviewed-by: Zhou Peng <eagle.zhou@nxp.com>
The 'nand_usdhc_bus' clock is only need to be enabled when usdhc
or nand module is active, so change it to non-critical clock type.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Add driver support for i.MX8DXL DB Perf, which supports AXI ID PORT
CHANNEL filter.
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
Add clock support for Perf in DB SS, since Perf LPCG has the clocks off
by default.
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
There is a PMU in DB(DRAM Block) which has the same function with PMU in DDR
subsystem, the difference is PMU in DB only supports cycles, axid-read,
axid-write events.
The role of the DB is to route the read/write transaction from connected
subsystems to either the DDR subsystem, or to any other subsystems. The AXI
IDs used is the one seen at the PORT.
e.g.
perf stat -a -e imx8_db0/axid-read,axi_mask=0xMMMM,axi_id=0xDDDD,axi_port=0xPP,axi_channel=0xH/ cmd
perf stat -a -e imx8_db0/axid-write,axi_mask=0xMMMM,axi_id=0xDDDD,axi_port=0xPP,axi_channel=0xH/ cmd
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
Add driver support for i.MX8DXL DDR Perf, which supports AXI ID PORT
CHANNEL filter.
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
This is the extension of AXI ID filter.
Filter is defined with 2 configuration registers per counter 1-3 (counter 0 is
not used for filtering and lacks these registers).
* Counter N MASK COMP register - AXI_ID and AXI_MASKING.
* Counter N MUX CNTL register - AXI CHANNEL and AXI PORT.
-- 0: address channel
-- 1: data channel
This filter is exposed to userspace as an additional (channel, port) pair. The
definition of axi_channel is inverted in userspace, and it will be reverted in
driver automatically.
AXI filter of Perf Monitor in DDR Subsystem, only a single port0 exist, so
axi_port is reserved which should be 0.
e.g.
perf stat -a -e imx8_ddr0/axid-read,axi_mask=0xMMMM,axi_id=0xDDDD,axi_channel=0xH/ cmd
perf stat -a -e imx8_ddr0/axid-write,axi_mask=0xMMMM,axi_id=0xDDDD,axi_channel=0xH/ cmd
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
MMU enable shift mapping for the reserved memory from 4GB above range,
4GB above address is truncated for mtlb offset falling into dynamic area,
need check shift mapping to avoid dynamic error for the truncated mtlb.
Signed-off-by: Xianzhong <xianzhong.li@nxp.com>
support memory-region for gpu reserved memory from DTS,
keep contiguous_mem compatibility if no memory-region.
Signed-off-by: Xianzhong <xianzhong.li@nxp.com>
Commit 729dcffd1e ("usb: dwc3: gadget: Add support for disabling
U1 and U2 entries") give detail explaination for user case of
disable u1 and u2 in gadget mode:
"Usecase 1:
When combining dwc3 with an redriver for a USB Type-C device
solution, itsometimes have problems with leaving U1/U2 for
certain hosts, resulting in link training errors and reconnects.
For this U1/U2 state entries may be avoided."
on imx8mq-evk board, we have typec and redriver used and android
reported unstable issue when use some host PC for adb, so to have
a better performance, we disable u1 and u2 entries.
Reported-by: Richard Liu <xuegang.liu@nxp.com>
Reviewed-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
dai-index property must match dai-index from topology. FSL DAI
driver uses it for now figure out the correct DAI name, but might
be used for other things in the future.
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
With the help of dai-index we figure out the correct name for a DAI.
In topology files DAI name is formed by concatenating DAI type ("sai",
"esai", etc) with DAI index.
So, this patch removes hardcoded DAI names esai0, sai1 and figures out
the names based on DAI type/index.
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
With the reserved memory for optee, Linux is no
longer able to allocate CMA within the allocation
range defined in the dtb.
Increase the alloc-range so that Linux can allocate in the 4G
address range (in case some DMA are not able to address more).
Signed-off-by: Silvano di Ninno <silvano.dininno@nxp.com>
Reviewed-by: Jian Li <jian.li@nxp.com>
When TX fifo has dirty data, user initialize the port and
wait transmit engine complete, it should disable flow control,
otherwise tx fifo never be empty.
Tested-by: Yang Tian <yang.tian@nxp.com>
Reviewed-by: Richard Zhu <hongxing.zhu@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
mdio bus reset should not happen during resume back for
most of phys, so let mdio bus reset is decided by dts.
Reviewed-by: Richard Zhu <hongxing.zhu@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Start phylink instance and resume back the PHY to supply
RX clock to MAC before MAC layer initialization by calling
.stmmac_hw_setup(), since DMA reset depends on the RX clock,
otherwise DMA reset cost maximum timeout value then finally
timeout.
Reviewed-by: Richard Zhu <hongxing.zhu@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Correct the HDMI irqsteer's interrupt controller parent, otherwise the HDMI
irq can NOT wakeup the cpu core from idle timely, then HDMI performance
will be impacted.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Reviewed-by: Anson Huang <Anson.Huang@nxp.com>
Currently, the voltage of AUX channel under lower level, it was
not satisfied DP spec, this patch will be used to increase voltage
of the AUX channel for DP port.
Signed-off-by: Wen He <wen.he_1@nxp.com>
It should not return -EINVAL if the request role is the same with
current role, return non-error and without do anything instead.
If the user input is neither "host" nor "gadget", return -EINVAL.
Reviewed-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
It should not return -EINVAL if the request role is the same with
current role, return non-error and without do anything instead.
Reviewed-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
IC confirmed the both imx8qm and imx8qxp could use 250M as usb3_clk
and no performance drop.
Reviewed-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
Shengjiu Wang