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8 Commits (3377e227af441aff710726437adc20efc359fd9c)

Author SHA1 Message Date
Steven J. Hill 8508488fe7 MIPS: MIPS16e: Support handling of delay slots.
Add logic needed to properly calculate exceptions for delay slots
when in MIPS16e mode.

Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
2013-05-09 17:55:20 +02:00
Leonid Yegoshin 102cedc32a MIPS: microMIPS: Floating point support.
Add logic needed to do floating point emulation in microMIPS mode.

Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Signed-off-by: Steven J. Hill <Steven. Hill@imgtec.com>
2013-05-09 17:55:18 +02:00
Ralf Baechle 90e8cacdbe MIPS: UAPI: Split inst.h into exported and kernel-only part.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-02-01 10:00:20 +01:00
Ralf Baechle 9561fefc98 MIPS: Add struct p_format to union mips_instruction.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-01-17 15:33:00 +01:00
Ralf Baechle a586e14f2c MIPS: Fix typo multipy -> multiply
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-19 11:23:43 +02:00
David Daney bb3d68c30a MIPS: Add LDX and LWX instructions to uasm.
Needed by Octeon II optimized TLB handlers.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Pachwork: https://patchwork.linux-mips.org/patch/1903/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-01-18 19:30:23 +01:00
David Daney 2ea6399f55 MIPS: Add instrunction format for BREAK and SYSCALL
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
To: ananth@in.ibm.com
To: anil.s.keshavamurthy@intel.com
To: davem@davemloft.net
To: masami.hiramatsu.pt@hitachi.com
Cc: linux-kernel@vger.kernel.org
Cc: hschauhan@nulltrace.org
Patchwork: https://patchwork.linux-mips.org/patch/1524/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-08-05 13:26:28 +01:00
Ralf Baechle 384740dc49 MIPS: Move headfiles to new location below arch/mips/include
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-10-11 16:18:52 +01:00