The Felix DSA driver needs to write to SYS_RAM_INIT_RAM_INIT for its own
chip initialization process.
Also update the MAINTAINERS file such that the headers exported by the
ocelot driver are under the same maintainers' umbrella as the driver
itself.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
We will be registering another switch driver based on ocelot, which
lives under drivers/net/dsa.
Make sure the Felix DSA front-end has the necessary abstractions to
implement a new Ocelot driver instantiation. This includes the function
prototypes for implementing DSA callbacks.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
The Felix switch has a different reset procedure, so a function pointer
needs to be created and added to the ocelot_ops structure.
The reset procedure has been moved into ocelot_init.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
When using the NPI port, the DSA tag is passed through Ethernet, so the
switch's MAC needs to accept it as it comes from the DSA master. Increase
the MTU on the external CPU port to account for the length of the
injection header.
Without this patch, MTU-sized frames are dropped by the switch's CPU
port on xmit, which is especially obvious in TCP sessions.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This constant will be used in a future patch to increase the MTU on NPI
ports, and will also be used in the tagger driver for Felix.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Since in an NPI/DSA setup, not all ports will have the same MTU, we need
to make sure the watermarks for pause frames and/or tail dropping logic
that existed in the driver is still coherent for the new MTU values.
We need to do this because the NPI (aka external CPU) port needs an
increased MTU for the DSA tag. This will be done in a future patch.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
It doesn't make sense to rewrite all these registers every time the PHY
library notifies us about a link state change.
In a future patch we will customize the MTU for the CPU port, and since
the MTU was previously configured from adjust_link, if we don't make
this change, its value would have got overridden.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
The adjust_link routine should be generic enough to be (re)used by
any SoC that integrates a switch core compatible with the Ocelot
core switch driver. Currently all configurations are generic except
for the PCS settings that are SoC specific. Move these out to the
Ocelot SoC/board instance.
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Let's make this ioremap and regmap init code common. It should not
be platform dependent as it should be usable by PCI devices too.
Use better names where necessary to avoid clashes.
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
VSC7514 is a 10-port switch with 2 extra "CPU ports" (targets in the
queuing subsystem for terminating traffic locally).
There are 2 issues with hardcoding the CPU port as #10:
- It is not clear which snippets of the code are configuring something
for one of the CPU ports, and which snippets are just doing something
related to the number of physical ports.
- Actually any physical port can act as a CPU port connected to an
external CPU (in addition to the local CPU). This is called NPI mode
(Node Processor Interface) and is the way that the 6-port VSC9959
(Felix) switch is integrated inside NXP LS1028A (the "local management
CPU" functionality is not used there).
This patch makes it clear that the ocelot_bridge_stp_state_set function
operates on the CPU port (by making it an implicit member of the
bridging domain), and at the same time adds logic for the NPI port (aka
a physical port) to play the role of a CPU port (it shouldn't be part of
bridge_fwd_mask, as it's not explicitly enslaved to a bridge).
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Now that the places that configure routing destinations for the CPU port
have been marked as such, allow callers to specify their own CPU port
that is different than ocelot->num_phys_ports. A user will be the Felix
DSA driver, where the CPU port is one of the physical ports (NPI mode).
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This will be called from the Felix DSA frontend, which will work in
PHYLIB compatibility mode initially.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This is just common path code that belongs to ocelot_init,
it has nothing to do with a specific SoC/board instance.
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Allow these functions to be called from the .port_enable and
.port_disable callbacks of DSA.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
We need a function for the DSA front-end that does none of the
net_device registration, but initializes the hardware ports.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
The VSC7514 switch (Ocelot) is a 10-port device, while VSC9959 (Felix)
is 6-port. Therefore the VLAN filtering mask would be out of bounds when
calling for this new switch. Fix that.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Convert them into an implementation that can be called from DSA as well.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
The ocelot and ocelot_port structures will be used by a new DSA driver,
so the ocelot_board.c file will have to allocate and work with a private
structure (ocelot_port_private), which embeds the generic struct
ocelot_port. This is because in DSA, at least one interface does not
have a net_device, and the DSA driver API does not interact with that
anyway.
The ocelot_port structure is equivalent to dsa_port, and ocelot to
dsa_switch. The members of ocelot_port which have an equivalent in
dsa_port (such as dp->vlan_filtering) have been moved to
ocelot_port_private.
We want to enforce the coding convention that "ocelot_port" refers to
the structure, and "port" refers to the integer index. One can retrieve
the structure at any time from ocelot->ports[port].
The patch is large but only contains variable renaming and mechanical
movement of fields from one structure to another.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
The ocelot_port structure has a net_device embedded in it, which makes
it unsuitable for leaving it in the driver implementation functions.
Leave ocelot_flower.c untouched. In that file, ocelot_port is used as an
interface to the tc shared blocks. That will be addressed in the next
patch.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This is needed so that the Felix DSA front-end can call the Ocelot
implementations.
The implementation of the "mc_disabled" switchdev attribute has also
been simplified by using the read-modify-write macro instead of
open-coding that operation.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This is needed in order to present a simpler prototype to the DSA
front-end of ocelot.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
To be able to implement a DSA front-end over ocelot_fdb_add,
ocelot_fdb_del, ocelot_fdb_dump, these need to have a simple function
prototype that is independent of struct net_device, netlink skb, etc.
So rename the ndo ops of the ocelot driver into
ocelot_port_fdb_{add,del,dump}, and have them all call the abstract
implementations. At the same time, refactor ocelot_port_fdb_do_dump into
a function whose prototype is compatible with dsa_fdb_dump_cb_t, so that
the do_dump implementations can live together and be called by the
ocelot_fdb_dump through a function pointer.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
We need an implementation of these functions that is agnostic to the
higher layer (switchdev or dsa).
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This patch transforms the ocelot_vlan_port_apply function ("apply
what?") into 3 standalone functions:
- ocelot_port_vlan_filtering
- ocelot_port_set_native_vlan
- ocelot_port_set_pvid
These functions have a prototype that is better aligned to the DSA API.
The function also had some static initialization (TPID, drop frames with
multicast source MAC) which was not being changed from any place, so
that was just moved to ocelot_probe_port (one of the 6 callers of
ocelot_vlan_port_apply).
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
* Update Kconfig to also check for ARCH_S32
* Add compatible string and quirks for fsl,s32v234
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
In .mdio_bus_phy_may_suspend(), there check netdev is NULL to judge to set
phy to suspend status.
netdev is NULL has three cases:
- phy is not found
- phy is found, match to general phy driver
- phy is found, match to specifical phy driver
Case 1: phy is not found, cannot communicate by MDIO bus.
Case 2: phy is found:
if phy dev driver probe/bind err, netdev is not __open__ status,
mdio bus is unregistered.
if phy is detached, phy had entered suspended status.
Case 3: phy is found, phy is detached, phy had entered suspended status.
So, in here, it shouldn't set phy to suspend by calling mdio bus.
In i.MX6UL evk/arm2 board, if down the ethx interface and do
suspend/resume, system will hang. Because after ethx down all clocks are
gated off, for general phy driver, unbind the phy device, for specifical
phy driver, no unbind the device, and the original driver call mdio bus to
set phy to suspend during system suspend, so system will hang since there
have mdio register access.
The patch can fix it.
Signed-off-by: Fugang Duan <B38611@freescale.com>
Force mii bus runtime pm suspend during dev suspend since
phydev state already is PHY_HALTED, and there has no mii bus
accessing during suspend stage.
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Double check the mii interrupt status during mdio bus accessing
to avoid interrupt lost in timeout case.
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Set the default rx copybreak value to maximum that can improve
the performance when SMMU is enabled. User can change the copybreak
vaule in dynamically by ethtool.
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
i.MX6SX-AI board has two enet MACs (MAC0 and MAC1), they share MAC0 MII
bus. When PHY0 don't connect to enet MAC0, MAC0 mii bus probe phy0 failed,
and the net interface is set to unattach mode. During suspend resume test,
driver don't reinit MAC0 after resume back, so MII bus don't work that
causes MAC1 also cannot access PHY1. SO reinit MAC0 MII bus for MAC1 using.
Signed-off-by: Fugang Duan <B38611@freescale.com>
The current driver support stop mode by calling machine api.
The patch add dts support to set gpr register for stop request.
imx8mq enter stop/exit stop mode by setting GPR bit, which can
be accessed by A core.
imx8qm enter stop/exit stop mode by calling IMX_SC ipc APIs that
communicate with M core ipc service, and the M core set the related
GPR bit at last.
After magic pattern coming during system suspend status, system will
be waked up, and irq handler will be called, then registers access
cause system hang due to clocks are off. So disable wake up irq in
.suspend(), and enable it in .resume().
Signed-off-by: Fugang Duan <B38611@freescale.com>
Support Gstreamer AVB demo support.
ring1 -> ClassA, ring2 -> ClassB, ring0 -> Best Effort
For QoS: ring1 > ring2 > ring0
For bandwidth reverse:
50% bandwidth -> ClassA
33% bandwidth -> ClassB
17% bandwidth -> Best effort queue
In general, ClassA run audio, ClassB run video.
Since AVB demo use big bandwidth streaming, video cost more than
33Mbps bandwidth, and with Qos limitation: ClassA >= ClassB > Best effort,
so we have to change ring2 bandwidth equal to ring1 bandwidth (50%).
After validate on FPGA, AVB demo can work fine for audio and video.
Signed-off-by: Fugang Duan <B38611@freescale.com>
i.MX8QM ENET IP version support timing specification that MAC
integrate clock delay in RGMII mode, the delayed TXC/RXC as an
alternative option to work well with various PHYs.
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
The i.MX8MQ ENET version support IEEE802.3az eee mode, add
eee mode tx lpi enable to support ethtool interface.
usage:
1. set sleep and wake timer to 5ms:
ethtool --set-eee eth0 eee on tx-lpi on tx-timer 5000
2. check the eee mode:
~# ethtool --show-eee eth0
EEE Settings for eth0:
EEE status: enabled - active
Tx LPI: 5000 (us)
Supported EEE link modes: 100baseT/Full
1000baseT/Full
Advertised EEE link modes: 100baseT/Full
1000baseT/Full
Link partner advertised EEE link modes: 100baseT/Full
Note: For realtime case and IEEE1588 ptp case, it should disable
EEE mode.
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
The ENET of imx8mq and imx8qm are basically the same as imx6sx,
but they have new features support based on imx6sx, like:
- imx8mq: supports IEEE 802.3az EEE standard.
- imx8qm: supports RGMII mode delayed clock.
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Add release_bus_freq on probe exit path.
This was exposed by commit 95ea0158b3fe ("net: fec: add defer probe for
of_get_mac_address")
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Acked-by: Fugang Duan <fugang.duan@nxp.com>
Fixes: fed31bc87f36 ("MLK-9786 net: fec: Add busfreq support to the driver")
Currently, of_get_mac_address supports NVMEM, some platforms
MAC address that read from NVMEM efuse requires to swap bytes
order, so add new property "nvmem_macaddr_swap" to specify the
behavior. If the MAC address is valid from NVMEM, add new property
"nvmem-mac-address" in ethernet node.
Update these two properties in the binding documentation.
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
[ Aisheng: update to yaml format ]
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
If MAC address read from nvmem cell and it is valid mac address,
.of_get_mac_addr_nvmem() add new property "nvmem-mac-address" in
ethernet node. Once user call .of_get_mac_address() to get MAC
address again, it can read valid MAC address from device tree in
directly.
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
ethernet controller driver call .of_get_mac_address() to get
the mac address from devictree tree, if these properties are
not present, then try to read from nvmem.
For example, read MAC address from nvmem:
of_get_mac_address()
of_get_mac_addr_nvmem()
nvmem_get_mac_address()
i.MX6x/7D/8MQ/8MM platforms ethernet MAC address read from
nvmem ocotp eFuses, but it requires to swap the six bytes
order.
The patch add optional property "nvmem_macaddr_swap" to swap
macaddr bytes order.
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
If MAC address read from nvmem efuse by calling .of_get_mac_address(),
but nvmem efuse is registerred later than the driver, then it
return -EPROBE_DEFER value. So modify the driver to support
defer probe when read MAC address from nvmem efuse.
Updates for v2:
avoid memory leak that the queues allocated by fec_enet_alloc_queue().
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
If the memory allocated for cbd_base is failed, it should
free the memory allocated for the queues, otherwise it causes
memory leak.
And if the memory allocated for the queues is failed, it can
return error directly.
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Add request_bus_freq() and release_bus_freq() calls to the
various drivers to ensure that the DDR and AHB are the requested
frequency before the driver starts its task.
Signed-off-by: Fugang Duan <B38611@freescale.com>
Signed-off-by: Vipul Kumar <vipul_kumar@mentor.com>
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
The LS1028A MDIO errata tells us that any MDIO register access must not
be concurrent with any other ENETC register access.
That has been handled so far by a number of per-CPU spinlocks over the
ENETC register map. This came as an optimization over a single spinlock,
because the regular register accesses can still be concurrent with one
another, as long as they aren't concurrent with MDIO.
But this logic is broken in RT, because the enetc_rd_reg_wa and
enetc_wr_reg_wa functions can be preempted in any context, and when they
resume they may not run on the same CPU.
This renders the logic to take the per-CPU spinlock pointless, since the
spinlock may not be the correct one (corresponding to this CPU) after
preemption has occurred.
The following splat is telling us the same thing:
[ 19.073928] BUG: using smp_processor_id() in preemptible [00000000] code: systemd-network/3423
[ 19.073932] caller is debug_smp_processor_id+0x1c/0x30
[ 19.073935] CPU: 1 PID: 3423 Comm: systemd-network Not tainted 4.19.68-rt26 #1
[ 19.073936] Hardware name: LS1028A RDB Board (DT)
[ 19.073938] Call trace:
[ 19.073940] dump_backtrace+0x0/0x1a0
[ 19.073942] show_stack+0x24/0x30
[ 19.073945] dump_stack+0x9c/0xdc
[ 19.073948] check_preemption_disabled+0xe0/0x100
[ 19.073951] debug_smp_processor_id+0x1c/0x30
[ 19.073954] enetc_open+0x1b0/0xbc0
[ 19.073957] __dev_open+0xdc/0x160
[ 19.073960] __dev_change_flags+0x160/0x1d0
[ 19.073963] dev_change_flags+0x34/0x70
[ 19.073966] do_setlink+0x2a0/0xcd0
[ 19.073969] rtnl_setlink+0xe4/0x140
[ 19.073972] rtnetlink_rcv_msg+0x18c/0x500
[ 19.073975] netlink_rcv_skb+0x60/0x120
[ 19.073978] rtnetlink_rcv+0x28/0x40
[ 19.073982] netlink_unicast+0x194/0x210
[ 19.073985] netlink_sendmsg+0x194/0x330
[ 19.073987] sock_sendmsg+0x34/0x50
[ 19.073990] __sys_sendto+0xe4/0x150
[ 19.073992] __arm64_sys_sendto+0x30/0x40
[ 19.073996] el0_svc_common+0xa4/0x1a0
[ 19.073999] el0_svc_handler+0x38/0x80
[ 19.074002] el0_svc+0x8/0xc
But there already exists a spinlock optimized for the single writer,
multiple readers case: the rwlock_t. The writer in this case is the MDIO
access code (irrelevant whether that MDIO access is a register read or
write), and the reader is everybody else.
This patch also fixes two more existing bugs in the errata workaround:
- The MDIO access code was not unlocking the per-CPU spinlocks in the
reverse order of their locking order.
- The per-CPU spinlock array was not initialized.
Fixes: 5ec0d668d62e ("enetc: WA for MDIO register access issue")
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Vladimir Oltean