Commit graph

24468 commits

Author SHA1 Message Date
Daniel Vetter 4cba68507c drm/atomic-helper: Reject legacy flips on a disabled pipe
We want this for consistency with existing page_flip semantics.

Since this spurred quite a discussion on IRC also document why we
reject event generation when the pipe is off: It's not that it's hard
to implement, but userspace has a track recording which proves that it's
way too easy to accidentally abuse and cause havoc. We want to make
sure userspace doesn't get away with that.

v2: Somehow thought we do reject events already, but that code only
existed in my imagination ... Also suggestions from Thierry.

Cc: Daniel Stone <daniels@collabora.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Thierry Reding <thierry.reding@gmail.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/1449564561-3896-4-git-send-email-daniel.vetter@ffwll.ch
2016-01-05 10:07:51 +01:00
Maarten Lankhorst 4cd9fa529d drm/atomic: add connector mask to drm_crtc_state.
It can be useful to iterate over connectors without grabbing
connection_mutex. It can also be used to see how many connectors
are on a crtc without iterating over the list.

Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1451908400-25147-4-git-send-email-maarten.lankhorst@linux.intel.com
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2016-01-05 09:43:33 +01:00
Maarten Lankhorst 5459a2ad9d drm/tegra: Use __drm_atomic_helper_reset_connector for subclassing connector state, v2.
Changes since v1:
- Do not reset if state allocation fails.

Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Acked-by: Thierry Reding <treding@nvidia.com> #irc
Link: http://patchwork.freedesktop.org/patch/msgid/1451908400-25147-3-git-send-email-maarten.lankhorst@linux.intel.com
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2016-01-05 09:43:26 +01:00
Maarten Lankhorst 4cd39917dd drm/atomic: Add __drm_atomic_helper_connector_reset, v2.
This is useful for drivers that subclass connector_state, like tegra.

Changes since v1:
- Docbook updates.

Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1451908400-25147-2-git-send-email-maarten.lankhorst@linux.intel.com
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2016-01-05 09:40:58 +01:00
Maarten Lankhorst 5350a03124 drm/i915: Set connector_state->connector using the helper.
The atomic helper sets connector_state->connector, which the i915
code didn't. This will become a problem when we start using it.

Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1451908400-25147-1-git-send-email-maarten.lankhorst@linux.intel.com
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2016-01-05 09:35:53 +01:00
Chris Wilson 0f646425b9 drm: Use a normal idr allocation for the obj->name
Unlike the handle, the name table uses a sleeping mutex rather than a
spinlock. The allocation is in a normal context, and we can use the
simpler sleeping gfp_t, rather than have to take from the atomic
reserves.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1451902261-25380-3-git-send-email-chris@chris-wilson.co.uk
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2016-01-05 09:00:00 +01:00
Chris Wilson 98a8883ad4 drm: Only bump object-reference count when adding first handle
We only need a single reference count for all handles (i.e. non-zero
obj->handle_count) and so can trim a few atomic operations by only
taking the reference on the first handle and dropping it after the last.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1451902261-25380-2-git-send-email-chris@chris-wilson.co.uk
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2016-01-05 08:59:48 +01:00
Chris Wilson 6984128d01 drm: Balance error path for GEM handle allocation
The current error path for failure when establishing a handle for a GEM
object is unbalance, e.g. we call object_close() without calling first
object_open(). Use the typical onion structure to only undo what has
been set up prior to the error.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2016-01-05 08:59:06 +01:00
Tom St Denis 15c3277ff6 amdgpu/dce11: Add test for crtc < 0 to various DCEv11 functions
To be consistent with other DCE11 functions test for crtc < 0.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2016-01-04 17:21:14 -05:00
Tom St Denis 9e4e1ae82f amdgpu/dce11: Remove division from dce_v11_0_vblank_wait()
Mimics odd behaviour where (i++ % 100 == 0) is true in the first iteration of each loop...

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2016-01-04 17:21:03 -05:00
Tom St Denis 691ca86a3a amdgpu/vce3: Simplify vce_v3_0_hw_init and ensure both rings default to not ready.
Simplified the ring test and added logic to ensure rings are marked not ready
by default.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2016-01-04 17:20:54 -05:00
Tom St Denis 74af12762d amdgpu/vce3: Remove magic constants from harvest register masks.
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2016-01-04 17:20:42 -05:00
Tom St Denis 81da2edef9 amdgpu/vce3: Simplify vce_v3_0_process_interrupt()
Fold two cases into one for a LOC reduction.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2016-01-04 17:20:33 -05:00
Tom St Denis af18b0f7fb amdgpu/vce3: Simplify vce_v3_0_soft_reset()
LOC reduction and simplification.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2016-01-04 17:20:24 -05:00
Tom St Denis 92988e604b amdgpu/vce3: Simplify idle and wait for idle code
More LOC reductions in VCE3 code.  This patch simplifies the is_idle and
wait_for_idle logic.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2016-01-04 17:20:13 -05:00
Tom St Denis 1dab5f067e amdgpu/vce3: Cleanup harvest config function.
Basic LOC reduction.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2016-01-04 17:20:04 -05:00
Chunming Zhou e1de741529 drm/amdgpu: fix NULL in vm_grab_id while S3 back
vm_manager_fini shouldn't be in suspend phase.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Ken Wang  <Qingqing.Wang@amd.com>
2016-01-04 17:17:49 -05:00
Ben Skeggs 9daf38f4fc drm/nouveau/gr/nv40: fix oops in interrupt handler
fdo#93557

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Cc: stable@vger.kernel.org
2016-01-05 07:51:18 +10:00
Dan Carpenter 7c9574f262 drm/amd/powerplay: precedence bug in init_non_clock_fields()
The cast to uint8_t happens before the right shift so this always sets
.m3arb to zero.  The cast is actually a no-op so we can remove it.

Fixes: 3bace35914 ('drm/amd/powerplay: add hardware manager sub-component')
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-01-04 16:21:44 -05:00
Dan Carpenter b92c26d180 drm/amdgpu/cgs: cleanup some indenting
This code is indented too far.  Also we normally use spaces to align if
statement conditions.

Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-01-04 16:18:36 -05:00
Dan Carpenter 2500a3c9e0 drm/amd/powerplay: fix a reversed condition
This test was reversed so it would end up leading to a NULL dereference.

Fixes: 4630f0faae ('drm/amd/powerplay: add Carrizo smu support')
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-01-04 16:16:59 -05:00
Thierry Reding 85a21eafbc drm/radeon: Drop unnecessary unsigned int < 0 check
Unsigned integers can never be negative, so drop this check.

Cc: Christian König <christian.koenig@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-01-04 12:30:46 -05:00
Mykola Lysenko 7a11a334aa drm/dp/mst: fix in RAD element access
This is needed to receive correct port
number from RAD, so MSTB could be found

Acked-by: Dave Airlie <airlied@gmail.com>
Signed-off-by: Mykola Lysenko <Mykola.Lysenko@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2016-01-04 12:11:20 -05:00
Mykola Lysenko 75af4c8c4c drm/dp/mst: fix in MSTB RAD initialization
This fix is needed to support more then two
branch displays, so RAD address consist at
least of 2 elements

Acked-by: Dave Airlie <airlied@gmail.com>
Signed-off-by: Mykola Lysenko <Mykola.Lysenko@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2016-01-04 12:09:01 -05:00
Mykola Lysenko 1f16ee7fa1 drm/dp/mst: always send reply for UP request
We should always send reply for UP request in order
to make downstream device clean-up resources appropriately.

Issue was that reply for UP request was sent only once.

Acked-by: Dave Airlie <airlied@gmail.com>
Signed-off-by: Mykola Lysenko <Mykola.Lysenko@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2016-01-04 12:05:55 -05:00
Mykola Lysenko bd93432087 drm/dp/mst: process broadcast messages correctly
In case broadcast message received in UP request,
RAD cannot be used to identify message originator.
Message should be parsed, originator should be found
by GUID from parsed message.

Also reply with broadcast in case broadcast message
received (for now it is always broadcast)

Acked-by: Dave Airlie <airlied@gmail.com>
Signed-off-by: Mykola Lysenko <Mykola.Lysenko@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2016-01-04 12:03:39 -05:00
Arnd Bergmann 6a53b31349 drm: powerplay: use div64_s64 instead of do_div
The newly added code for Fiji creates a correct compiler warning
about invalid use of the do_div macro:

In file included from powerplay/hwmgr/ppatomctrl.c:31:0:
drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/ppevvmath.h: In function 'fDivide':
drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/ppevvmath.h:382:89: warning: comparison of distinct pointer types lacks a cast
     do_div(longlongX, longlongY); /*Q(32,32) divided by Q(16,16) = Q(16,16) Back to original format */

do_div() divides an unsigned 64-bit number by an unsigned 32-bit number.
The code instead wants to divide two signed 64-bit numbers, which is done
using the div64_s64 function.

Reviewed-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Fixes: 770911a3cf ("drm/amd/powerplay: add/update headers for Fiji SMU and DPM")
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-01-04 10:36:58 -05:00
Julia Lawall 69a0f89c06 drm/dp/mst: constify drm_dp_mst_topology_cbs structures
The drm_dp_mst_topology_cbs structures are never modified, so declare them
as const.

Done with the help of Coccinelle.

Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2016-01-04 08:09:58 +01:00
Geliang Tang d21b02af63 drm/gma500: use to_pci_dev()
Use to_pci_dev() instead of open-coding it.

Signed-off-by: Geliang Tang <geliangtang@163.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2016-01-04 07:57:38 +01:00
Linus Torvalds 4e5e384c46 Merge tag 'drm-intel-fixes-2016-01-02' of git://anongit.freedesktop.org/drm-intel
Pull i915 drm fixes from Jani Nikula:
 "Two display fixes still for v4.4.

  The new year's resolution is to start using signed tags per Linus'
  request.  This one is still unsigned; I want to fix this up in our
  maintainer scripts instead of doing it one-off"

* tag 'drm-intel-fixes-2016-01-02' of git://anongit.freedesktop.org/drm-intel:
  drm/i915: increase the tries for HDMI hotplug live status checking
  drm/i915: Unbreak check_digital_port_conflicts()
2016-01-03 11:36:26 -08:00
Tomi Valkeinen 9c8e566e49 drm/omap: remove obsolete manager assignment
omap_encoder_update() assigns an overlay manager to
dssdev->src->manager. This assignment is not needed, as the connections
in the display chain have already been made at connect step.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
2015-12-31 11:25:48 +02:00
Tomi Valkeinen 728fea775c drm/omap: set DRIVER_ATOMIC for omapdrm
omapdrm supports atomic modesetting, and it seems to work ok. So let's
set the flag to enable the atomic modesetting API support.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
2015-12-31 11:25:48 +02:00
Tomi Valkeinen b75e1513fc drm/omap: remove unused plugin defines
Remove unused defines related to SGX plugin which are not used.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
2015-12-31 11:25:47 +02:00
Andy Gross 0d6fa53fd8 drm/omap: Use bitmaps for TILER placement
Modified Tiler placement to utilize bitmaps for bookkeeping and
all placement algorithms.  This resulted in a substantial savings
in time for all Tiler reservation and free operations.  Typical
savings are in the range of 28% decrease in time taken with larger
buffers showing a 80%+ decrease.

Signed-off-by: Andy Gross <andy.gross@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
2015-12-31 11:25:47 +02:00
Laurent Pinchart 73d77107b8 drm: omapdrm: gem: Remove check for impossible condition
The GEM object can't be tiled without a usergart as that condition is
checked and considered as an error when creating the GEM object.

Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
2015-12-31 11:25:46 +02:00
Laurent Pinchart 92b4b44538 drm: omapdrm: gem: Simplify error handling when creating GEM object
The goto error statement end up just returning NULL without performing
any cleanup, replace it with a direct return.

Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
2015-12-31 11:25:46 +02:00
Laurent Pinchart 08b710f85c drm: omapdrm: gem: Don't free mmap offset twice
The drm_gem_free_mmap_offset() call in omap_gem_free_object() is
redundant as the same function is called from drm_gem_object_release().
Remove it.

Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
2015-12-31 11:25:45 +02:00
Laurent Pinchart 74128a237e drm: omapdrm: gem: Fix GEM object destroy in error path
Use the omap_gem_free_object() function to destroy the GEM object in the
omap_gem_new_handle() error path instead of doing it manually (and
incorrectly).

Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
2015-12-31 11:25:45 +02:00
Laurent Pinchart 00e9c7c700 drm: omapdrm: gem: Free the correct memory object
The GEM object free handler frees memory allocated by the driver using
the pointer to the drm_gem_object instead of the pointer to the
omap_gem_object that embeds it. This doesn't cause any issue in practice
as the drm_gem_object is the first field of omap_gem_object, but would
cause memory corruption if the structure layout changes. Fix it.

Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
2015-12-31 11:25:45 +02:00
Laurent Pinchart ef3f4e9982 drm: omapdrm: gem: Mask out private flags passed from userspace
The 8 high order bits of the buffer flags are reserved for internal use.
Mask them out from the flags passed by userspace.

Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
2015-12-31 11:25:44 +02:00
Laurent Pinchart f4302747af drm: omapdrm: gem: Move global usergart variable to omap_drm_private
The structure contains data related to a device instance, it shouldn't
be a global variable.

While at it rename the usergart structures with an omap_drm_ prefix.

Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
2015-12-31 11:25:44 +02:00
Laurent Pinchart 7ef93b0aa8 drm: omapdrm: gem: Group functions by purpose
Divide the GEM implementation in groups of functions to improve
readability.

No code change is performed by this commit.

Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
2015-12-31 11:25:43 +02:00
Laurent Pinchart b902f8f4d6 drm: omapdrm: gem: Remove forward declarations
Reorder functions to get rid of forward declarations

Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
2015-12-31 11:25:43 +02:00
Laurent Pinchart 6405e414dd drm: omapdrm: gem: Remove unused function prototypes
Several DRM core function prototypes refer to functions that don't exist
anymore and are thus obviously never called. Remove them.

Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
2015-12-31 11:25:43 +02:00
Laurent Pinchart e1c1174f8d drm: omapdrm: Make fbdev emulation optional
Don't compile the fbdev emulation code when fbdev emulation support is
disabled.

Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
2015-12-31 11:25:42 +02:00
Laurent Pinchart f8ef29ee45 drm: omapdrm: Fix plane state free in plane reset handler
The plane reset handler frees the plane state and allocates a new
default state, but when doing so attempt to free the plane state using
the base plane state pointer instead of casting it to the
driver-specific state object that has been allocated. Fix it by using
the omap_plane_atomic_destroy_state() function to destroy the plane
state instead of duplicating the code.

Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
[tomi.valkeinen@ti.com: move of the func into separate patch]
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
2015-12-31 11:25:42 +02:00
Tomi Valkeinen e07323cf1b drm: omapdrm: move omap_plane_reset()
Move omap_plane_reset() function to avoid forward declarations in the
next patch.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
2015-12-31 11:25:41 +02:00
Thierry Reding e1c49bdcdb drm/omap: Use platform_register/unregister_drivers()
These new helpers simplify implementing multi-driver modules and
properly handle failure to register one driver by unregistering all
previously registered drivers.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
2015-12-31 11:25:41 +02:00
Luis de Bethencourt d4182e35aa drm: omapdrm: tiler: Remove unneded module alias for tiler
omap_dmm_tiler.c can't be compiled as a module and it is built
unconditionally as part of omapdrm. Since it can't be used as a module,
there is no need for it to have an unused MODULE_ALIAS().

Signed-off-by: Luis de Bethencourt <luisbg@osg.samsung.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
2015-12-31 11:25:40 +02:00
Stephen Rothwell 54255e818e drm/rockchip: vop: export vop_component_ops to modules
Fixes: a67719d182 ("drm/rockchip: vop: spilt register related into rockchip_reg_vop.c")
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
Acked-by: Mark Yao <mark.yao@rock-chips.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-12-31 17:42:18 +10:00
Gary Wang 3d8acd1f66 drm/i915: increase the tries for HDMI hotplug live status checking
The total delay of HDMI hotplug detecting with 30ms is sometimes not
enoughtfor HDMI live status up with specific HDMI monitors in BSW platform.

After doing experiments for following monitors, it needs 80ms at least
for those worst cases.

Lenovo L246 1xwA (4 failed, necessary hot-plug delay: 58/40/60/40ms)
Philips HH2AP (9 failed, necessary hot-plug delay: 80/50/50/60/46/40/58/58/39ms)
BENQ ET-0035-N (6 failed, necessary hot-plug delay: 60/50/50/80/80/40ms)
DELL U2713HM (2 failed, necessary hot-plug delay: 58/59ms)
HP HP-LP2475w (5 failed, necessary hot-plug delay: 70/50/40/60/40ms)

It looks like 70-80 ms is BSW platform needs in some bad cases of the
monitors at this end (8 times delay at most). Keep less than 100ms for
HDCP pulse HPD low (with at least 100ms) to respond a plug out.

Reviewed-by: Cooper Chiou <cooper.chiou@intel.com>
Tested-by: Gary Wang <gary.c.wang@intel.com>
Cc: Gavin Hindman <gavin.hindman@intel.com>
Cc: Sonika Jindal <sonika.jindal@intel.com>
Cc: Shashank Sharma <shashank.sharma@intel.com>
Cc: Shobhit Kumar <shobhit.kumar@intel.com>
Signed-off-by: Gary Wang <gary.c.wang@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1450858295-12804-1-git-send-email-gary.c.wang@intel.com
Tested-by: Shobhit Kumar <shobhit.kumar@intel.com>
Cc: drm-intel-fixes@lists.freedesktop.org
Fixes: 237ed86c69 ("drm/i915: Check live status before reading edid")
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
(cherry picked from commit f8d03ea005)
[Jani: undo the file mode change of the original commit]
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2015-12-30 13:58:37 +02:00
Tomi Valkeinen 5b63aa3fec drm/omap: make omapdrm select OMAP2_DSS
Now that omapdss is only for omapdrm, we can change omapdrm to select
OMAP2_DSS to enable omapdss if omapdrm is enabled, instead of omapdrm
depending on omapdss.

We can also change omapdss and the display drivers to depend on
DRM_OMAP, so that they are only visible under omapdrm in menuconfig.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Acked-by: Dave Airlie <airlied@gmail.com>
Acked-by: Rob Clark <robdclark@gmail.com>
2015-12-29 11:07:48 +02:00
Tomi Valkeinen 9960aa7cb5 drm/omap: move omapdss & displays under omapdrm
Now that omapfb has its own copy of omapdss and display drivers, we can
move omapdss and display drivers which omapdrm uses to omapdrm's
directory.

We also need to change the main drm Makefile so that omapdrm directory
is always entered, because omapdss has a file that can't be built as a
module.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Acked-by: Dave Airlie <airlied@gmail.com>
Acked-by: Rob Clark <robdclark@gmail.com>
2015-12-29 11:07:48 +02:00
Mark Yao f767345350 drm/rockchip: vop: add rk3036 vop support
RK3036 registers layout is quite difference with rk3288 layout,
The IC design with different framework, rk3036 vop is VOP LITE,
and rk3288 is VOP FULL.

RK3036 support two overlay plane and one hwc plane, max output
resolution is 1080p. it support IOMMU, and its IOMMU same as
rk3288's.

Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
2015-12-28 09:01:48 +08:00
Mark Yao 1194fffbb1 drm/rockchip: vop: spilt scale regsters
There are two version scale control register found on vop,
scale full version found on rk3288, support extension registers.
and scale little version found on rk3036, only support common scale.

Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
2015-12-28 09:01:41 +08:00
Mark Yao a67719d182 drm/rockchip: vop: spilt register related into rockchip_reg_vop.c
No functional updates. Spilt register related into another file
would be nice to multi vop driver,

Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
2015-12-28 09:01:34 +08:00
Mark Yao dbb3d94444 drm/rockchip: vop: move interrupt registers into vop_data
Move interrupt registers into vop_data, so it can use at multi-vop driver

Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
2015-12-28 09:01:28 +08:00
Mark Yao 0cf33fe33d drm/rockchip: vop: merge vop cfg_done into vop_data
Move cfg_done register into vop_data, so it can use at multi-vop driver

Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
2015-12-28 09:01:21 +08:00
Mark Yao a8eef71d38 drm/rockchip: dw_hdmi: use encoder enable function
encoder.enable is more compatible to atomic api than encoder.prepare/commit

Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
2015-12-28 08:57:16 +08:00
Mark Yao 2c5b2cccdb drm: bridge/dw_hdmi: add atomic API support
Fill atomic needed funcs with default atomic helper library.

Rockchip use dw_hdmi, and drm/rockchip will covert to atomic api,
we need dw_hdmi support atomic funcs.

Now another drm driver use dw_hdmi is imx, not yet atomic, so
check DRIVER_ATOMIC at runtime to spilt atomic and not atomic.

Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
2015-12-28 08:55:53 +08:00
Mark Yao d0e20d0ebf drm/rockchip: direct config connecter gate and out_mode
Both connecter gate and out_mode are not conflict with mode set
configure. Direct setting connecter gate and out_mode, that allow
connector do rockchip_drm_crtc_mode_config after mode set.

Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
2015-12-28 08:50:02 +08:00
Mark Yao f32fad51ee drm/rockchip: support atomic asynchronous commit
If drm core requests a async commit, rockchip_drm_atomic_commit
will schedule a work task to update later.

Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
2015-12-28 08:49:54 +08:00
Mark Yao ce3887ed0d drm/rockchip: Optimization vop mode set
Rk3288 vop timing registers is immediately register, when configure
timing on display active time, will cause tearing. use dclk reset is
not a good idea to avoid this tearing. we can avoid tearing by using
standby register.

Vop standby register will take effect at end of current frame, and
go back to work immediately when exit standby.

So we can use standby register to protect this context.

Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
2015-12-28 08:49:48 +08:00
Mark Yao 63ebb9fa7f drm/rockchip: Convert to support atomic API
Rockchip vop not support hw vblank counter, needed check the committed
register if it's really take effect.

Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
2015-12-28 08:49:39 +08:00
Mark Yao 0ad3675d9c drm/rockchip: vop: replace dpms with enable/disable
For vop, power by enable/disable is more suitable then legacy dpms
function, and enable/disable more closely to the new atomic API.

Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
2015-12-28 08:49:32 +08:00
Mark Yao b5f7b75503 drm/rockchip: Use new vblank api drm_crtc_vblank_*
No functional update, drm_vblank_* is the legacy version of
drm_crtc_vblank_*. and use new api make driver more clean.

Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
2015-12-28 08:49:24 +08:00
Dave Airlie 20f8e032e6 Backmerge drm-fixes merge into Linus's tree into drm-next.
This merges '5b726e06d6e8309e5c9ef4109a32caf27c71dfc8' into drm-next

Just to resolve some merges to make Daniel's life easier.

Signed-off-by: DAve Airlie <airlied@redhat.com>
2015-12-24 08:08:47 +10:00
Linus Torvalds 5b726e06d6 Merge tag 'drm-intel-fixes-2015-12-23' of git://anongit.freedesktop.org/drm-intel
Pull i915 drm fixes from Jani Nikula:
 "Here's a batch of i915 fixes all around.  It may be slightly bigger
  than one would hope for at this stage, but they've all been through
  testing in our -next before being picked up for v4.4.  Also, I missed
  Dave's fixes pull earlier today just because I wanted an extra testing
  round on this.  So I'm fairly confident.

  Wishing you all the things it is customary to wish this time of the
  year"

* tag 'drm-intel-fixes-2015-12-23' of git://anongit.freedesktop.org/drm-intel:
  drm/i915: Correct max delay for HDMI hotplug live status checking
  drm/i915: mdelay(10) considered harmful
  drm/i915: Kill intel_crtc->cursor_bo
  drm/i915: Workaround CHV pipe C cursor fail
  drm/i915: Only spin whilst waiting on the current request
  drm/i915: Limit the busy wait on requests to 5us not 10ms!
  drm/i915: Break busywaiting for requests on pending signals
  drm/i915: Disable primary plane if we fail to reconstruct BIOS fb (v2)
  drm/i915: Set the map-and-fenceable flag for preallocated objects
  drm/i915: Drop the broken cursor base==0 special casing
2015-12-23 10:22:16 -08:00
Ville Syrjälä ae35b56e36 drm/i915: Unbreak check_digital_port_conflicts()
Atomic changes broke check_digital_port_conflicts(). It needs to look
at the global situation instead of just trying to find a conflict
within the current atomic state.

This bug made my HSW explode spectacularly after I had split the DDI
encoders into separate DP and HDMI encoders. With the fix, things
seem much more solid.

I hope holding the connection_mutex is enough protection that we can
actually walk the connectors even if they're not part of the current
atomic state...

v2: Regenerate the patch so that it actually applies (Jani)

Cc: stable@vger.kernel.org
Cc: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Fixes: 5448a00d3f ("drm/i915: Don't use staged config in check_digital_port_conflicts()")
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/1449764551-12466-1-git-send-email-ville.syrjala@linux.intel.com
(cherry picked from commit 0bff485865)
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2015-12-23 12:52:37 +02:00
Takashi Iwai 59c8231089 Merge branch 'for-linus' into for-next
Conflicts:
	drivers/gpu/drm/i915/intel_pm.c
2015-12-23 08:33:34 +01:00
Dave Airlie ade1ba7346 Merge tag 'drm-intel-next-2015-12-18' of git://anongit.freedesktop.org/drm-intel into drm-next
- fix atomic watermark recomputation logic (Maarten)
- modeset sequence fixes for LPT (Ville)
- more kbl enabling&prep work (Rodrigo, Wayne)
- first bits for mst audio
- page dirty tracking fixes from Dave Gordon
- new get_eld hook from Takashi, also included in the sound tree
- fixup cursor handling when placed at address 0 (Ville)
- refactor VBT parsing code (Jani)
- rpm wakelock debug infrastructure ( Imre)
- fbdev is pinned again (Chris)
- tune the busywait logic to avoid wasting cpu cycles (Chris)

* tag 'drm-intel-next-2015-12-18' of git://anongit.freedesktop.org/drm-intel: (81 commits)
  drm/i915: Update DRIVER_DATE to 20151218
  drm/i915/skl: Default to noncoherent access up to F0
  drm/i915: Only spin whilst waiting on the current request
  drm/i915: Limit the busy wait on requests to 5us not 10ms!
  drm/i915: Break busywaiting for requests on pending signals
  drm/i915: don't enable autosuspend on platforms without RPM support
  drm/i915/backlight: prefer dev_priv over dev pointer
  drm/i915: Disable primary plane if we fail to reconstruct BIOS fb (v2)
  drm/i915: Pin the ifbdev for the info->system_base GGTT mmapping
  drm/i915: Set the map-and-fenceable flag for preallocated objects
  drm/i915: mdelay(10) considered harmful
  drm/i915: check that we are in an RPM atomic section in GGTT PTE updaters
  drm/i915: add support for checking RPM atomic sections
  drm/i915: check that we hold an RPM wakelock ref before we put it
  drm/i915: add support for checking if we hold an RPM reference
  drm/i915: use assert_rpm_wakelock_held instead of opencoding it
  drm/i915: add assert_rpm_wakelock_held helper
  drm/i915: remove HAS_RUNTIME_PM check from RPM get/put/assert helpers
  drm/i915: get a permanent RPM reference on platforms w/o RPM support
  drm/i915: refactor RPM disabling due to RC6 being disabled
  ...
2015-12-23 14:22:09 +10:00
Dave Airlie fd3e14ffbd Merge branch 'drm-next-4.5' of git://people.freedesktop.org/~agd5f/linux into drm-next
[airlied: fixup build problems on arm - added errno.h include]
* 'drm-next-4.5' of git://people.freedesktop.org/~agd5f/linux: (152 commits)
  amd/powerplay: fix copy paste typo in hardwaremanager.c
  amd/powerplay: disable powerplay by default initially
  amd/powerplay: don't enable ucode fan control if vbios has no fan table
  drm/amd/powerplay: show gpu load when print gpu performance for Cz. (v2)
  drm/amd/powerplay: check whether need to enable thermal control. (v2)
  drm/amd/powerplay: add point check to avoid NULL point hang.
  drm/amdgpu/powerplay: Program a calculated value as Deep Sleep clock.
  drm/amd/powerplay: Don't return an error if fan table is missing
  drm/powerplay/hwmgr: log errors in tonga_hwmgr_backend_init
  drm/powerplay: add debugging output to processpptables.c
  drm/powerplay: add debugging output to tonga_processpptables.c
  amd/powerplay: Add structures required to report configuration change
  amd/powerplay: Fix get dal power level
  amd\powerplay Implement get dal power level
  drm/amd/powerplay: display gpu load when print performance for tonga.
  drm/amdgpu/powerplay: enable sysfs and debugfs interfaces late
  drm/amd/powerplay: move shared function of vi to hwmgr. (v2)
  drm/amd/powerplay: check whether enable dpm in powerplay.
  drm/amd/powerplay: fix bug that dpm funcs in debugfs/sysfs missing.
  drm/amd/powerplay: fix boolreturn.cocci warnings
  ...
2015-12-23 14:15:26 +10:00
Dave Airlie 9116199536 Merge branch 'drm-tda998x-devel' of git://ftp.arm.linux.org.uk/~rmk/linux-arm into drm-next
These changes from Liviu add support for atomic mode setting, add the
TMDS clock limitation according to the device, and ensure that we
correctly clean up in the unbind function.

* 'drm-tda998x-devel' of git://ftp.arm.linux.org.uk/~rmk/linux-arm:
  drm/i2c: tda998x: Add support for atomic modesetting
  drm/i2c: tda998x: increase the supported dotclock frequency to 165MHz for TDA19988
  drm/i2c: tda998x: unregister the connector in the unbind function
2015-12-23 09:21:12 +10:00
Dave Airlie f884a507e6 Merge branch 'drm-armada-devel' of git://ftp.arm.linux.org.uk/~rmk/linux-arm into drm-next
These are the patches from Daniel Vetter, getting rid of struct_mutex
from the Armada DRM driver.

* 'drm-armada-devel' of git://ftp.arm.linux.org.uk/~rmk/linux-arm:
  drm/armada: use a private mutex to protect priv->linear
  drm/armada: drop struct_mutex from cursor paths
  drm/armada: don't grab dev->struct_mutex for in mmap offset ioctl
  drm/armada: plug leak in dumb_map_offset
  drm/armada: use unlocked gem unreferencing
2015-12-23 09:19:58 +10:00
Chris Wilson d5f384de5b drm/i915: Move Braswell stop_machine GGTT insertion workaround
There was a silent conflict between

commit 0a87871626
Author: Daniel Vetter <daniel.vetter@ffwll.ch>
Date:   Thu Oct 15 14:23:01 2015 +0200

    drm/i915: restore ggtt double-bind avoidance

and

commit 5bab6f60cb
Author: Chris Wilson <chris@chris-wilson.co.uk>
Date:   Fri Oct 23 18:43:32 2015 +0100

    drm/i915: Serialise updates to GGTT with access through GGTT on Braswell

thankfully caught by the extra WARN safegaurd in 0a878716. Since we now
override the GGTT insert_pages callback when installing the aliasing
ppgtt, we assert that the callback is the original ggtt routine.
However, on Braswell we now use a different insertion routine to
serialise access through the GGTT with updating the PTE and hence the
conflict. To avoid the conflict, move the custom insertion routine for
Braswell down a level.

Reported-by: Ville Syrjälä <ville.syrjala@linux.intel.com
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Michel Thierry <michel.thierry@intel.com>
Cc: Mika Kuoppala <mika.kuoppala@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1447859979-20107-1-git-send-email-chris@chris-wilson.co.uk
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Tested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: drm-intel-fixes@lists.freedesktop.org
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
(cherry picked from commit c140330b5e)
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2015-12-22 14:00:52 +02:00
Gary Wang a98728e0bb drm/i915: Correct max delay for HDMI hotplug live status checking
The total delay of HDMI hotplug detecting with 30ms have already
been split into a resolution of 3 retries of 10ms each, for the worst
cases. But it still suffered from only waiting 10ms at most in
intel_hdmi_detect(). This patch corrects it by reading hotplug status
with 4 times at most for 30ms delay.

v2:
- straight up to loop execution for more clear in code readability
- mdelay will replace with msleep by Daniel's new patch

	drm/i915: mdelay(10) considered harmful

- suggest to re-evaluate try times for being compatible to old HDMI monitor

Reviewed-by: Cooper Chiou <cooper.chiou@intel.com>
Tested-by: Gary Wang <gary.c.wang@intel.com>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Daniel Vetter <daniel@ffwll.ch>
Cc: Gavin Hindman <gavin.hindman@intel.com>
Cc: Sonika Jindal <sonika.jindal@intel.com>
Cc: Shashank Sharma <shashank.sharma@intel.com>
Signed-off-by: Gary Wang <gary.c.wang@intel.com>
[danvet: fixup conflict with s/mdelay/msleep/ patch.]
Cc: drm-intel-fixes@lists.freedesktop.org
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
(cherry picked from commit 61fb3980dd)
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2015-12-22 13:01:24 +02:00
Daniel Vetter 97f9010af0 drm/i915: mdelay(10) considered harmful
I missed this myself when reviewing

commit 237ed86c69
Author: Sonika Jindal <sonika.jindal@intel.com>
Date:   Tue Sep 15 09:44:20 2015 +0530

    drm/i915: Check live status before reading edid

Long sleeps like this really shouldn't waste cpu cycles spinning.

Cc: Sonika Jindal <sonika.jindal@intel.com>
Cc: "Wang, Gary C" <gary.c.wang@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1449859455-32609-1-git-send-email-daniel.vetter@ffwll.ch
Reviewed-by: Sonika Jindal <sonika.jindal@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
(cherry picked from commit 71a199bacb)
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2015-12-22 13:00:45 +02:00
Ville Syrjälä 57a2af6bbc drm/i915: Kill intel_crtc->cursor_bo
The vma may have been rebound between the last time the cursor was
enabled and now, so skipping the cursor gtt offset deduction is not
safe unless we would also reset cursor_bo to NULL when disabling the
cursor. Just thow cursor_bo to the bin instead since it's lost all
other uses thanks to universal plane support.

Chris pointed out that cursor updates are currently too slow
via universal planes that micro optimizations like these wouldn't
even help.

v2: Add a note about futility of micro optimizations (Chris)

Cc: drm-intel-fixes@lists.freedesktop.org
References: http://lists.freedesktop.org/archives/intel-gfx/2015-December/082976.html
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Takashi Iwai <tiwai@suse.de>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1450107302-17171-1-git-send-email-ville.syrjala@linux.intel.com
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
(cherry picked from commit 1264859d64)
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2015-12-22 12:59:06 +02:00
Ville Syrjälä ef8dd37af8 drm/i915: Workaround CHV pipe C cursor fail
Turns out CHV pipe C was glued on somewhat poorly, and there's something
wrong with the cursor. If the cursor straddles the left screen edge,
and is then moved away from the edge or disabled, the pipe will often
underrun. If enough underruns are triggered quickly enough the pipe
will fall over and die (it just scans out a solid color and reports
a constant underrun). We need to turn the disp2d power well off and
on again to recover the pipe.

None of that is very nice for the user, so let's just refuse to place
the cursor in the compromised position. The ddx appears to fall back
to swcursor when the ioctl returns an error, so theoretically there's
no loss of functionality for the user (discounting swcursor bugs).
I suppose most cursors images actually have the hotspot not exactly
at 0,0 so under typical conditions the fallback will in fact kick in
as soon as the cursor touches the left edge of the screen.

Any atomic compositor should anyway be prepared to fall back to
GPU composition when things don't work out, so there should be no
problem with those.

Other things that I tried to solve this include flipping all
display related clock gating knobs I could find, increasing the
minimum gtt alignment all the way up to 512k. I also tried to see
if there are more specific screen coordinates that hit the bug, but
the findings were somewhat inconclusive. Sometimes the failures
happen almost across the whole left edge, sometimes more at the very
top and around the bottom half. I wasn't able to find any real pattern
to these variations, so it seems our only choice is to just refuse
to straddle the left screen edge at all.

Cc: stable@vger.kernel.org
Cc: Jason Plum <max@warheads.net>
Testcase: igt/kms_chv_cursor_fail
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=92826
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1450459479-16286-1-git-send-email-ville.syrjala@linux.intel.com
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
(cherry picked from commit b29ec92c4f)
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2015-12-22 12:57:56 +02:00
Chris Wilson 0f0cd47206 drm/i915: Only spin whilst waiting on the current request
Limit busywaiting only to the request currently being processed by the
GPU. If the request is not currently being processed by the GPU, there
is a very low likelihood of it being completed within the 2 microsecond
spin timeout and so we will just be wasting CPU cycles.

v2: Check for logical inversion when rebasing - we were incorrectly
checking for this request being active, and instead busywaiting for
when the GPU was not yet processing the request of interest.

v3: Try another colour for the seqno names.
v4: Another colour for the function names.

v5: Remove the forced coherency when checking for the active request. On
reflection and plenty of recent experimentation, the issue is not a
cache coherency problem - but an irq/seqno ordering problem (timing issue).
Here, we do not need the w/a to force ordering of the read with an
interrupt.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
Cc: "Rogozhkin, Dmitry V" <dmitry.v.rogozhkin@intel.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
Cc: Eero Tamminen <eero.t.tamminen@intel.com>
Cc: "Rantala, Valtteri" <valtteri.rantala@intel.com>
Cc: stable@vger.kernel.org
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/1449833608-22125-4-git-send-email-chris@chris-wilson.co.uk
(cherry picked from commit 821485dc2a)
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2015-12-22 12:56:58 +02:00
Chris Wilson f87a780f07 drm/i915: Limit the busy wait on requests to 5us not 10ms!
When waiting for high frequency requests, the finite amount of time
required to set up the irq and wait upon it limits the response rate. By
busywaiting on the request completion for a short while we can service
the high frequency waits as quick as possible. However, if it is a slow
request, we want to sleep as quickly as possible. The tradeoff between
waiting and sleeping is roughly the time it takes to sleep on a request,
on the order of a microsecond. Based on measurements of synchronous
workloads from across big core and little atom, I have set the limit for
busywaiting as 10 microseconds. In most of the synchronous cases, we can
reduce the limit down to as little as 2 miscroseconds, but that leaves
quite a few test cases regressing by factors of 3 and more.

The code currently uses the jiffie clock, but that is far too coarse (on
the order of 10 milliseconds) and results in poor interactivity as the
CPU ends up being hogged by slow requests. To get microsecond resolution
we need to use a high resolution timer. The cheapest of which is polling
local_clock(), but that is only valid on the same CPU. If we switch CPUs
because the task was preempted, we can also use that as an indicator that
 the system is too busy to waste cycles on spinning and we should sleep
instead.

__i915_spin_request was introduced in
commit 2def4ad99b [v4.2]
Author: Chris Wilson <chris@chris-wilson.co.uk>
Date:   Tue Apr 7 16:20:41 2015 +0100

     drm/i915: Optimistically spin for the request completion

v2: Drop full u64 for unsigned long - the timer is 32bit wraparound safe,
so we can use native register sizes on smaller architectures. Mention
the approximate microseconds units for elapsed time and add some extra
comments describing the reason for busywaiting.

v3: Raise the limit to 10us
v4: Now 5us.

Reported-by: Jens Axboe <axboe@kernel.dk>
Link: https://lkml.org/lkml/2015/11/12/621
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
Cc: "Rogozhkin, Dmitry V" <dmitry.v.rogozhkin@intel.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
Cc: Eero Tamminen <eero.t.tamminen@intel.com>
Cc: "Rantala, Valtteri" <valtteri.rantala@intel.com>
Cc: stable@vger.kernel.org
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/1449833608-22125-3-git-send-email-chris@chris-wilson.co.uk
(cherry picked from commit ca5b721e23)
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2015-12-22 12:55:50 +02:00
Chris Wilson e7571f7fd6 drm/i915: Break busywaiting for requests on pending signals
The busywait in __i915_spin_request() does not respect pending signals
and so may consume the entire timeslice for the task instead of
returning to userspace to handle the signal.

In the worst case this could cause a delay in signal processing of 20ms,
which would be a noticeable jitter in cursor tracking. If a higher
resolution signal was being used, for example to provide fairness of a
server timeslices between clients, we could expect to detect some
unfairness between clients (i.e. some windows not updating as fast as
others). This issue was noticed when inspecting a report of poor
interactivity resulting from excessively high __i915_spin_request usage.

Fixes regression from
commit 2def4ad99b [v4.2]
Author: Chris Wilson <chris@chris-wilson.co.uk>
Date:   Tue Apr 7 16:20:41 2015 +0100

     drm/i915: Optimistically spin for the request completion

v2: Try to assess the impact of the bug

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
Cc: Jens Axboe <axboe@kernel.dk>
Cc; "Rogozhkin, Dmitry V" <dmitry.v.rogozhkin@intel.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
Cc: Eero Tamminen <eero.t.tamminen@intel.com>
Cc: "Rantala, Valtteri" <valtteri.rantala@intel.com>
Cc: stable@vger.kernel.org
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/1449833608-22125-2-git-send-email-chris@chris-wilson.co.uk
(cherry picked from commit 91b0c352ac)
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2015-12-22 12:55:01 +02:00
Matt Roper a59fac67d3 drm/i915: Disable primary plane if we fail to reconstruct BIOS fb (v2)
If we fail to reconstruct the BIOS fb (e.g., because the FB is too
large), we'll be left with plane state that indicates the primary plane
is visible yet has a NULL fb.  This mismatch causes problems later on
(e.g., for the watermark code).  Since we've failed to reconstruct the
BIOS FB, the best solution is to just disable the primary plane and
pretend the BIOS never had it enabled.

v2: Add intel_pre_disable_primary() call (Maarten)

Cc: Daniel Vetter <daniel@ffwll.ch>
Cc: Ville Syrjälä <ville.syrjala@intel.com>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Cc: drm-intel-fixes@lists.freedesktop.org
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1449171462-30763-2-git-send-email-matthew.d.roper@intel.com
(cherry picked from commit 200757f5d7)
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2015-12-22 11:52:50 +02:00
Chris Wilson 62d622c1f8 drm/i915: Set the map-and-fenceable flag for preallocated objects
As we mark the preallocated objects as bound, we should also flag them
correctly as being map-and-fenceable (if appropriate!) so that later
users do not get confused and try and rebind the pinned vma in order to
get a map-and-fenceable binding.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: "Goel, Akash" <akash.goel@intel.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
Cc: drm-intel-fixes@lists.freedesktop.org
Link: http://patchwork.freedesktop.org/patch/msgid/1448029000-10616-1-git-send-email-chris@chris-wilson.co.uk
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
(cherry picked from commit d0710abbcd)
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2015-12-22 11:52:27 +02:00
Ville Syrjälä 615cb24326 drm/i915: Drop the broken cursor base==0 special casing
The cursor code tries to treat base==0 to mean disabled. That fails
when the cursor bo gets bound at ggtt offset 0, and the user is left
looking at an invisible cursor.

We lose the disabled->disabled optimization, but that seems like
something better handled at a slightly higher level.

Cc: drm-intel-fixes@lists.freedesktop.org
Cc: Takashi Iwai <tiwai@suse.de>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1450091808-32607-3-git-send-email-ville.syrjala@linux.intel.com
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
(cherry picked from commit 663f3122d0)
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2015-12-22 11:51:28 +02:00
Dave Airlie 0239c75978 Merge tag 'drm-vc4-next-2015-12-21' of http://github.com/anholt/linux into drm-next
I've decided to just send this fixes-for-next pull request now, even if
we don't have a patch for the CONFIG_PM_SLEEP build failure reviewed.
If you like my patch for that, I'd be happy to see it applied directly.

This pull request brings in little fixes from Dan Carpenter for the 3D
support added in this -next cycle.

* tag 'drm-vc4-next-2015-12-21' of http://github.com/anholt/linux:
  drm/vc4: fix an error code
  drm/vc4: allocate enough memory in vc4_save_hang_state()
  drm/vc4: copy_to_user() returns the number of bytes remaining
2015-12-22 16:19:37 +10:00
Alex Deucher eafbbd9883 amd/powerplay: fix copy paste typo in hardwaremanager.c
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 17:13:05 -05:00
Alex Deucher 53d8eabe3d amd/powerplay: disable powerplay by default initially
Hopefully we can enable this by default once we get more
upstream feedback on stability, etc.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 17:07:40 -05:00
Alex Deucher 45b0cf54bc amd/powerplay: don't enable ucode fan control if vbios has no fan table
Some systems have a single fan controlled by ACPI or some other
method.

Reviewed-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:58 -05:00
Rex Zhu 605ed21929 drm/amd/powerplay: show gpu load when print gpu performance for Cz. (v2)
Show GPU load in in the debugfs output.

v2: integrate Tom's optimization

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
2015-12-21 16:42:58 -05:00
Rex Zhu cae9b9c81b drm/amd/powerplay: check whether need to enable thermal control. (v2)
In I+A platform(skylake), it is controlled by intel.

v2: integrate Tom's fix

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
2015-12-21 16:42:57 -05:00
Rex Zhu 88b8dcbe21 drm/amd/powerplay: add point check to avoid NULL point hang.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:57 -05:00
David Rokhvarg c90e5d20fc drm/amdgpu/powerplay: Program a calculated value as Deep Sleep clock.
This replaces programming of a hardcoded value.

Signed-off-by: David Rokhvarg <David.Rokhvarg@amd.com>
2015-12-21 16:42:56 -05:00
Alex Deucher 283b1a8bfb drm/amd/powerplay: Don't return an error if fan table is missing
It's a valid configuration on some laptops.

Reviewed-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:56 -05:00
Alex Deucher aa22ae4b1f drm/powerplay/hwmgr: log errors in tonga_hwmgr_backend_init
Helpful in debugging init issues.

Reviewed-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:55 -05:00
Alex Deucher a71e06d972 drm/powerplay: add debugging output to processpptables.c
To help track down init errors.

Reviewed-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:55 -05:00
Alex Deucher 1d5498c23e drm/powerplay: add debugging output to tonga_processpptables.c
To help track down init errors.

Reviewed-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:54 -05:00
Eric Yang 14f634110f amd/powerplay: Add structures required to report configuration change
Add required structures for amd_powerplay_display_configuration_change

Signed-off-by: Eric Yang <eric.yang2@amd.com>
2015-12-21 16:42:54 -05:00
Vitaly Prosyak 1c9a90820b amd/powerplay: Fix get dal power level
Simplify data struct for get dal power level

Signed-off-by: Vitaly Prosyak <vitaly.prosyak@amd.com>
2015-12-21 16:42:53 -05:00
Vitaly Prosyak c4dd206be1 amd\powerplay Implement get dal power level
Implement get dal power level and simple clock info

Signed-off-by: Vitaly Prosyak <vitaly.prosyak@amd.com>
2015-12-21 16:42:52 -05:00
Rex Zhu 9c5f8de6ef drm/amd/powerplay: display gpu load when print performance for tonga.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
2015-12-21 16:42:52 -05:00
Alex Deucher 898b1dead9 drm/amdgpu/powerplay: enable sysfs and debugfs interfaces late
To avoid users accessing them before the module has finished
initializing them and make sure they are only created if
dpm has properly initialized.

Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:51 -05:00
Rex Zhu 17c00a2fed drm/amd/powerplay: move shared function of vi to hwmgr. (v2)
v2: agd: rebase on upstream

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
2015-12-21 16:42:51 -05:00
Rex Zhu 1ea6c1e8e4 drm/amd/powerplay: check whether enable dpm in powerplay.
Change-Id: I0a2dbf8ef7d4a3e9788fe211fc5964dd2487c519
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
2015-12-21 16:42:50 -05:00
Rex Zhu 7ad4e7f093 drm/amd/powerplay: fix bug that dpm funcs in debugfs/sysfs missing.
in dpm module, sysfs init func move to late_init from sw_init.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>

Change-Id: Ice4a73212d8e3106d05f04a27043820ffd32929e
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
2015-12-21 16:42:50 -05:00
kbuild test robot 195567e99b drm/amd/powerplay: fix boolreturn.cocci warnings
drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/ppatomctrl.c:475:10-11: WARNING: return of 0/1 in function 'atomctrl_lookup_gpio_pin' with return type bool

 Return statements in functions returning bool should use
 true/false instead of 1/0.
Generated by: scripts/coccinelle/misc/boolreturn.cocci

CC: yanyang1 <young.yang@amd.com>
Signed-off-by: Fengguang Wu <fengguang.wu@intel.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:49 -05:00
Eric Huang db18ce397c drm/amd/powerplay: add functions set/get_fan_control_mode in hwmgr for Fiji.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
2015-12-21 16:42:49 -05:00
Eric Huang 9dcfc1936a drm/amd/powerplay: add functions set/get_fan_control_mode in hwmgr for Tonga.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
2015-12-21 16:42:48 -05:00
Eric Huang 7ae0a66134 drm/amd/powerplay: Fix a bug in fan control setting default mode for Tonga and Fiji.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
2015-12-21 16:42:48 -05:00
Eric Huang 601038142f drm/amd/powerplay: Add thermal protection support for Fiji.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
2015-12-21 16:42:47 -05:00
Eric Huang ea617bc9f9 drm/amd/powerplay: add display configeration changed function in hwmgr for Fiji.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
2015-12-21 16:42:47 -05:00
Qiang Yu bd90dd89e5 drm/amdgpu: Prepare DKMS build for powerplay module.
Signed-off-by: Qiang Yu <Qiang.Yu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-12-21 16:42:46 -05:00
Eric Huang 0bbb817618 drm/amd/amdgpu: enable uvd&vce clock gating for Fiji.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
2015-12-21 16:42:46 -05:00
Eric Huang 0689a57013 drm/amd/amdgpu: add vce3.0 clock gating support. (v2)
v2: fix grbm locking

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
2015-12-21 16:42:45 -05:00
Eric Huang 9b08a30647 drm/amd/amdgpu: add uvd6.0 clock gating support. (v2)
v2: fix bug in register mask setting.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
2015-12-21 16:42:45 -05:00
Eric Huang 91c4c98155 drm/amd/powerplay: add multimedia power gating support for Fiji.
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
2015-12-21 16:42:44 -05:00
Jammy Zhou b57fd5663e drm/amdgpu: rename fiji_smumgr.h to fiji_smum.h
This conflicts with fiji_smumgr.h from powerplay
in DKMS environment

Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Jordan Lazare <Jordan.Lazare@amd.com>
2015-12-21 16:42:44 -05:00
Jammy Zhou dbd29f0d85 drm/amdgpu: rename tonga_smumgr.h to tonga_smum.h
This conflicts with the tonga_smumgr.h from powerplay
in DKMS environement

Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Jordan Lazare <Jordan.Lazare@amd.com>
2015-12-21 16:42:43 -05:00
David Rokhvarg 6bd48d2404 drm/amd/powerplay: Add PPLib debug print macro.
- The macro is silent by default.
- Use the macro to print Display Configuration - related changes.

Signed-off-by: David Rokhvarg <David.Rokhvarg@amd.com>
2015-12-21 16:42:42 -05:00
Rex Zhu 0f8b106e11 drm/amd/powerplay: enable/disable NB pstate feature for Carrizo.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: David Rokhvarg <David.Rokhvarg@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-12-21 16:42:42 -05:00
Rex Zhu 73afe62101 drm/amd/powerplay: enable set_cpu_power_state task. (v2)
v2: integrate Jammy's crash fix

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-12-21 16:42:41 -05:00
Rex Zhu 7fb72a1fc0 drm/amd/powerplay: export interface to DAL to init/change display configuration.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: David Rokhvarg <David.Rokhvarg@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-12-21 16:42:41 -05:00
Rex Zhu aceae1bfd9 drm/amd/powerplay: add smc msg for NB P-State switch
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: David Rokhvarg <David.Rokhvarg@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-12-21 16:42:40 -05:00
Rex Zhu 73c9f22288 drm/amd/powerplay: add new function point in hwmgr.
1. for set_cpu_power_state
2. restore display configuration

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-12-21 16:42:40 -05:00
Tom St Denis 9c97e75f0f amdgpu/powerplay: Add Stoney to list of early init cases
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:39 -05:00
Rex Zhu c9fe74e68b drm/amd/powerplay: fix warning of cast to pointer from integer of different size.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:39 -05:00
rezhu 09b7a98622 drm/amd/powerplay: fix warning of cast to pointer from integer of different size.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:38 -05:00
Alex Deucher 9c0bad9074 drm/amd/powerplay: implement smc state upload for CZ
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:38 -05:00
Alex Deucher d39d5c2c9d drm/amd/powerplay: add atomctrl function to calculate CZ sclk dividers
Use atombios to calculate the values.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:37 -05:00
Eric Huang 92b05d827d drm/amd/powerplay: enable clock gating for Fiji.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
2015-12-21 16:42:37 -05:00
Eric Huang 6cec2655fa drm/amd/powerplay: add parts of system clock gating support for Fiji. (v2)
Removed fiji_mgcg_cgcg_init that is affected and redundant for new implementation.

v2: re-add mgcg_cgcg init

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
2015-12-21 16:42:36 -05:00
Eric Huang 3c997d2412 drm/amdgpu: add sdma clock gating support for Fiji.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
2015-12-21 16:42:36 -05:00
Eric Huang a0d69786b5 drm/amd/amdgpu: add gmc clock gating support for Fiji.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
2015-12-21 16:42:35 -05:00
Eric Huang 6e378858df drm/amd/amdgpu: add gfx clock gating support for Fiji.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
2015-12-21 16:42:35 -05:00
Alex Deucher 0104aa21a9 drm/amd/powerplay/tonga: Add UVD DPM init
Load the UVD DPM state into the SMC.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:34 -05:00
kbuild test robot 62a03f6d58 drm/amd/powerplay: fix boolreturn.cocci warnings
drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/tonga_hwmgr.c:2653:9-10: WARNING: return of 0/1 in function 'is_pcie_gen2_supported' with return type bool
drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/tonga_hwmgr.c:2645:9-10: WARNING: return of 0/1 in function 'is_pcie_gen3_supported' with return type bool

 Return statements in functions returning bool should use
 true/false instead of 1/0.
Generated by: scripts/coccinelle/misc/boolreturn.cocci

CC: yanyang1 <young.yang@amd.com>
Signed-off-by: Fengguang Wu <fengguang.wu@intel.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:34 -05:00
Alex Deucher 464cea3e35 drm/amdgpu/powerplay/fiji: query supported pcie info from cgs (v2)
Rather than hardcode it.

v2: integrate spc fix from Rex

Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:33 -05:00
Alex Deucher 834b694cc3 drm/amdgpu/powerplay/tonga: query supported pcie info from cgs (v2)
Rather than hardcode it.

v2: integrate spc fix from Rex

Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:33 -05:00
Alex Deucher cfd316d59e drm/amdgpu/cgs: add sys info query for pcie gen and link width
Needed by powerplay to properly handle pcie dpm switching.

Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:32 -05:00
Alex Deucher d0dd7f0cc3 drm/amdgpu: store pcie gen mask and link width
We'll need this later for pcie dpm.

Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:32 -05:00
Alex Deucher 60d8edd415 drm: add drm_pcie_get_max_link_width helper (v2)
Add a helper to get the max link width of the port.
Similar to the helper to get the max link speed.

v2: fix typo in commit message

Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:31 -05:00
Alex Deucher 16881da6c0 drm/amdgpu: extract pcie helpers to common header
These will be used by multiple powerplay drivers and
other IP modules.

Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:30 -05:00
Alex Deucher 74c577b031 drm/amd/powerplay/fiji: enable pcie and mclk forcing for low
When forcing the lowest state also force mclk and pcie.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:30 -05:00
Alex Deucher 9fe1837d18 drm/amd/powerplay/tonga: enable pcie and mclk forcing for low
When forcing the lowest state also force mclk and pcie.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:29 -05:00
Rex Zhu f4caf3e584 drm/amd/powerplay: refine the logic of whether need to update power state.
Better handle power state changes.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-12-21 16:42:29 -05:00
Rex Zhu e829ecdb15 drm/amd/powerplay: implement new funcs to check current states for tonga.
Implement the new callbacks for tonga.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-12-21 16:42:28 -05:00
Rex Zhu 09b4c872fe drm/amd/powerplay: add and export hwmgr interface to eventmgr to check hw states.
Interface between hwmgr and eventmgr.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-12-21 16:42:28 -05:00
Jammy Zhou e61710c59d drm/amdgpu: support per device powerplay enablement (v2)
The amdgu_powerplay variable is global for multiple GPU instances.

v2: fold in Flora's module option change, protect adev reference in
macros

Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-12-21 16:42:27 -05:00
Rex Zhu 8804b8d5b0 drm/amdgpu: enable sysfs interface for powerplay
Same interface exposed in pre-powerplay dpm code.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:27 -05:00
Rex Zhu 3af76f23a4 drm/amdgpu: export fan control functions to amdgpu
Hook up the amdgpu thermal control callbacks for powerplay.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:26 -05:00
Rex Zhu cac9a19919 drm/amdgpu/powerplay: implement fan control interface in amd_powerplay_funcs
This adds the interface needed to expose powerplay fan control to sysfs
via hwmon.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:26 -05:00
Rex Zhu 1e4854e96c drm/amdgpu/powerplay: implement thermal control for tonga.
Implement thermal and fan control for tonga.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:25 -05:00
Rex Zhu 2dfea9cd1f drm/amdgpu/powerplay: enable thermal interrupt task in eventmgr.
Add thermal handling to the event manager.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:25 -05:00
Rex Zhu fba4eef584 drm/amdgpu/powerplay: add thermal control interface in hwmgr.
Thermal controller interface.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:24 -05:00
Rex Zhu 251bb34fa4 drm/amdgpu/powerplay: mv ppinterrupt.h to inc folder to share with other submodule.
Redefine interrupt callback function in accordance with cgs.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:24 -05:00
Rex Zhu c28eae26b5 drm/amdgpu/powerplay: add new function point in hwmgr_funcs for thermal control
Add the interface for fan and thermal control.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:23 -05:00
Rex Zhu 0859ed3db9 drm/amd/powerplay: Add CG and PG support for tonga
Implement clock and power gating support for tonga.  On Tonga
this is handles by the SMU rather than direct register settings
in the driver.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:23 -05:00
Rex Zhu b1132013ce drm/amd/powerplay: add new function point in hwmgr_func for CG/PG.
Add callbacks interface for clock and powergating.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:22 -05:00
Rex Zhu 3cec76f973 drm/amdgpu/powerplay: add some definition for other ip block to update cg pg.
Interface for clock and power gating handling.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:22 -05:00
Rex Zhu edb611c1e1 drm/amdgpu: enable powerplay module by default for fiji.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:21 -05:00
Rex Zhu 76c8cc6b3b drm/amdgpu: enable powerplay module by default for tonga.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:21 -05:00
Rex Zhu bbb207f3da drm/amdgpu/powerplay: program display gap for tonga.
Implement displaygap programming for tonga.  This is
required for properly mclk switching.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:20 -05:00
Rex Zhu 2f4afc5733 drm/amdgpu/powerplay: implement pem_task for display_configuration_change
Add support for display configuration changes to the event manager.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:19 -05:00
Rex Zhu 6f3bf7474c drm/amdgpu/poweprlay: export program display gap function to eventmgr
This allows the eventmgr to properly update the displaygap on
certain power events.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:19 -05:00
Rex Zhu e8c7de5bf6 drm/amdgpu/powerplay: add function point in hwmgr_funcs for program display gap
Displaygap support is required for proper mclk switching.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:18 -05:00
Eric Huang 899fa4c04e drm/amd/amdgpu: enable powerplay and smc firmware loading for Fiji.
Switch over to handling in the powerplay module.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
2015-12-21 16:42:18 -05:00
Jammy Zhou 3a74f6f273 drm/amdgpu: add amdgpu.powerplay module option
This option can be used to enable the new powerplay implementation,
and it is disabled by default.

Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:17 -05:00
Eric Huang aabcb7c11e drm/amd/powerplay: add Fiji DPM support.
This enabled DPM support for Fiji.  DPM is dynamic
clock and voltage scaling.

v2: rename fiji_hwmgr_early_init to fiji_hwmgr_init
v3: (agd) fold in endian fix, additional function addition

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
2015-12-21 16:42:17 -05:00
Eric Huang 74785623db drm/amd/powerplay: add Fiji SMU support.
Add support for the SMU manager for Fiji. This handles the
firmware loading for other IP blocks (GFX, SDMA, etc.).

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
2015-12-21 16:42:16 -05:00
Eric Huang 3ec2cdb85f drm/amd/powerplay: update atomctrl for fiji
Add some new functions to support Fiji.  Split out
from the previous patch.

Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
2015-12-21 16:42:16 -05:00
Eric Huang 770911a3cf drm/amd/powerplay: add/update headers for Fiji SMU and DPM
New headers for Fiji.

Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
2015-12-21 16:42:15 -05:00
yanyang1 c82baa2818 drm/amd/powerplay: add Tonga dpm support (v3)
This implements DPM for tonga.  DPM handles dynamic
clock and voltage scaling.

v2: merge all the patches related with tonga dpm
v3: merge dpm force level fix, cgs display fix, spelling fix

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: yanyang1 <young.yang@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
2015-12-21 16:42:15 -05:00
Jammy Zhou 1060029fae drm/amd/powerplay: Add Tonga SMU support
The SMU manager handles firmware loading for other IP
blocks (GFX, SDMA, etc.).  This implements it for Tonga.

v3: delete peci sub-module
v2: use cgs interface directly

Signed-off-by: Young Yang <Young.Yang@amd.com>
Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:14 -05:00
yanyang1 306d8db3e7 drm/amd/powerplay: add header file for tonga smu and dpm
These headers provide the SMU interface used by the driver.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: yanyang1 <young.yang@amd.com>
2015-12-21 16:42:14 -05:00
yanyang1 7ff1d70a40 drm/amd/powerplay: Move smu7*.h from amdgpu to powerplay.
Move smu7.h, smu7_discrete.h and smu7_fusion.h from amdgpu to powerplay.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: yanyang1 <young.yang@amd.com>
2015-12-21 16:42:13 -05:00
yanyang1 3a287055ae drm/amd/powerplay: Add ixSWRST_COMMAND_1 in bif_5_0_d.h
Add ixSWRST_COMMAND_1 in bif_5_0_d.h.  Required by
new powerplay code for tonga and fiji.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: yanyang1 <young.yang@amd.com>
2015-12-21 16:42:12 -05:00
Rex Zhu 577bbe0183 drm/amd/powerplay: implement functions of amd_powerplay_func
This is the common interface for interacting with the powerplay
module.

v2: squash in fixes

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:12 -05:00
Rex Zhu e92a037057 drm/amd/powerplay: add event manager sub-component
The event manager handles power related driver events.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:11 -05:00
Rex Zhu 28a18bab2e drm/amd/powerplay: add CG and PG support for carrizo
This adds clock and powergating support for CZ.

v2: squash in fixes

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:11 -05:00
Jammy Zhou bdecc20a98 drm/amd/powerplay: add Carrizo dpm support
This patch enables basic DPM support for Carrizo.
DPM handles dynamic clock and voltage scaling.

v3: delete peci sub-module
v2: use cgs interface directly
    correct define SMU_EnabledFeatureScoreboard_SclkDpmOn

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:10 -05:00
Jammy Zhou 4630f0faae drm/amd/powerplay: add Carrizo smu support
This implements the SMU firmware manager interface for CZ.
Some header files are moved from amdgpu folder to powerplay as well.

v3: delete peci sub-module.
v2: use cgs interface directly
    add load_mec_firmware function

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:10 -05:00
Jammy Zhou 3bace35914 drm/amd/powerplay: add hardware manager sub-component
The hwmgr handles all hardware related calls, including clock/power
gating control, DPM, read and parse PPTable, etc.

v5: squash in fixes
v4: implement acpi's atcs function use cgs interface
v3: fix code style error and add big-endian mode support.
v2: use cgs interface directly in hwmgr sub-module

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:09 -05:00
Jammy Zhou ac885b3a20 drm/amd/powerplay: add SMU manager sub-component
The SMUMGR is one sub-component of powerplay for SMU firmware support.
The SMU handles firmware loading for other IP blocks (GFX, SDMA, etc.)
on VI parts.  The adds the core powerplay infrastructure to handle that.

v3: direct use printk in powerplay module.
v2: direct use cgs_read/write_register functions in smu-modules

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:09 -05:00
Rex Zhu 1b5708ffb1 drm/amdgpu: export amd_powerplay_func to amdgpu and other ip block
Update amdgpu to deal with the new powerplay module properly.

v2: squash in fixes
v3: squash in Rex's power state reporting fix

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:08 -05:00
Rex Zhu ba5c2a87b0 drm/amdgpu: disable legacy path of firmware check if powerplay is enabled
Powerplay will use a different interface once it's integrated.  These
legacy pathes will be removed once powerplay is enabled by default.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:08 -05:00
Alex Deucher 1f7371b2a5 drm/amd/powerplay: add basic powerplay framework
amdgpu_pp_ip_funcs is introduced to handle the two code paths,
the legacy one and the new powerplay implementation.

CONFIG_DRM_AMD_POWERPLAY kernel configuration option is
introduced for the powerplay component.

v4: squash in fixes
v3: register debugfs file when powerplay module enable
v2: add amdgpu_ucode_init_bo in hw init when amdgpu_powerplay enable.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:07 -05:00
Rex Zhu 47bf18b5b2 drm/amdgpu: add new cgs interface to get display info (v2)
Add new CGS interfaces to query display info across modules.
This is nedded by the powerplay module for synchronizing with
the display module.

v2: (agd): fold in refresh rate fix, rebase

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:07 -05:00
Rex Zhu 5e6186991a drm/amdgpu: implement cgs interface to query system info
Add a query to get the bus number and function of the
device.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-12-21 16:42:06 -05:00
Rex Zhu 3f1d35a03b drm/amdgpu: implement new cgs interface for acpi function
Add a new driver internal interface for accessing ACPI
methods.  These will be used by various new components
including powerplay.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:06 -05:00
Rex Zhu 66dc0ddd02 drm/amdgpu: mv amdgpu_acpi.h to amd/include/amd_acpi.h
This will be shared with the new powerplay module.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:05 -05:00
Rex Zhu 7e85be9948 drm/amdgpu: mv some definition from amdgpu_acpi.c to amdgpu_acpi.h
These will be shared with the new powerplay module.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:05 -05:00
Rex Zhu 3a2c788d95 drm/amdgpu: share struct amdgpu_pm_state_type with powerplay module
rename amdgpu_pm_state_type to amd_pm_state_type

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:42:04 -05:00
Alex Deucher 0eb1c3d408 drm/radeon: clean up fujitsu quirks
Combine the two quirks.

bug:
https://bugzilla.kernel.org/show_bug.cgi?id=109481

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2015-12-21 16:39:15 -05:00
Felix Kuehling 005ae95e6e drm/amdgpu: Fix off-by-one errors in amdgpu_vm_bo_map
eaddr is sometimes treated as the last address inside the address
range, and sometimes as the first address outside the range. This
was resulting in errors when a test filled up the entire address
space. Make it consistent to always be the last address within the
range.

Signed-off-by: Felix.Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Cc: stable@vger.kernel.org
2015-12-21 16:39:14 -05:00
Felix Kuehling 42ef344c09 drm/radeon: Fix off-by-one errors in radeon_vm_bo_set_addr
eoffset is sometimes treated as the last address inside the address
range, and sometimes as the first address outside the range. This
was resulting in errors when a test filled up the entire address
space. Make it consistent to always be the last address within the
range. Also fixed related errors when checking the VA limit and in
radeon_vm_fence_pts.

Signed-off-by: Felix.Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Cc: stable@vger.kernel.org
2015-12-21 16:39:14 -05:00
Alex Deucher 092c96a8ab drm/radeon: fix dp link rate selection (v2)
Need to properly handle the max link rate in the dpcd.
This prevents some cases where 5.4 Ghz is selected when
it shouldn't be.

v2: simplify logic, add array bounds check

Reviewed-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:39:02 -05:00
Alex Deucher 41869c1c7f drm/amdgpu: fix dp link rate selection (v2)
Need to properly handle the max link rate in the dpcd.
This prevents some cases where 5.4 Ghz is selected when
it shouldn't be.

v2: simplify logic, add array bounds check

Reviewed-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-21 16:38:51 -05:00
Matt Roper 7118fd9bd9 drm/fb-helper: Use proper plane mask for fb cleanup
pan_display_atomic() calls drm_atomic_clean_old_fb() to sanitize the
legacy FB fields (plane->fb and plane->old_fb).  However it was building
the plane mask to pass to this function incorrectly (the bitwise OR was
using plane indices rather than plane masks).  The end result was that
sometimes the legacy pointers would become out of sync with the atomic
pointers.  If another operation tried to re-set the same FB onto the
plane, we might end up with the pointers back in sync, but improper
reference counts, which would eventually lead to system crashes when we
accessed a pointer to a prematurely-destroyed FB.

The cause here was a very subtle bug introduced in commit:

        commit 07d3bad6c1
        Author: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
        Date:   Wed Nov 11 11:29:11 2015 +0100

            drm/core: Fix old_fb handling in pan_display_atomic.

I found the crashes were most easily reproduced (on i915 at least) by
starting X and then VT switching to a VT that wasn't running a console
instance...the sequence of vt/fbcon entries that happen in that case
trigger a reference count mismatch and crash the system.

Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93313
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2015-12-21 09:54:49 +01:00
Andrzej Hajda c4e074074c drm/exynos: atomic check only enabled crtc states
Since atomic check is called also for disabled crtcs it should skip
mode checking as it can be uninitialized. The patch fixes it.

Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Suggested-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Tested-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
2015-12-20 01:39:10 +09:00
Dave Airlie 6545f31897 Merge branch 'linux-4.4' of git://github.com/skeggsb/linux into drm-fixes
single nouveau fix.

* 'linux-4.4' of git://github.com/skeggsb/linux:
  drm/nouveau/bios/fan: hardcode the fan mode to linear
2015-12-19 13:25:42 +10:00