New functionality
* A new modifier to indicate that a rotation is relative to either
true or magnetic north. This is to be used by some magnetometers
that provide data in this way.
* hid magnetometer now supports output rotations from various variants on
North
* HMC5843 driver converted to regmap and reworked to allow easy support
of other similar devices. Support for HMC5983 added via both i2c and SPI.
* Rework of Exynos driver to simplify extension to support more devices.
* Addition of support for the Exynos3250 ADC (which requires an additional
clock) Support for quite a few more devices on its way.
Cleanups
* ad7997 - a number of cleanups and tweaks to how the events are controlled
to make it more intuitive.
* kxcjk - cleanups and minor fixes for this new driver.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIcBAABAgAGBQJT0VkRAAoJEFSFNJnE9BaIVmwP/i9/kzwHaXr09GbOMoUNlnuP
4wU+qJTucPOlj0rNvE6VewOshkF5G1soMAc97MAlEL12mU0qXt+q9m9xu7aVnQwF
FU87BECdmbWVSIfGnCwkm2PzN+zLmGKr/TTPdCa+kuX1WIq7tUfVwYJVqU7vxDde
n1G5Rx3sbujwAd/kP5X0Bk35X2Wng4Af0f3tkuoRC8nFWCxXN1qW9VZHlJCp5UIh
c4J1COUeANf26CnMbgz3qqumGtYX1gbGHi3zzD4vYxD+inqKtvg/pqTqge3J7E9D
HBhyNn0Rd3m2DDoz/5fRQ5z/5CAKLkpsqJa9ZsYLzzmo3AHUDYoVA6tGIoExhW9q
7P8FJgJx0Gc58V/A0Y48vcHAcqinoL+2vphc5BHZXA2wdeVHZxWO3e7HX7KUmr55
AXlHowFf0VKoJjJtcfFkFjalF5flIfyA7Kiu+10kptj8wsoX+AjUHXPYDfeRxw+S
7nkr/7janHvsBhoP83PqPdRSrlnNPiLJSl8ZIgegVpKOBtsRKJLGW4zlwTp1lchr
M1ydD9eh3uUT3luKRCJzoXo60Ia15x3KBrZxIkQiORIW2otlfUm7dduICc4p9Ij7
RjU8S1NbOVZiD8fNcbmnFp0Xj3cGf4K/Jf1Jvs/QrGB2GAuYoF48BIyeaHj0tCr8
n4wJtDu+aly6vzM7Kf8d
=iOto
-----END PGP SIGNATURE-----
Merge tag 'iio-for-3.17d' of git://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio into staging-next
Jonathan writes:
Fourth round of IIO new drivers, functionality and cleanups for the 3.17 cycle
New functionality
* A new modifier to indicate that a rotation is relative to either
true or magnetic north. This is to be used by some magnetometers
that provide data in this way.
* hid magnetometer now supports output rotations from various variants on
North
* HMC5843 driver converted to regmap and reworked to allow easy support
of other similar devices. Support for HMC5983 added via both i2c and SPI.
* Rework of Exynos driver to simplify extension to support more devices.
* Addition of support for the Exynos3250 ADC (which requires an additional
clock) Support for quite a few more devices on its way.
Cleanups
* ad7997 - a number of cleanups and tweaks to how the events are controlled
to make it more intuitive.
* kxcjk - cleanups and minor fixes for this new driver.
Broadcom Brahma-B15 (r0p0..r0p2) is also affected by Cortex-A15
erratum 798181, so enable the workaround for Brahma-B15.
Signed-off-by: Gregory Fong <gregory.0xf0@gmail.com>
Acked-by: Marc Carino <marc.ceeeee@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Cc: Rob Herring <rob.herring@calxeda.com>
Cc: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This fixes the following warning:
warning: (ARCH_MULTIPLATFORM && ARCH_INTEGRATOR && ARCH_SHMOBILE_LEGACY) selects ARM_PATCH_PHYS_VIRT which has unmet direct dependencies (!XIP_KERNEL && MMU && (!ARCH_REALVIEW || !SPARSEMEM))
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Perform any CPU-specific initialization required on the
Broadcom Brahma-15 core.
Signed-off-by: Marc Carino <marc.ceeeee@gmail.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
For LPAE, we have the following means for encoding writable or dirty
ptes:
L_PTE_DIRTY L_PTE_RDONLY
!pte_dirty && !pte_write 0 1
!pte_dirty && pte_write 0 1
pte_dirty && !pte_write 1 1
pte_dirty && pte_write 1 0
So we can't distinguish between writeable clean ptes and read only
ptes. This can cause problems with ptes being incorrectly flagged as
read only when they are writeable but not dirty.
This patch renumbers L_PTE_RDONLY from AP[2] to a software bit #58,
and adds additional logic to set AP[2] whenever the pte is read only
or not dirty. That way we can distinguish between clean writeable ptes
and read only ptes.
HugeTLB pages will use this new logic automatically.
We need to add some logic to Transparent HugePages to ensure that they
correctly interpret the revised pgprot permissions (L_PTE_RDONLY has
moved and no longer matches PMD_SECT_AP2). In the process of revising
THP, the names of the PMD software bits have been prefixed with L_ to
make them easier to distinguish from their hardware bit counterparts.
Signed-off-by: Steve Capper <steve.capper@linaro.org>
Reviewed-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Long descriptors on ARM are 64 bits, and some pte functions such as
pte_dirty return a bitwise-and of a flag with the pte value. If the
flag to be tested resides in the upper 32 bits of the pte, then we run
into the danger of the result being dropped if downcast.
For example:
gather_stats(page, md, pte_dirty(*pte), 1);
where pte_dirty(*pte) is downcast to an int.
This patch introduces a new macro pte_isset which performs the bitwise
and, then performs a double logical invert (where needed) to ensure
predictable downcasting. The logical inverse pte_isclear is also
introduced.
Equivalent pmd functions for Transparent HugePages have also been
added.
Signed-off-by: Steve Capper <steve.capper@linaro.org>
Reviewed-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
- L2 cache regression fix for a warning about trying to access
a read-only register
- GPMC ECC software fallback regression fix for omap3
- Fix for dra7 pinctrl pull-up direction that causes signal issues
for anybody trying to use the internal pull up or down
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJT0PDDAAoJEBvUPslcq6Vz2kkP/2XcaWEl5xWEP6vTFDwy1RDL
apjp2qURWpJ579bT5y5KlGP8vyBeSLfdXl+ccCuHhBrRtYCZfsUdRaii/AHDcsd/
N0p1ZaAQLwfMXUo1sVgW2grSOJEo8QZs8DEZ7eJfE8SnH2g/i4j+VFknYOO1t6vA
+QoHRWcY0CRLNVHSyGGFk235pfdq1ZAKskayzQ4wCjOXuH2tKILjFsiCxItPStih
CmKqZCoO+BQMz7dLTGZsdchDTqf0PceMh7w6PWO65QeJxr16nWmGbqnZRlUGeBqo
vTZO1Rsfb4DlRYRGBxJ1ybVJw2cgmsx8fWKv4eYVrulGNKUE2m3UYj+oYCst0g5i
VOPMwLiLapciCZi/4er2VWtb9sFWY6XaTAJHVRtrtX6RZgZC5c3cWGzkykXOkF7N
Ut7He/TT41uc5OIjuG6WGQNCIfKOmfBcSDeNRqyr9YzZpn6lbJ+U4kk0kco1pyda
IHrRUD+yHuXK0FjZvZMDlWmKqP3QLK+xjL7LRzsiJ4yfymikckjS2RH0iP9PGuCV
T68PPl+rzyHjmVUnbBCgLnatTAQ9uHPCb4Eb5rRZaiO+4nUyqeqikMWU/DsiS4jc
1igudgOx53/0zCCQC/VHVL9HGb4fSrbevMzq8YR3uyyS2b/R8FFbGs6Y6TCIDWdi
TUSv/ckpA4uUbe22SFTn
=/FMt
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v3.16/fixes-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes
Merge "Two regression fixes for omaps and one fix for device
signaling" from Tony Lindgren:
- L2 cache regression fix for a warning about trying to access
a read-only register
- GPMC ECC software fallback regression fix for omap3
- Fix for dra7 pinctrl pull-up direction that causes signal issues
for anybody trying to use the internal pull up or down
* tag 'omap-for-v3.16/fixes-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP2+: gpmc: fix gpmc_hwecc_bch_capable()
pinctrl: dra: dt-bindings: Fix pull enable/disable
ARM: OMAP2+: l2c: squelch warning dump on power control setting
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Unlike the Armada XP and the Armada 370, this SoC uses a Cortex A9
core. Consequently, the procedure to enter the idle state is
different: interaction with the SCU, not disabling snooping, etc.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: https://lkml.kernel.org/r/1406120453-29291-16-git-send-email-thomas.petazzoni@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
This commit introduces the cpuidle support for Armada 370. The main
difference compared to the already supported Armada XP is that the
Armada 370 has an issue caused by "a slow exit process from the deep
idle state due to heavy L1/L2 cache cleanup operations performed by
the BootROM software" (cf errata GL-BootROM-10).
To work around this issue, we replace the restart code of the BootROM
by some custom code located in an internal SRAM. For this purpose, we
use the common function mvebu_boot_addr_wa() introduced in the commit
"ARM: mvebu: Add a common function for the boot address work around".
The message in case of failure to suspend the system was switched from
the warn level to the debug level. Indeed due to the "slow exit
process from the deep idle state" in Armada 370, this situation
happens quite often. Using the debug level avoids spamming the kernel
logs, but still allows to enable it if needed.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: https://lkml.kernel.org/r/1406120453-29291-15-git-send-email-thomas.petazzoni@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
This driver will be able to manage the cpuidle for more SoCs than just
Armada 370 and XP. It will also support Armada 38x and potentially
other SoC of the Marvell Armada EBU family. To take this into account,
this patch renames the driver and its symbols.
It also changes the driver name from cpuidle-armada-370-xp to
cpuidle-armada-xp, because separate platform drivers will be
registered for the other SoC types. This change must be done
simultaneously in the cpuidle driver and in the PMSU code in order to
remain bisectable.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lkml.kernel.org/r/1406120453-29291-12-git-send-email-thomas.petazzoni@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
The SCU address will be needed in other files than board-v7.c,
especially in pmsu.c for cpuidle related activities. So this patch
adds a function that allows to retrieve the virtual address at which
the SCU has been mapped.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: https://lkml.kernel.org/r/1406120453-29291-10-git-send-email-thomas.petazzoni@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
On some mvebu v7 SoCs (the ones using a Cortex-A9 core and not a PJ4B
core), the snoop disabling feature does not exist as the hardware
coherency is handled in a different way. Therefore, in preparation to
the introduction of the cpuidle support for those SoCs, this commit
modifies the mvebu_v7_psmu_idle_prepare() function to take several
flags, which allow to decide whether snooping should be disabled, and
whether we should use the deep idle mode or not.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: https://lkml.kernel.org/r/1406120453-29291-9-git-send-email-thomas.petazzoni@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
The resume address used by the cpuidle code will not always be the
same depending on the SoC. Using a local variable to store the resume
address allows to keep the same function for the PM notifier but with
a different address. This address will be set during the
initialization of the cpuidle logic in pmsu.c.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: https://lkml.kernel.org/r/1406120453-29291-8-git-send-email-thomas.petazzoni@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
In preparation to the addition of the cpuidle support for more SoCs,
this patch moves the Armada XP specific initialization to a separate
function.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: https://lkml.kernel.org/r/1406120453-29291-7-git-send-email-thomas.petazzoni@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Most of the function related to the PMSU are not specific to the
Armada 370 or Armada XP SoCs. They can also be used for most of the
other mvebu ARMv7 SoCs, and will actually be used to support cpuidle
on Armada 38x.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: https://lkml.kernel.org/r/1406120453-29291-6-git-send-email-thomas.petazzoni@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Use the common function mvebu_setup_boot_addr_wa() introduced in the
commit "ARM: mvebu: Add a common function for the boot address work
around" instead of the dedicated version for Armada 375.
This commit also moves the workaround in the system-controller
module. Indeed the workaround on 375 is really related to setting the
boot address which is done by the system controller.
As a bonus we no longer use an harcoded value to access the register
storing the boot address.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: https://lkml.kernel.org/r/1406120453-29291-5-git-send-email-thomas.petazzoni@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
On some of the mvebu SoCs and due to internal BootROM issue, the CPU
initial jump code must be placed in the SRAM memory of the SoC. In
order to achieve this, we have to unmap the BootROM and at some
specific location where the BootROM was placed, create a dedicated
MBus window for the SRAM. This SRAM is initialized with a few
instructions of code that allows to jump to the real secondary CPU
boot address. The SRAM used is the Crypto engine one.
This work around is currently needed for booting SMP on Armada 375 Z1
and will be needed for cpuidle support on Armada 370. Instead of
duplicating the same code, this commit introduces a common function to
handle it: mvebu_setup_boot_addr_wa().
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: https://lkml.kernel.org/r/1406120453-29291-4-git-send-email-thomas.petazzoni@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Sorting the headers in alphabetic order will help to reduce conflicts
when adding new headers later.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: https://lkml.kernel.org/r/1406120453-29291-3-git-send-email-thomas.petazzoni@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
do_armada_370_xp_cpu_suspend() and armada_370_xp_pmsu_idle_prepare(),
have been merged into a single function called
armada_370_xp_pmsu_idle_enter() by the commit "bbb92284b6c8 ARM:
mvebu: slightly refactor/rename PMSU idle related functions", in
prepare for the introduction of the CPU hotplug support for Armada XP.
But for cpuidle the prepare function will be common to all the mvebu
SoCs that use the PMSU, while the suspend function will be specific to
each SoC. Keeping the prepare function separate will help reducing
code duplication while new SoC support is added.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: https://lkml.kernel.org/r/1406120453-29291-2-git-send-email-thomas.petazzoni@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* Fix SD2CKCR register address of r8a7791 (R-Car M2) SoC
This corrects a bug introduced in v3.14 by
59e79895b9 ("ARM: shmobile: r8a7791: Add clocks").
However, it does not manifest in mainline code until
SDHI devices were enabled on the Koelsch board in v3.15 by
2c60a7df72 ("ARM: shmobile: Add SDHI devices for Koelsch DTS").
It also manifests on the Henninger board when
SDHI devices were enabled in v3.16-rc1 by
1299df03d7 ("ARM: shmobile: henninger: add SDHI0/2 DT support")
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJT0FapAAoJENfPZGlqN0++socQAI25b++UQ89EiUQE/98yB/vq
ma63gl346dXdv6lb8iN+rx9Vk3wtzNuroozds2iulmAnutMTdQ83huektaYdPkQ4
T+RxOl4liJUbQRBg2+8UBtiaTB+oGQWbRkqt/MOvniTbOqYKs71Oym901ULlQMKL
9RSyWORUx5x2c+zZMJ0eU8T6Bl9hf0P0ikHwUv9ZYIQzrYxjJubdmyVoNI6slxF9
S4O4sUZfOSVqfSis5rEfWgG29jBYjlGdTyFXp1+kE19J02wikGRTjgM9bWkxarrF
wfa+ZQXjMywsdY8rCSxeNEYFuS3NW7s4ylRIC4UfpvSg1cvNVVE5m4BK0E2IOIyJ
kW/zSimYfh/RJSX+HMZ2hfipvFDE6dDOL5PHpwJ8fhWfM5Yinn1Wgfa2mUDxsPFe
CAfhtiTB56Rhzo+ln9UcNwaakZs/uSsG0jq3lI2zNTUd+1VMS+7xB/3pdKQjDGo/
75+UKvdcqJ4yprfcvKwIp0LsJCKWIm1hQTqSFWuYfpVaNbM+9CFQculw0YZxOWxc
xFr3LznFidUJCHKiM4ngnPBsLfDCdjVU5MyqDXcW9iVEKeSQJJ01CCORA4MjTUT5
niZEMcAoIMaeXeuVnL5FlRK5Owd6SgryWpy4XUlf+ioGLLE5EzuLqA9TJe4eo41P
caa5gpyUDbTjH1J4GktY
=SQyi
-----END PGP SIGNATURE-----
Merge tag 'renesas-fixes2-for-v3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into fixes
Merge "Second Round of Renesas ARM Based SoC Fixes for v3.16" from Simon Horman
* Fix SD2CKCR register address of r8a7791 (R-Car M2) SoC
This corrects a bug introduced in v3.14 by
59e79895b9 ("ARM: shmobile: r8a7791: Add clocks").
However, it does not manifest in mainline code until
SDHI devices were enabled on the Koelsch board in v3.15 by
2c60a7df72 ("ARM: shmobile: Add SDHI devices for Koelsch DTS").
It also manifests on the Henninger board when
SDHI devices were enabled in v3.16-rc1 by
1299df03d7 ("ARM: shmobile: henninger: add SDHI0/2 DT support")
* tag 'renesas-fixes2-for-v3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: r8a7791: Fix SD2CKCR register address
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
A number of board files in arch/arm and arch/unicore32
explicitly reference platform_bus device as a parent
for new platform devices.
This is unnecessary, as platform device API guarantees
that devices with NULL parent are going to by adopted
by the mentioned "root" device.
This patch removes or replaces with NULL such references.
Signed-off-by: Pawel Moll <pawel.moll@arm.com>
Acked-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Use the nanoseconds based interface instead of converting from a
timespec.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: John Stultz <john.stultz@linaro.org>
This patchset fix wrong compatible string for Exynos3250 ADC. Exynos3250 SoC
need to control only special clock for ADC. Exynos SoC except for Exynos3250
has not included special clock for ADC. The exynos ADC driver can control
special clock if compatible string is 'exynos3250-adc-v2'.
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
Merge basic support for the Mediatek Cortex-A7 SoCs from Matthias Brugger:
Support is quite basic, as the only component working up to now are the
timers.
* tag 'v3.17-next-mediatek-support' of https://github.com/mbgg/linux-mediatek:
arm: mediatek: add dts for Aquaris5 mobile phone
dt-bindings: add documentation for Mediatek SoC
arm: add basic support for Mediatek MT6589 boards
Signed-off-by: Matthias Brugger matthias.bgg@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Armada 375
- Fix ethernet aliases for new node added for v3.17
- Add missing MDIO clock for new node added for v3.17
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIcBAABAgAGBQJTz6X+AAoJEP45WPkGe8ZnjT4QAKDmMMYP6bSILe4JpGFeEwp/
9so3aFCkRMmM9ENgZmXU93hiAIMtmofivU7hHBz+IevFmK2KkoxLxIDfQjhandS1
7ek5U5T+e6wzq8GGW3tYKMZiqsT0LpE1sJurcq4k13zYML2DO6YDZr19bIa9fZLL
DWuj+QvFZUHvuoXYioKU9OyfoREHkImD3DDdPSYeGpDF/lOUrFFqhIG9ZDhuZEhw
G5PAgfqXyHZtxJX4LvZUxFTOIhoefVOCt4519sjFBOpjKW3urZRsYLnUTO/Q1+Fc
O/8Y5U3GSyYJ+LKxxqYNZuWReZ+wZ+WCoKmP5O4bLwl4hJwo7bciYMEtLdP4Q22A
K4JzGNPX4d6quLLIpRg3Jl0lf0FBQhZu57S8oNa5jUy2oTCGL7a2bf5CMlBeIzGV
hjPMboHV+yJeJ+t78npa8hrrLQtS/Oky574C2EBqkaXXKAj4fq6VNMkza7m6XvYA
imgD/jlU417GRhHwu+lPFqcaTdptWfc1s4TrOaXoWOy5a/KdwxJTQvH3lS+QoME7
smNI4+sUeyjkk2gpKPHC5yg1gU56B242aQ2EgNgljZ+x3YIjhodA7RKK1ylFEYSe
jJmSGeeGhdaumvxbTV95lHMgW/M6ODofaPAgYT4jXuNB6SelT9iezG4WV/rbSOOe
gIGE5Mv9dldojbwJSK85
=y5gn
-----END PGP SIGNATURE-----
Merge tag 'mvebu-dt-3.17-3' of git://git.infradead.org/linux-mvebu into next/dt
Merge "mvebu DT changes for v3.17 (round 3)" from Jason Cooper:
- Armada 375
- Fix ethernet aliases for new node added for v3.17
- Add missing MDIO clock for new node added for v3.17
* tag 'mvebu-dt-3.17-3' of git://git.infradead.org/linux-mvebu:
ARM: mvebu: Add missing MDIO clock in Armada 375
ARM: mvebu: Add ethernet aliases required by U-Boot
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The non-scalar ktime_t implementation is basically a timespec
which has to be changed to support dates past 2038 on 32bit
systems.
This patch removes the non-scalar ktime_t implementation, forcing
the scalar s64 nanosecond version on all architectures.
This may have additional performance overhead on some 32bit
systems when converting between ktime_t and timespec structures,
however the majority of 32bit systems (arm and i386) were already
using scalar ktime_t, so no performance regressions will be seen
on those platforms.
On affected platforms, I'm open to finding optimizations, including
avoiding converting to timespecs where possible.
[ tglx: We can now cleanup the ktime_t.tv64 mess, but thats a
different issue and we can throw a coccinelle script at it ]
Signed-off-by: John Stultz <john.stultz@linaro.org>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: John Stultz <john.stultz@linaro.org>
commit 11c32d7b62 ("video: move Versatile CLCD helpers")
moved files out of the plat-versatile directory but in the process
got a few of the dependencies wrong:
- If CONFIG_FB is not set, the file no longer gets built, resulting
in a link error
- If CONFIG_FB or CONFIG_FB_ARMCLCD are disabled, we also get a
Kconfig warning for incorrect dependencies due to the symbol
being 'select'ed from the platform Kconfig.
- When the file is not built, we also get a link error for missing
symbols.
This patch should fix all three, by removing the 'select' statements,
changing the Kconfig description of the symbol to be enabled in
exactly the right configurations, and adding inline stub functions
for the case when the framebuffer driver is disabled.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
In case of error, the function clk_get() returns ERR_PTR()
and never returns NULL. The NULL test in the return value
check should be replaced with IS_ERR().
Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Link: https://lkml.kernel.org/r/1406038688-26417-1-git-send-email-weiyj_lk@163.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
In Armada 375 SoCs, the MDIO is handled by a separate orion-mdio driver,
despite the register is contained within the "LMS" block of the network
controller.
Therefore we need to add the clock to the MDIO devicetree to prevent the
controller from being accesed with its clock gated. This is needed, for
instance, to be able to load the MDIO driver before the network driver.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Link: https://lkml.kernel.org/r/1405961296-5846-7-git-send-email-ezequiel.garcia@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
As clocksource pxa_timer was moved to clocksource framework, the
pxa_timer initialization needs to be a bit amended, to pass the
necessary informations to clocksource, ie :
- the timer interrupt (mach specific)
- the timer registers base (ditto)
- the timer clockrate
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Select CLKSRC_OF for PXA architectures.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Move time.c from arch/arm/mach-pxa/time.c to
drivers/clocksource/pxa_timer.c.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Adds ability to shutdown all CPUs except the first one
(since it might be special for a lot of platforms).
It is now possible to use kexec which requires such a feature.
Signed-off-by: Romain Perier <romain.perier@gmail.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
When compiling for multiplatform for both ARMv6 and ARMv7, the default
compiler flags are for ARMv6, and the following cpu-hotplug change will
fail with:
/tmp/ccSFxfmI.s:68: Error: selected processor does not support ARM mode `isb '
/tmp/ccSFxfmI.s:74: Error: selected processor does not support ARM mode `isb '
/tmp/ccSFxfmI.s:75: Error: selected processor does not support ARM mode `dsb '
Fix this in a similar manner as in commit 9f0affcf3e "ARM: mvebu: Fix pmsu
compilation when ARMv6 is selected", by specifying ARMv7 flags for platsmp.o.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This patch adds bch8 ecc software fallback which is mostly used by
omap3s because they lack hardware elm support.
Fixes: 0611c41934 (ARM: OMAP2+: gpmc:
update gpmc_hwecc_bch_capable() for new platforms and ECC schemes)
Cc: <stable@vger.kernel.org> # 3.15.x+
Signed-off-by: Christoph Fritz <chf.fritz@googlemail.com>
Reviewed-by: Pekon Gupta <pekon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
although one patch adds DSS hwmods for AM43xx.
Basic build, boot, and PM test results are available here:
http://www.pwsan.com/omap/testlogs/hwmod-a-v3.17/20140722143514/
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJTztT1AAoJEMePsQ0LvSpLM90P/jT8Ea/hjZzsZwi48RD/xv5u
fFXVdb69jx0sS8HrXPIpuyLxYASFM4iRK7cJn6C0ptNj31mi+BKRhIH2xKdtxw/X
n+5UvBirHj+Vk3Sk2OVmb7oKslDlOCPQvwMkWfOQzF6CCujIqrhMhzzq71b6GfWb
KVmlsQoMWqApedcNHpoOLwvD+TZBbU4RRRtUb9owYXSPGReci4korT5SDADjfA7Y
nuGLk0YnkF2CsShORyM8BYrB1DXJjIk133d3xOK+blgV8slMik3af2N77CwWPTtP
P/qj8Uk3J787FG9nV8nq9aSpNZa8cOSIFSjdg2OhpwV5hX6wGJlnm5Q2sbQyzyxM
9Xe5L40i/F96F/vHDyCwTEdPoyu6VHysJG6qCGbsKp7rfEIj9WPhSZoi2hxqzxI5
furH0hwA68l68C+ujOsUX1xU8RfCrpEW8Knj69FBuHhX87x4Yoxc1KuIA4wabol3
8fEts6S99aVYit7GAoU2JnPzBCoE6aRT5Ns7rnswCqNFu4xKW8CkOLHR02MA2l0v
1TZPIFBGkHwU/r0U8VhLKqr/bGqVtPMyUJnmuGGoT3Wdcm1oi+Hk6940Hc8SqjAk
dIkIirS+08cpn4SuJJa+HrNMLmeFF2pqSumpAvr+kK2OFFhpnx9LHbq++JCMCIZB
0uOAyHGMtY9E/vTJwQgt
=csSf
-----END PGP SIGNATURE-----
Merge tag 'for-v3.17/omap-hwmod-a' of git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into omap-for-v3.17/soc
OMAP hwmod data additions for v3.17. Most of these are DRA7xx-related,
although one patch adds DSS hwmods for AM43xx.
Basic build, boot, and PM test results are available here:
http://www.pwsan.com/omap/testlogs/hwmod-a-v3.17/20140722143514/
As exynos_cpuidle_init() and exynos_cpufreq_init() functions have just
one line of code for registering platform devices. So we can move them
to exynos_dt_machine_init() and remove exynos_cpuidle_init() and
exynos_cpufreq_init(). This will help in reducing lines of code in
exynos.c, making it more clean.
Suggested-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Under "arm/mach-exynos" many files are using PMU register offsets.
Since we have added support for accessing PMU base address via DT,
now we can remove PMU mapping from exynosX_iodesc. Let's convert
all these access using iomapped address.
This will help us in removing static mapping of PMU base address
as well as help in reducing dependency over machine header files.
Thus helping for migration of PMU implementation from machine to
driver folder which can be reused for ARM64 based SoC.
Also as we have removed static mappings from "regs-pmu.h" it does
not need map.h anymore. But "platsmp.c" needed this and till now it
got included indirectly. So lets move header inclusion of
"mach/map.h" from "regs-pmu.h" to "platsmp.c".
Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Turning off a cluster when all 4 cores of the cluster are powered off
saves power significantly. Powering off the A15 L2 alone gives around
100mW in savings. Add support for powering off the A15/A7 clusters on
exynos5420/5800.
The patch enables specific register bits which ensure that:
- cluster L2 will be turned on before the first man is powered up.
- last man will be turned off before the cluster L2 is turned off.
- core is powered down before powering it up.
Remove the exynos_cluster_power_control function completely as we can
rely on the above mentioned bits rather than polling the cluster power
status register.
Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
Acked-by: Nicolas Pitre <nico@linaro.org>
Tested-by: Kevin Hilman <khilman@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Since the OPP layer is a kernel library which has been converted to be
directly selectable by its callers rather than user selectable and
requiring architectures to enable it explicitly the ARCH_HAS_OPP symbol
has become redundant and can be removed. Do so.
Signed-off-by: Mark Brown <broonie@linaro.org>
Reviewed-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Nishanth Menon <nm@ti.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Shawn Guo <shawn.guo@freescale.com>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Add hwmod data for RTC
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Reviewed-by: Rajendra Nayak <rnayak@ti.com>
[paul@pwsan.com: updated to apply]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Adding hwmod data for CPSW and MDIO which is present in DRA7xx SoC
Cc: Rajendra Nayak <rnayak@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Tested-by: Sebastian Andrzej Siewior <sebastian@breakpoint.cc>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Added hwmod data for pcie1 and pcie2 subsystem present in DRA7xx SOC.
Cc: Tony Lindgren <tony@atomide.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Tested-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Added hwmod data for pcie1 and pcie2 phy present in DRA7xx SOC.
Also added the missing CLKCTRL OFFSET macro and CONTEXT OFFSET macro
for pcie1 phy and pcie2 phy.
Cc: Tony Lindgren <tony@atomide.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Tested-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
This module is needed for the SATA and PCIe PHYs.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Reviewed-by: Rajendra Nayak <rnayak@ti.com>
Tested-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
This adds a generic devicetree board file and a dtsi for boards
based on MT6589 SoCs from Mediatek.
Apart from the generic parts (gic, clocks) the only component
currently supported are the timers.
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
This patch adds KEYBOARD_ST_KEYSCAN config
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org>
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
DMA interrupts are now available in of, and the definitions are
duplicates in hwmod. This prevents us from dynamically allocating
interrupt resources for dma from devicetree.
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
we have currently 2 DMA drivers that try to co-exist.
drivers/dma/omap-dma.c which registers it's own IRQ and is device tree
aware and uses arch/arm/plat-omap/dma.c instance created by
arch/arm/mach-omap2/dma.c to maintain channel usage (omap_request_dma).
Currently both try to register interrupts and mach-omap2/plat-omap dma.c
attempts to use the IRQ number registered by hwmod to register it's own
interrupt handler.
Now, there is no reasonable way of static allocating DMA irq in GIC
SPI when we use crossbar. However, since the dma_chan structure is
freed as a result of IRQ not being present due to devm allocation,
maintaining information of channel by platform code fails at a later
point in time when that region of memory is reused.
So, if hwmod does not indicate an IRQ number, then, assume that
dma-engine will take care of the interrupt handling.
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
- Changes to PRM and clock related code to help move
things to drivers
- Removal of unused ctrl module defines that no longer
are needed with things moving to .dts files and
drivers
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJTzPycAAoJEBvUPslcq6Vz7wcP/0sEABcw76XZywQL3Eh5lq2H
mxsgM4/YYLqQ2ILEM/R1cawgo/ywl0IRN8uZbPZpcxSxii3auMt40y+PWfnRGRQU
NP+3G112Xr7gdBloKcwgpsX2HhKKL8stiq7qJjgVsgVk/rIib+0DrDwEoznZjLFJ
V7tlURMcJjsOpUFr20k/gCQ7gkk0evHVRsvLqpTlx+oxs1QZVOuT3xoN7nqdmmsY
kqYfIAuffvlrfwqQr1Se5hzMngScjPZ8Fq2IYPQBoZHCGs3tsPFkKle76toi0cHS
iLML35cRmyyqpgx/tyAxnQrouJkkiu1frkGqHcNBmqwU66ztildSrLHj5OLSr32C
fI2nNeKSO16sGwVKf1ouv9x2L5DQlqfUSYhGeCzhBuMzBa82krl6Dxc7YQx53/Ob
b0K/+guHh6afitqMuzxJiP02Aq4vi/9KE7YHI3PELZNl7v/BOyxo5B9j+Xqzt3Az
tdjbkX20znlTuuTMwFow5r2T6fB2Z8Ltf1gwEeUMWsdgXpS+kmI+jiYI98fJ4B1j
q1ObRfruTSetRrLrNJ9BSY4GCiPYp6Jii+zV1NHviVvxSp9c/62zvTUwJbWRSkfZ
lhVVRyq3IN0YMQdhpZ4FpPYF7SzHOU7ot5bZ/bnq3CJU6zMzo1UIBOA6/W0vWiY6
yM/0UtoEwqB77QeM0zgJ
=m/Fd
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v3.17/soc-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/cleanup
Merge "omap soc clean-up for v3.17 merge window" from Tony Lindgren:
SoC specific omap clean-up for v3.17 merge window:
- Changes to PRM and clock related code to help move
things to drivers
- Removal of unused ctrl module defines that no longer
are needed with things moving to .dts files and
drivers
* tag 'omap-for-v3.17/soc-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (23 commits)
ARM: OMAP2+: clock/interface: remove some headers from clkt_iclk.c file
ARM: OMAP2+: clock/dpll: remove unused header includes from dpll3xxx.c
ARM: OMAP2+: clock/dpll: remove unused header includes from clkt_dpll.c
ARM: OMAP2+: clock/interface: add a clk_features definition for idlest value
ARM: OMAP2+: clock/dpll: add jitter correction behind clk_features
ARM: OMAP2+: clock/dpll: convert bypass check to use clk_features
ARM: OMAP2+: clock/dpll: add private API for checking if DPLL is in bypass
ARM: OMAP2+: clock: add fint values to the ti_clk_features struct
ARM: OMAP2+: clock: introduce ti_clk_features flags
ARM: OMAP4+: dpll44xx: remove cm-regbits-44xx.h and clock44xx.h includes
ARM: OMAP4+: dpll: remove cpu_is_omap44xx checks
ARM: OMAP4+: clock: remove DEFINE_CLK_OMAP_HSDIVIDER macro
ARM: OMAP4: Ctrl module register define diet
ARM: OMAP3: control: isolate control module init to its own function
ARM: OMAP3: PRM: move modem reset and iva2 idle to PRM driver
ARM: OMAP3: control: add API for setting up the modem pads
ARM: OMAP3: PRM: move PRM init code from PM core to the driver
ARM: OMAP24xx: PRM: add API for clearing wakeup status bits
ARM: OMAP3: PRM: add API for saving PRM scratchpad contents
ARM: OMAP3: PRM: add API for checking and clearing cold reset status
...
Signed-off-by: Olof Johansson <olof@lixom.net>
This patch enables SDHCI STI platform driver.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Acked-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
Signed-off-by: Ajit Pal Singh <ajitpal.singh@st.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
This is in preparation for moving this code into drivers/clk/ti.
Basic build, boot, and PM test logs are here:
http://www.pwsan.com/omap/testlogs/clock-a-v3.17/20140717034329/
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJTyBKrAAoJEMePsQ0LvSpL7qQQAKxrP6yJOVZ+toasgB1Uu7T+
ZceFZJwePa0Nfcl2xswHyqrJR2wh+kFic6RrCcj2s7pP2WBdGAVlxob45nh4BoXZ
VzxzC0MX9AE/s8+cB+oUiHyMEDGVBVN33gmJRcf+Es1zK/MCCJLZyoiK+fyEvPhZ
ECyeEG8uxk2iqyCvpwnq8uYER17YWuo8HKhdm4N60ItFofZ3UAYsGz/H3/zZrjcm
r8Ms+Rm1OvRqIFQLM8yrstCGhB5Hv3esOHY7L2mgdxfUQ64POZRfOmsHhlxQQqAM
o+hsbsgEe/zYsDP4i4ehnFvKCO652luzrk5hyCXkieuBRHB0Aj7YPaC9LuAhxhNi
qHGy+Al+4HMETDPo/O3e2IW+egp4WujIcEONUSct4PwGxyjZw28RjFHRowoBKsap
qhlnEVo7QzvtRt78h54oNalg4+O6dja+PMoJ/XckI1JUxfgbcO0fM2BwrwlBaK+b
4pN92KOiSMoGlIN9pndfNo+hYLeblORf5xCECDvv2rYt5zjpOEc9Q6EsrMemyYfq
wYN3o+N2ajcwLQZL1jqMidy0RV5eZfGzfCmPzQutOjpQ/KtCZSc7ID8PfdEwn3/l
vEfmbk6O9ozo+M4J81VQMl2l/peldpG+pH3HyNy+VRsIEvJ7W57CsUJ1npj6dJsE
xuU4+0ixHM2Awv0y9eAW
=v3th
-----END PGP SIGNATURE-----
Merge tag 'for-v3.17/omap-clock-a' of git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into omap-for-v3.17/soc
An OMAP clock cleanup series for 3.17 from Tero Kristo.
This is in preparation for moving this code into drivers/clk/ti.
Basic build, boot, and PM test logs are here:
http://www.pwsan.com/omap/testlogs/clock-a-v3.17/20140717034329/
- kirkwood
- Add d2 Network v2 board
- mvebu
- Add Armada 375 ethernet node
- Add CA9 MPcore SoC controller node
- Add support for dynamic freq scaling on Armada XP
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIcBAABAgAGBQJTyZ0+AAoJEP45WPkGe8ZnuS8P/A9ARBOZHfRAjWY+jFRgiDl4
eC+e6Iad1J6hQ4oWvK0KKLajvHc7GoPJIX8axFotXfoMEJJePPYM9Ye3TxtFPLU6
xhiB9yakk4/EFhx0N223P7gBCnpwxEnSTVTKrx3nRVIWlDPfw7kV33JgMiExFXZB
9idpAAHzvkSGIM4JNRc65YC+Auy3Pe++yLiMaAXwyscA7ucZZouot7MUCHnY+J6M
BoKec244nMWSk6FzWWx2EEPQ4wTUoNpYh5tM6Y7JV8mtgIKLYe0gTseMQgy7hN2Q
OnLFluK5jVbSqp0DIYR3Bf2Dw25YKrw9HjI10a4blXoJhu04naU8aVzDsMRZIgPS
hJyG/V9gPqXoWjkDiCZO4OrksJQOjabP2inthpW6mYeoc+o9Ar1y6gb8TRJMnida
EM4nf5sus1kJPLNkBhoAtbf7lzGPI0p7po2rrmH9uYzpfWGeLKzkTtudjvZTCaD7
7jF5lCp9KpOI6gwvSt6CQd0TFiU7F6NVsV7N1kJnCW3HRfgSggxefEkIuRAVMzwd
U9wvxu3o2XTVHx2DHv/9Oq+hiWiu9lX8s4nQXWBXIEcS+8hq4WbrBz5fKxzm+UQx
2Jmo/Q6bNPB2oYRVySkLJ8BzG9yG+mQFC7Gj6a/gsoAZTWw9lu/ECCYXQztec70n
o1jOJwWvn+wF2TcJgTPq
=3NU7
-----END PGP SIGNATURE-----
Merge tag 'mvebu-dt-3.17-2' of git://git.infradead.org/linux-mvebu into next/dt
Merge "ARM: mvebu: DT changes for v3.17 (round 2)" from Jason Cooper:
mvebu DT changes for v3.17 (round 2):
- kirkwood
* Add d2 Network v2 board
- mvebu
* Add Armada 375 ethernet node
* Add CA9 MPcore SoC controller node
* Add support for dynamic freq scaling on Armada XP
* tag 'mvebu-dt-3.17-2' of git://git.infradead.org/linux-mvebu:
ARM: mvebu: update Armada XP DT for dynamic frequency scaling
ARM: mvebu: add CA9 MPcore SoC Controller node
ARM: mvebu: Enable the network controller in Armada 375 DB board
ARM: mvebu: Add support for the network controller in Armada 375 SoC
ARM: Kirkwood: add DT support for d2 Network v2
ARM: Kirkwood: allow to use netxbig DTSI for d2net_v2 DTS
Signed-off-by: Olof Johansson <olof@lixom.net>
exynos3250: add i2s dt for audio interface
exynos4
- cleanup arm-pmu node because of 4 pmu on
exynos4412 but 2 pmu on other exynos4 SoCs
- add support sub-nodes to exynos usb host for exynos4
exynos4412-odroid-common
- fix T-FLASH hotplug detection
- disable 'always on' for BUCK8
- add support for GPIO based buttons
- add MAX98090 audio codec
exynos4412-odroidx2 and exynos4412-odroidu3
- refactor exynos4412-odroidx and exynos4412-odroid-common
for odroid-x2 and u2/u3
exynos4412-odroidx
- add support for USB phy, host and device
- enable common hardware blocks, secure firmware calls,
watchdog, g2d and fimc (mem2mem) multimedia accelerators
- add support for USB phy, host and device
- correct memory size
exynos5410
- fill in CPU clock-frequency property to avoid warning
exynos5420
- remove display pd because of instability
exynos5420-peach-pit and exynos5800-peach-pi
- sort nodes each other to check its differences easily
- enable audio support and add sound-card name property
- add mask-tpm-reset node
- add cros_ec including keyboard, i2c tunnel and tps65090
and battery under the i2c tunnel
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJTybsKAAoJEA0Cl+kVi2xqs6YP/jZ6goZrfxAa2ZbNHd6VHg3M
61mm3X1WNVohjC8uMoK6NzS4BVzwjYwgq5pRYa80bSx93h0ygPWNM0RapaW7993G
JHa9RCwfOww7c33ZzeFlalDVpbbStRdT/Z5bca4XFPhzuuNqzt5NSFTisRHnYzVg
9G7YGYzYJdBPPgGiowtel2TjCw+cVMk6nnV4WParOACYVLVmRU78dBYQ+BQC1aZ9
YsNqjO/7Y1wKMMpmpoNlKd4/PC6kVqzMCDAWQA4TDqdXD3aEOcIMAr52o41tEVzr
4BVyBw17nxMhE+wAk/LWRka4sE0yX51y0shAFdm2l/F671Q/dX8+Vx9H9YCyfib9
9p1CHuVLo3rDiOaScRLYcusk2N1C8+CctwZ90eTkdGcB0APdwqVDZIpSfv743dJf
toJBxfB3In0+2ca47w4Fcm2gLkaH028/dqjSwM1esBXWEurFOc2WfUiY4mJXd1TR
+N+dYjU9u3R6n5/jUIKNtc49BLhIQMM3dPZRI//u6W/zEIsN5LpFhH4mm0lLfpb0
mADbxwDAYvTAtLtImTkfb/BWdynXdFDFH1DFRZMV4GT+y2gktS43BKRzdATAGR6C
y5I9q/rRZMEletfO+xkDyNkueNkwi3ZSHJubfvZC201qfL+LUxDxoOuKeLnsybSs
gehX1kv8ut/K3/fXGkkK
=LmMW
-----END PGP SIGNATURE-----
Merge tag 'samsung-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/dt
Merge "Samsung DT updates for v3.17" from Kukjin Kim:
exynos3250: add i2s dt for audio interface
exynos4
- cleanup arm-pmu node because of 4 pmu on
exynos4412 but 2 pmu on other exynos4 SoCs
- add support sub-nodes to exynos usb host for exynos4
exynos4412-odroid-common
- fix T-FLASH hotplug detection
- disable 'always on' for BUCK8
- add support for GPIO based buttons
- add MAX98090 audio codec
exynos4412-odroidx2 and exynos4412-odroidu3
- refactor exynos4412-odroidx and exynos4412-odroid-common
for odroid-x2 and u2/u3
exynos4412-odroidx
- add support for USB phy, host and device
- enable common hardware blocks, secure firmware calls,
watchdog, g2d and fimc (mem2mem) multimedia accelerators
- add support for USB phy, host and device
- correct memory size
exynos5410
- fill in CPU clock-frequency property to avoid warning
exynos5420
- remove display pd because of instability
exynos5420-peach-pit and exynos5800-peach-pi
- sort nodes each other to check its differences easily
- enable audio support and add sound-card name property
- add mask-tpm-reset node
- add cros_ec including keyboard, i2c tunnel and tps65090
and battery under the i2c tunnel
* tag 'samsung-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
ARM: dts: Add I2S dt node for exynos3250
ARM: dts: Add cros_ec to exynos5420-peach-pit and exynos5800-peach-pi
ARM: dts: clean up arm-pmu node for exynos4
ARM: dts: remove display power domain for exynos5420
ARM: dts: Add sound nodes for Odroid-X2/U3 boards
ARM: dts: fix T-FLASH hotplug detection for exynos4412-odroid-common
ARM: dts: add support for GPIO buttons for exynos4412-odroid
ARM: dts: disable 'always on' for BUCK8 regulator for exynos4412-odroid-common
ARM: dts: refactor Odroid DTS file and add support for Odroid X2 and U2/U3
ARM: dts: correct memory size for exynos4412-odroidx
ARM: dts: add support for USB phy, host and device for exynos4412-odroidx
ARM: dts: enable common hardware blocks for exynos4412-odroidx
ARM: dts: add port sub-nodes to exynos usb host modules for exynos4
ARM: dts: Add mask-tpm-reset node in exynos5800-peach-pi
ARM: dts: Add mask-tpm-reset node in exynos5420-peach-pit
ARM: dts: Add sound-card name for Snow/Peach-Pit/Peach-Pi
ARM: dts: Fill in CPU clock-frequency for exynos5410
ARM: dts: Sort nodes within Peach-pit/Peach-pi dts files
ARM: dts: Enable audio support for exynos5800-peach-pi
- add callbacks exynos_suspend() and exynos_powered_up()
for support cpuidle through mcpm
- skip exynos_cpuidle for exynos5420 because is uses
cpuidle-big-liggle generic cpuidle driver
- add generic functions to calculate cpu number is used
for pmu and this is required for exynos5420 multi-cluster
- add of_device_id structure for big.LITTLE cpuidle and
add "samsung,exynos5420" compatible string for exynos5420
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJTybYIAAoJEA0Cl+kVi2xqcmsP/Au37R0j1B8KpZ4scUBTczHJ
t/oucJ3N2y7vSNdqZ21izolKQjl94NAidpzeaL0lXmthoAhdc8ESwMK8Nd9TR27r
qJyu+FiXQFhZy9NbaKbkvl27bzfRJPaBQzDAPM6HvExP5p0aIUCGXu9mDUb6koe4
Zm344G5az7iooRkerPw6SrswiJ6BJ6R4elkFGsZLDTRhLWoZ36PG2puRuEk6lVO7
X7bsyvbx+Go6ru4KUvMRBIoMUDRDL0NbIFq0p8Q6naEbHSucYAo9MfHYJ/Hux/9B
G7UoVwLjPyR2jbAYIn6XyDjWKvPEL1FwwuY1OwJ/oIa32yD0LQ1d6dEX7Px5z4Ts
6lpTeaFKPuDLz2VN+WuRyTySnJ3cD4RihagNSTpTIMmvk0k2tPwtXhvhTkP73Gsb
fV11rywmyMbdcBvRawN7DmSz10iSoF6VLsMF3WBcaNDBzbthRNMmHc2twbkBo0T+
lxyHvstwD78vrYODLX6lelfsru1RPwaIFFj/sTSaGibLR+I8Xq2MKPpZeO8lUwAJ
u057QCBDmVvwkBc40HRnjBvP+RjJp3+jnaB3GVplPkOaSmhEtRQezyHKEzbT0LoW
n9l4UbnmV8QeiWRtFfI4qK43ZTp4Eq6b/CE7qIrDG1zTofJK3ySuo7/t2wm5HMTQ
GJNJpPl6GweryKVDlJ0M
=jkc2
-----END PGP SIGNATURE-----
Merge tag 'exynos-cpuidle' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/soc
Merge "Samsung exynos cpuidle update for v3.17" from Kukjin Kim:
- add callbacks exynos_suspend() and exynos_powered_up()
for support cpuidle through mcpm
- skip exynos_cpuidle for exynos5420 because is uses
cpuidle-big-liggle generic cpuidle driver
- add generic functions to calculate cpu number is used
for pmu and this is required for exynos5420 multi-cluster
- add of_device_id structure for big.LITTLE cpuidle and
add "samsung,exynos5420" compatible string for exynos5420
* tag 'exynos-cpuidle' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
ARM: EXYNOS: populate suspend and powered_up callbacks for mcpm
ARM: EXYNOS: do not allow cpuidle registration for exynos5420
cpuidle: big.LITTLE: init driver for exynos5420
cpuidle: big.LITTLE: Add ARCH_EXYNOS entry in config
ARM: EXYNOS: add generic function to calculate cpu number
cpuidle: big.LITTLE: add of_device_id structure
+ Linux 3.16-rc5
Signed-off-by: Olof Johansson <olof@lixom.net>
: Most of them are for exynos SoCs, remove useless
codes and update for PMU consolidation.
- remove unnecessary header file in mach-exynos/pmu.c
- remove unused code in mach-exynos/common.h
- remove mach-exynos/regs-pmu.h dependency from PD
- remove file path from comment section in mach-exynos
- move SYSREG definitions into mach-exynos/regs-sys.h
- add mapping PMU base address via DT for PMU cleanup
- use staic in mach-exynos/common.h
- update Samsung UART config options for low-level debug
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJTybGdAAoJEA0Cl+kVi2xqwW4QAIgCaoe33s4qCUY1n1xZjLld
DiLaolgeFyTMB7jekRgNhdCrdUXNPWRhp94dM3pzoiV8RAzXru86Xa86FbVkH6SZ
sPShkL4auv+D+fQ1bso0EyB2GPGm5m8IJ7ZrPwgVUItX7TUnfIsvNsOsg7iY9gcw
dMe8fb+oFieVlutX3ITL6thtmrJxCgM67Yyt/WY4HrShtR9dNi1soTUYBmQLznD/
zqf58657eTVc8M0eiA9mkFSQJ1N5C670fyZN6CcQoKXIGvf5oh4ba6CUKkSQBM9Y
UY7jksM/nXujyj0N2tIKNKFrkhBGhH99Rtp66R93tV7FCM9rgbsYwWwJCr6rqAVk
u9NQFF2pbvRsgkw18coV9yxVyafLYlVdfGUzl2yq7u9SR3wmPcjROERer0h5UueR
0mEq5v6eok2EZ29Tn2vU2Io0RShFbxLGNQC2/cs3PS+Un7xla5VOmwFjtKlWWtVA
LHTbdGthjSGxH0SXOfXQD2pubkXLLEU7AekpOC+i14o97g9B235mHIP/m+X7a3F7
cVCza9yRtKA1ztkdgq3vC29n09+4hU1qGVsQN8btM8ItqpGqLbb8qUj6wLGfhOXb
UfYBo5RrIb1neAhKapaaB5Nus/9AQrkkYwVPiO+pWZ1KrIvRSLEjFjjrc4pJw+QS
SQdAhJJQ0k6H82lQAu9A
=goDG
-----END PGP SIGNATURE-----
Merge tag 'samsung-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/cleanup
Merge "Samsung cleanup for v3.17" from Kukjin Kim:
Most of them are for exynos SoCs, remove useless codes and update for
PMU consolidation.
- remove unnecessary header file in mach-exynos/pmu.c
- remove unused code in mach-exynos/common.h
- remove mach-exynos/regs-pmu.h dependency from PD
- remove file path from comment section in mach-exynos
- move SYSREG definitions into mach-exynos/regs-sys.h
- add mapping PMU base address via DT for PMU cleanup
- use staic in mach-exynos/common.h
- update Samsung UART config options for low-level debug
* tag 'samsung-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
ARM: EXYNOS: Add support for mapping PMU base address via DT
ARM: EXYNOS: Remove "linux/bug.h" from pmu.c
ARM: EXYNOS: Remove regs-pmu.h header dependency from pm_domain
ARM: EXYNOS: Remove file path from comment section
ARM: EXYNOS: Move SYSREG definition into sys-reg specific file
ARM: EXYNOS: Make exynos machine_ops as static
ARM: EXYNOS: Remove unused code in common.h
ARM: debug: Update Samsung UART config options
+ Linux 3.16-rc5
Signed-off-by: Olof Johansson <olof@lixom.net>
Removed outdated configs. Enabled most of the configs used on latest
Exynos based platforms. This will provide a reference for users trying
to verify and test various features on Exynos based platforms and also
help in detecting breakages by widening the build coverage.
Signed-off-by: Sachin Kamat <sachin.kamat@samsung.com>
[arun.kk@samsung.com: on Snow, Pit, Pi chromebooks]
Tested-by: Arun Kumar K <arun.kk@samsung.com>
Tested-by: Doug Anderson <dianders@chromium.org>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
Fix building of exynos_defconfig with disabled PM_SLEEP:
CONFIG_PM_SLEEP=n
CONFIG_PM_SLEEP_SMP=n
CONFIG_SUSPEND=n
by moving functions for power up/down of CPU and cluster to platsmp.c
The build error messages:
arch/arm/mach-exynos/built-in.o: In function `exynos_boot_secondary':
arch/arm/mach-exynos/platsmp.c:111: undefined reference to `exynos_cpu_power_state'
arch/arm/mach-exynos/platsmp.c:112: undefined reference to `exynos_cpu_power_up'
arch/arm/mach-exynos/platsmp.c:116: undefined reference to `exynos_cpu_power_state'
make: *** [vmlinux] Error 1
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>,
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
- mvebu
- Add appended_dtb support
- Add devtmpfs support
- Add 375 network driver
- Add cpuidle support
- Add cpufreq support
- kirkwood
- Remove kirkwood_defconfig
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIcBAABAgAGBQJTyZrLAAoJEP45WPkGe8ZnPkQQAILwRM3P36VWU5KrcpHq9XYj
FG1vabDUPOt4cjKjwrjLB23AL0oYaHWkoqwvVEIuCjWqrD1uYn/qemgA2e9/C+dT
sfwOq+nDy2uDFwa3L8BTTtTgmJcmjMwU0ntXv1DUEjLZnSLg+qmpzS8RVCBhTkbZ
VLhMmJAuyM5WLWFLyncKkODufsghFpQ/8oC9cs1kiLKHoUQPjiYtPjVZlEM3evHF
Sg6Rs40GjNe6qX4gydGGQCEDsr/eWqVFzAx75DJqDHCj2I4leDdeK0Wb1etmJrWS
4zPBAcBShUDsRnDlOXJ98ek8tpcTE9gUI9Zrf0m9vz7MB6eIbpUYUNWVnPjVFNLx
SCSKquUpaPZAJZ0mN8Gpe/RAYSt1l42aQal2Y7Qw0Pd22mwB+yzSfPJjGqM3BqHF
LKl3S9cCV6lmTdmV+S+medwgX9OzoDFniSzNcqYRNrRkbHHPGIIVK9oLEu6Nd3/C
+v2SUN34psIUIgYGKJcrRaBx2SFxX1Xhmh3AfeBHtNqhCDBLKKlqVkI3yBxckXEN
yOMy9AcipZ/sCNC9gk+BN4jYuFsv6+IUk74+193rzvRjhL/6s7fCb7UIMqrAk0Y3
+1ggU1p+TWBbBzzP2e2K54z8QZ5I3g8p/PIgfQBoJ5knF5XUXUMAfLKBDhvgvKOW
5/QxQY/GeiWN8F+BwI/4
=aLjX
-----END PGP SIGNATURE-----
Merge tag 'mvebu-defconfig-3.17-2' of git://git.infradead.org/linux-mvebu into next/defconfig
Merge "ARM: mvebu: defconfig changes for v3.17 (round 2)" from Jason Cooper:
"Here's all the defconfig changes we have for mvebu this time around. The
big one is the removal of kirkwood_defconfig, corresponding to the
mach-kirkwood/ removal in mvebu/soc."
- mvebu
* Add appended_dtb support
* Add devtmpfs support
* Add 375 network driver
* Add cpuidle support
* Add cpufreq support
- kirkwood
* Remove kirkwood_defconfig
* tag 'mvebu-defconfig-3.17-2' of git://git.infradead.org/linux-mvebu:
ARM: mvebu: update mvebu_v7_defconfig with cpufreq support
ARM: mvebu: defconfig: enable cpuidle support in mvebu_v7_defconfig
ARM: Kirkwood: Remove kirkwood_defconfig
ARM: mvebu: enable Armada 375 network driver in mvebu_v7_defconfig
ARM: mvebu: add devtmpfs to mvebu_v5_defconfig
ARM: mvebu: add appended DTB support in mvebu_v5_defconfig
Signed-off-by: Olof Johansson <olof@lixom.net>
- kirkwood
- Remove mach-kirkwood/, It's fully supported in mach-mvebu/
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIcBAABAgAGBQJTyZhcAAoJEP45WPkGe8ZnrcAP/jxptr0gH1Lin3eHItfiK7X+
s8JOtb0bL23mMElvnA85RkJC+n5lVeP16YfMEeg+oJDWn6wBC1UTOXCBRv93iEyg
bUFlvo1rHUgcvY3Kj7/V5biCertYy2J/EU54h6fHgOWOb9P9pT9R2GRONlVn2ZSR
xdzL/OPXamG0yCaIW7AGPCp5SNMMNFzZXdIIL5dxhx5oxSg71JgoPwXOomyAfSBi
niDiQEfQ3a7h8Fj9QYEnJxIUkatw6g5rojgQIcyeWFJYlMKn5CsqBsbr5M24ZaFX
O7GuHZbsZvU/vhfjcOmF5bjnBTNhOoKuc9rXh9NytLbtqXCjkMeQ9I+/bvoXARFt
+sPsQOsoHN8OyY1To3wONR0LLPLGLA5giveyjgevKg61rb7tktdVr5R5uu8eujYO
Qp52jua/ySW2H5soJwxPWcSuE4GY9cQscCDU1lZKXKcQmu0VqDwk1vaF3r5+sHCl
Lm0Ur2d++BMm1L7WrX03+MdGzuiTu+m8duslukPV4VnRt6og9u6EOFy2Q5iv9NDX
ZN6kGrcuQHSjrp/fFb+mV1xlW01SHAgD2tyy0AkN/RXSiyd8/+2rVtrr4JZcHr7S
PCCfK3dsGyGPCWOmeh0/y/OMtJn8lR/s4sktK6y4AUw/m7yqJMsngVZ0ZAJNNL/R
rwV7qc4RtvkCGMNUkokE
=lxH8
-----END PGP SIGNATURE-----
Merge tag 'mvebu-soc-3.17-2' of git://git.infradead.org/linux-mvebu into next/soc
Merge "ARM: mvebu SoC changes for v3.17 (round 2)" from Jason Cooper:
"Yeah, it's just one patch, but it's a beautiful one! Thanks to the
efforts of many people over the last couple years, and in particular,
Andrew Lunn, Kirkwood has been completely converted to DT."
- kirkwood
* Remove mach-kirkwood/, It's fully supported in mach-mvebu/
* tag 'mvebu-soc-3.17-2' of git://git.infradead.org/linux-mvebu:
ARM: Kirkwood: Remove mach-kirkwood
Signed-off-by: Olof Johansson <olof@lixom.net>
This set of patches update the tegra_defconfig by first regenerating on
top of v3.16-rc1 to prune all non-existent symbols or symbols which are
now selected by default.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIcBAABAgAGBQJTyRhfAAoJEN0jrNd/PrOhTE0P/0ThW4RfNkX0FNpn1f8LwYxz
5h0+/UPrTxU5AimkjNxLDwHNXKaYrcwNyC5dKc7FlpcUXnXcWt6aTHD2whubVxDf
y4MTo+I8HcPfGA11y4T8A2KE1l/Ddhn4rY9lK0pE4eQnlfhPc+prpEnHdmdskAvS
6ZZmZi0vOfbx+VswJMVaBU+CuC0kY80ZbRR8jn7G3hVlFdE+WW6qVBIw3PP1VtZi
xO0Q10nmGPdelOPWf3mbMxOagxRrIsVXLUQe4G4YnkDQdDODgYDtMOPWh3yhME3f
KHDEtvrK7SxKTkd7QL7TT8B4veFdhZNNdUmAaRygbEymhM6esZvR85BXWeo4jmZE
55yZe6eq6AdpPGA8BmxLnUQzr8R+Gapvmf58eonaaW+fZKiJWO5S0uRPOERW08HU
tEaFJOCUHto2gqLA30KsGVPeNkaMznw9o/wEztRpqszMJjd7pA8G0mGAj/s1wZFD
sHFdHyBBPxb5Of038cqB3ro7yWp3xefM1yYU2ekAkE/vf0orqhhpO6UexH9/rgSx
LShXWOBPcxPm6kZSbfRJFP7LzGWRC6OlzcOeGooUXWXy+dPbOPIITdW/bdm5RaHy
oZFZkuTGvxIpuF/GJTV0aSMzF0NiG/7dTjSIyhnEANjPRlRclusOE6n2jHhykQh7
aHaIf+98ThRztfW7tKW+
=mKLn
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-3.17-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/defconfig
Merge "ARM: tegra: defconfig updates for 3.17" from Theirry Reding:
This set of patches update the tegra_defconfig by first regenerating on
top of v3.16-rc1 to prune all non-existent symbols or symbols which are
now selected by default.
* tag 'tegra-for-3.17-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: tegra: enable igb, stmpe, i2c chardev, lm95245, pwm leds
ARM: tegra: rebuild tegra_defconfig
Signed-off-by: Olof Johansson <olof@lixom.net>
- New board support:
- Apalis T30
- HDA support for Tegra124 and Venice2
- Display on Medcom Wide and Roth
- GK20A support on Tegra124
- XUSB pad controller for Tegra124 and Jetson TK1
- Various cleanups
This pulls in the for-3.17/fuse-move, for-3.17/dt-cros-ec-kbd and
for-3.17/xusb-padctl branches to resolve dependencies.
Note that the Apalis T30 support has a runtime dependency on the
for-3.17/pcie-regulators branch, so they should preferably be applied
in that order. I didn't merge that branch into this because Apalis T30
support is new, therefore can't regress, and because the dependency
exists only at runtime.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIcBAABAgAGBQJTyRtaAAoJEN0jrNd/PrOhgRUQAJUXqH+xOusiIJj0Q+1Uh2ga
5JiqBqhVjaN0plF9XyZJq3/FP3mU8IslLswK3ybh/gqwOGqQ0qrXP2Nc9GHsvS8I
KIyMRqu7sGgTKFMHRLH3V7+LTwr6nNoonTFCDQAhJZb3nbxmxpToyj2XpSpcN3kX
ZaJXeSMe6yk09YQijvM6aq/gAPaz2aHLkIThzwA6GvFj3vfRKyoqQdeycUY4y1Lq
AUGADoJOqo33megAdGlu1iFAmm36xv6c6g6TK3EnBnvYf6PTwAPg3IHIGu5G7UD9
kcWqrveCi5VwIKWv4vJ7S3frj7OXHovel4qvN6GiDHQLKAHB+6PJAQwHYhLdHiEP
PhXfosca7KnAPDncoeKyETiYU4W4mIVOec+ySvFZvI17/hgfW/UkLuyzWTYytLjA
4B9Y3H/LgVIaKFwNEVpYh0511S2J9Zbm8X0qw51M0krO3d/Ux08OeXS5KCQLjHRK
m1VJ6atYYbfqOO4v664pwZkPVSvwz2mCw/Pi6STFd2vl6R05onuS7voHQd7LqFa/
15mSaAbdUxNr1RNCz4wTSxJ4gauD+TWmJdboT4i2hAvgL9SSLjJ9tOvwQxQIliRg
NKUNwtfRPIOiO/dywl4bDDQphxjdCtuLZtHdKhqcPzTakKpXIw70THgEdEACtYMt
FRZSkOHGAnpfZkiBNbt1
=t3Ef
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-3.17-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/dt
Merge "ARM: tegra: device tree changes for 3.17" from Thierry Reding:
- New board support:
* Apalis T30
- HDA support for Tegra124 and Venice2
- Display on Medcom Wide and Roth
- GK20A support on Tegra124
- XUSB pad controller for Tegra124 and Jetson TK1
- Various cleanups
This pulls in the for-3.17/fuse-move, for-3.17/dt-cros-ec-kbd and
for-3.17/xusb-padctl branches to resolve dependencies.
Note that the Apalis T30 support has a runtime dependency on the
for-3.17/pcie-regulators branch, so they should preferably be applied
in that order. I didn't merge that branch into this because Apalis T30
support is new, therefore can't regress, and because the dependency
exists only at runtime.
* tag 'tegra-for-3.17-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: (28 commits)
ARM: tegra: roth: add display DT node
ARM: tegra: Fix typoed ams,ext-control properties
ARM: tegra: jetson-tk1: Add XUSB pad controller
ARM: tegra: tegra124: Add XUSB pad controller
ARM: tegra: add GK20A GPU to Tegra124 DT
ARM: tegra: of: add GK20A device tree binding
ARM: tegra: roth: enable input on mmc clock pins
ARM: tegra: roth: fix unsupported pinmux properties
ARM: tegra: Migrate Apalis T30 PCIe power supply scheme
ARM: tegra: tamonten: add the display to the Medcom Wide
ARM: tegra: tamonten: add the base board regulators
ARM: tegra: initial support for apalis t30
ARM: tegra: jetson-tk1: mark eMMC as non-removable
ARM: tegra: venice2 - Enable HDA
ARM: tegra: Add Tegra124 HDA support
ARM: tegra: Add the EC i2c tunnel to tegra124-venice2
soc/tegra: fuse: fix dummy functions
soc/tegra: fuse: move APB DMA into Tegra20 fuse driver
soc/tegra: Add efuse and apbmisc bindings
soc/tegra: Add efuse driver for Tegra
...
Signed-off-by: Olof Johansson <olof@lixom.net>
This branch reworks the set of regulators that the Tegra PCIe driver
uses, so that the driver and DT bindings more correctly model what's
really going on in HW. For backwards-compatibility the driver will
fallback to using the old set of regulators if the new ones can't be
found.
I've made this a separate branch in case it needs to be pulled into the
PCIe tree to resolve any conflicts.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIcBAABAgAGBQJTyRXmAAoJEN0jrNd/PrOhpcIP/1bhFxw7a0HjG1Cwtj27uJKo
2S9z28sFbVERmOTy4Sfy/bf3EEBNZajgYJ0kOIJbrVRkpGV6BU/3nNVmqR9G1jOY
9wVr7e9Z0lWQ8r8e9jXIRpTOO1PUFfx3AhyjD1kT5bUsI8m5dcDmryyLqsvh2UDn
F1S2JpAeylVSFzZLspqnuc1HgG6V4xMxt7JCKQqQo4uTTs2LVWpLWRqQEOhpsmVW
WDSzovSXBThm4wXvZlrTij7HuOqYbwG3wLpzJMVVfhysRZDfIO8i7hK2kAQ8+3O6
0yS8HsfzrjhGvNgbGUt+hGTYg+omHp3i0RJf/AxhOIOrA5fIs4pOTC2HSqq+kG4x
K2OWCUboaTbMpJ/+TwcY83Ohk/r+Qj3Ay9loyIbQ5e2ORbkmpvbBALiQLTFwswaf
zPsuwSXW8imVnPsduo+7qnvq2sbQ45Wy30wZMPRKYSfQzNY40AK0hzvRtW1BfMHY
3P35z+9uIygiOr4KlwvbnTjL/nNWa5aVO8CYDfAxDa81SUJn/4vGkJNLNw6z1zo8
Jvem210R6G0dca257NFWZ9w7hB9bfX3AVR8ZovDkg7tiOOlaOwq8HJrVU8oM3dtu
/ztRVYKo/XqRtKyCcUnCtoF6CswlhfT4u4JOmo/5KwD9VBmxQPWHEkUwMl9j6eu3
5dNKF79ROlQ1Idk0jjDZ
=48cL
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-3.17-pcie-regulators' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/drivers
Merge "ARM: tegra: rework PCIe regulators" from Thierry Reding:
This branch reworks the set of regulators that the Tegra PCIe driver
uses, so that the driver and DT bindings more correctly model what's
really going on in HW. For backwards-compatibility the driver will
fallback to using the old set of regulators if the new ones can't be
found.
I've made this a separate branch in case it needs to be pulled into the
PCIe tree to resolve any conflicts.
* tag 'tegra-for-3.17-pcie-regulators' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: tegra: Remove legacy PCIe power supply properties
PCI: tegra: Remove deprecated power supply properties
PCI: tegra: Implement accurate power supply scheme
ARM: tegra: Add new PCIe regulator properties
PCI: tegra: Overhaul regulator usage
Signed-off-by: Olof Johansson <olof@lixom.net>
Some of the code that's currently called from the Tegra machine setup
code is moved to regular initcalls. To catch dependency violations, the
various code paths now WARN if they're called to early. Not all of the
potential candidates are converted yet, but those that were have been
verified to work across all supported Tegra generations.
A new function, soc_is_tegra(), is also provided to make sure that the
initcalls can abort early if they aren't run on Tegra, which can happen
for multi-platform builds.
Finally this also moves out the PMC driver to drivers/soc/tegra so that
it can be shared with 64-bit ARM.
This is based on the for-3.17/fuse-move branch. The split is somewhat
arbitrary but allows the dependents of the for-3.17/fuse-move to pull
in as little code as necessary.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIbBAABAgAGBQJTySPxAAoJEN0jrNd/PrOhVIAP+N6yVxQa/8sMYpy7ohr2b/ZP
IcevK+9Q3mZYzxVoI1am1p11louZgGFE11yuvI2kmjTLg9UcFC+O6iEc05XvIIIC
nVLg4V1F5VWyv0BtnqTAuMX+hOqj9ZFx5Xuq0rpulKLs9aygkKEJnI0eOyMDbnAN
OsGmhOeblZkgS0Gk9Dg9NiFPpQ/sl6LRZDoVpYA+fKEb6SCxei5Z48aaUhhHwq2k
IVQUcMWz9k4mPjWO9OcO2gkDaq79OYWzk/DP4hFk5telZAkGjJg+UdNWIXSPg9A/
sjMxpkRpTR8sDVPZ3n1YnxJ9sUV3Q88SmN+x78W0QGNbLxELU8Fhd2xPVrA2PAIG
+uP0DKkrDi+AV3euEBOIOKTMptrgGDPigT+b127vxUigbQ3D90SV9xN0+/+NaLcv
J3msHcjFo9IW03a5q8DBdkeIy4xs7uZW9uR72ie1uUtv2oLkoS/qrwxauj3x8J52
dqtY98xCPtFQnR2HyT7VRLBibGq0zelQ9aYENy5Su+3UI73AIG15ztzrOcEvN8Cc
DAbBKgix63TlJF51VlCCLGUMpt1StDoia8A3iMIqNEu/CJqXaqQ/77im4KGybqgm
JoH7OHVhewDBxVg2XfwcDX8TnmMQjLTMkzLG8oSg7uAqyrJm0xkC7ttx4gPRlSJX
kEQrfqyjbL3C42+4lgc=
=w/53
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-3.17-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/cleanup
Merge "ARM: tegra: core code changes for 3.17" from Thierry Reding:
Some of the code that's currently called from the Tegra machine setup
code is moved to regular initcalls. To catch dependency violations, the
various code paths now WARN if they're called to early. Not all of the
potential candidates are converted yet, but those that were have been
verified to work across all supported Tegra generations.
A new function, soc_is_tegra(), is also provided to make sure that the
initcalls can abort early if they aren't run on Tegra, which can happen
for multi-platform builds.
Finally this also moves out the PMC driver to drivers/soc/tegra so that
it can be shared with 64-bit ARM.
This is based on the for-3.17/fuse-move branch. The split is somewhat
arbitrary but allows the dependents of the for-3.17/fuse-move to pull
in as little code as necessary.
* tag 'tegra-for-3.17-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: tegra: Convert PMC to a driver
soc/tegra: fuse: Set up in early initcall
ARM: tegra: Always lock the CPU reset vector
ARM: tegra: Setup CPU hotplug in a pure initcall
soc/tegra: Implement runtime check for Tegra SoCs
Signed-off-by: Olof Johansson <olof@lixom.net>
This branch moves code related to the Tegra fuses out of arch/arm and
into a centralized location which could be shared with ARM64. It also
adds support for reading the fuse data through sysfs.
Included is also some preparatory work that moves Tegra-related header
files from include/linux to include/soc/tegra as suggested by Arnd.
Furthermore the Tegra chip ID is now retrieved using a function rather
than a variable so that sanity checks can be done. This is convenient
in subsequent patches that will move some of the code that's currently
called from Tegra machine setup into regular initcalls so that it can
be reused on 64-bit ARM. The sanity checks help with verifying that no
code tries to obtain the Tegra chip ID before the underlying driver is
properly initialized.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIcBAABAgAGBQJTyR7HAAoJEN0jrNd/PrOhXRoQAKIs/o8Xf6aTb48OOODFt8g0
3GiKaYfVPk6VzkrhywmulOndmYy9BjLwhX2jnPgPzFbM5h2jk39/PK3RtssD92Wm
sHbDflbCj+gaLvjETbTWtYbbYmejqp2xhte/F+MMT0QJKl8BjmyO6WOoUL1+QEyW
p+OUYRgasmyAiq7qov1MeMW+edNqFHhHpmnsva62NUbcOaKTJ6U6antm79PoAA9M
Da3UScoX9BxqsyuxBteLdcpgSgOHjW/eLz9xHVf5gtG4ZsTjkWFRyP9wwY6rCxij
+6cMvKs8OT2y+TjQ6qv5/Zu+XbXGbo2yujnK2oFkLsST/LWobGfuGXUp/K7CkkKJ
0wgZS1t2iT3RXSQn/Fz8zJx9j0q3GJmvMFmdrOAh8Vx6ucP1m8DZ4noms37D0+Wn
2HSW55sAXIUFALZgOiVRq0GXtw/iA76S9GtjfFWkCkyGV4WLH6C1NSoojvmXWQ3U
QQWlpGODQFYUTDUhwh6/T3cP7Ip12W9OU2eTNfdgn8D+PU16CPSfdXN6JWxBI13L
vVUxWMm9JG+QkbSjfw4q2A0dHEu6lssmOSvMjU6pm5v6xCfry6Fn6m3vBBU3OpLx
mOge6U696hwL3tNMuwfsIVFNQpoHJT+2Saq71jS+XZeGn+5wC3ovejREls0HIzze
kwHNIuMygB78uVwWyMJr
=XyRE
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-3.17-fuse-move' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/cleanup
Merge "ARM: tegra: move fuse code out of arch/arm" from Thierry Reding:
This branch moves code related to the Tegra fuses out of arch/arm and
into a centralized location which could be shared with ARM64. It also
adds support for reading the fuse data through sysfs.
Included is also some preparatory work that moves Tegra-related header
files from include/linux to include/soc/tegra as suggested by Arnd.
Furthermore the Tegra chip ID is now retrieved using a function rather
than a variable so that sanity checks can be done. This is convenient
in subsequent patches that will move some of the code that's currently
called from Tegra machine setup into regular initcalls so that it can
be reused on 64-bit ARM. The sanity checks help with verifying that no
code tries to obtain the Tegra chip ID before the underlying driver is
properly initialized.
* tag 'tegra-for-3.17-fuse-move' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
soc/tegra: fuse: fix dummy functions
soc/tegra: fuse: move APB DMA into Tegra20 fuse driver
soc/tegra: Add efuse and apbmisc bindings
soc/tegra: Add efuse driver for Tegra
ARM: tegra: move fuse exports to soc/tegra/fuse.h
ARM: tegra: export apb dma readl/writel
ARM: tegra: Use a function to get the chip ID
ARM: tegra: Sort includes alphabetically
ARM: tegra: Move includes to include/soc/tegra
Signed-off-by: Olof Johansson <olof@lixom.net>
Nothing very fancy here, only the introduction from the new Allwinner A23 SoC.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJTyYkGAAoJEBx+YmzsjxAgF7sQAMBIpDf5H7ivlF4bp+G3oaZA
w09Nk76g/PYxPOWuOY8wP2U/5XTbWflsLEWKtIX02Ig2u6cHIVzZ4iPixHlpkV5l
0jwVwF3MDNJ5EdRh8Hgb2pQ6UpswMWdwVweFyQc7TngKimRLxFBh53SELfOUe3eR
JX55EtjH0c3ui3JMgdRLV+HiwOf87n9v1mMipAU1f2m75tQf3CeJ0PhNajvBZa7u
WvMKit7wFGZ4n24mh9ch/ZekYQIlE19kho0EWtfjEt/rrSjL1Htwg0Rpo09obdN7
Mcbh/u7mNi7VwG0scBWhgNVTE2DyQygB+phGKEER8jbsG+hIvihlk+hkvne8COdF
vqjQJoE+O/3iEFojOsLZ/sGeGrb505dBugSRnU8/P6fnP043ElNHzYz45HV+8prS
H6AJRkPI4yIM4LuVO+wcpht/KsS9kgWktHY7wWRoSOHZwmLHp+oIKRiCZhavZbzm
blX6/7NMvuIx/P/0Cgc0CAbv2igSBpwy6xzGt3Jx0yu2YGTKedrVUl1AfVLv5BYx
fubGbMfwh5OKPiTl+kHeUf32cEpHJLQGYeGJ5tn1Pv5l9FpLENQTsJSWdMCpqYPE
2Csn5UvmrdFZ0dl5OoFPUOQ2QLjotz2EjnAOBSKha2ZHYgTDEX/FIWz1pdfCk1I9
LkbGzjWxVh6sYb3Dnzy3
=z+k2
-----END PGP SIGNATURE-----
Merge tag 'sunxi-core-for-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into next/soc
Merge "Allwinner core additions for 3.17" from Maxime Ripard:
Nothing very fancy here, only the introduction from the new Allwinner A23 SoC.
* tag 'sunxi-core-for-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux:
ARM: sunxi: select MFD_SUN6I_PRCM when sun8i arch support is enabled
ARM: sunxi: Add earlyprintk support using R_UART (sun6i/sun8i)
ARM: sunxi: Introduce Allwinner A23 support
Signed-off-by: Olof Johansson <olof@lixom.net>
Among the few patches that we have so far, there's a few noticeable changes:
- Introduction of the Allwinner A23 SoC
- Support for the GMAC on the A31. This is only available so far on the
boards which bootloader enable the PHY regulator.
- Addition of the infrared receiver
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJTyYdmAAoJEBx+YmzsjxAgQO4QALUmVQllTZc+aha/BG+MNYds
KpyIPvRuQ4npHNV+AjPtxthrQFlkEkwJ73JD0d8EzdOrkh0x5vrnlGwwprsa864V
PIc2gB5q0dgK5EKx1jaa7+S+RopxZh8zpIc557tanHqG5QKfPSArxS7Y2Yidsztk
GmfcZ/Y22HWGE/uGGieO5j+j+hGV1wKuLo+IP25UpE8XynFjCIcK9l0UREp24xW4
RLc873nRQhrp1KTtijrgv+qC3P1l432n0f0vmvwY5/izfE50vXU/FN9W/6X/0Gg9
CTS8hhZ2p3ILVoOgpSJVHRJ/SejYQkzL2r+hOTeXKpxjoHcI2FgrAJ+BpSLDNcYJ
XyT/N95eeC8sPUBQe2fwyD+qW4q0qnfeCth9FAsIzXHVUsanVhA/gaWJhU/R7FkO
uGbUFUBRoBJs3BvDnJ31zilHqzryldykEJRQcYQ8zc5h2EP10yf3MAt04ZyB++/4
d+YFVR71k10QFqBiHqKzYk3btjG7k+OslPHJe7Ijoheap4ZMzTQFah4/X/x3uOIO
XN5ay0jh5Ll1cuGQm4q6c8DggEVxOmKeF9AehTjZh3bG/aBFIuxoI85m1WTeUWEU
h2dJ8591YkmBJIF7dy0lue1QqY0CkG9iiKDt0wIeEjRdInggr7ZH3C7CzB+dk+gE
9BctMcK14uDrFw3DseWz
=QpT9
-----END PGP SIGNATURE-----
Merge tag 'sunxi-dt-for-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into next/dt
Merge "Allwinner DT additions for 3.17" from Maxime Ripard:
Among the few patches that we have so far, there's a few noticeable changes:
- Introduction of the Allwinner A23 SoC
- Support for the GMAC on the A31. This is only available so far on the
boards which bootloader enable the PHY regulator.
- Addition of the infrared receiver
* tag 'sunxi-dt-for-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux: (22 commits)
ARM: dts: sun6i: Add Merrii A31 Hummingbird support
ARM: dts: sun6i: Add ethernet alias for GMAC
ARM: dts: sun6i: Add A31 GMAC gigabit ethernet controller node
ARM: dts: sun6i: Add GMAC clock node to the A31 dtsi
ARM: dts: sun6i: Add pin muxing options for GMAC
ARM: sun8i: Add PRCM clock and reset controller nodes to the DTSI
ARM: sun8i: Add reset controller nodes to the DTSI
ARM: sun8i: Add basic clock nodes to the DTSI
ARM: dts: sun4i: Add ir node to various boards
ARM: dts: sun4i: Add ir controller nodes and pinmux
ARM: dts: sun4i: Add new ba10-tvbox board
ARM: dts: sun7i: Add board support for LinkSprite pcDuino V3
ARM: dts: sun7i: Add ir receiver support to a20-i12-tvbox
ARM: dts: sun7i: Rename sun7i-a20-ir to sun4i-a10-ir
ARM: dts: sun7i: Add AXP209 support to various boards
ARM: dts: sun4i: Add AXP209 support to various boards
ARM: dts: sunxi: Add #interrupt-cells to pinctrl nodes
ARM: sun8i: dt: Add Ippo-q8h v5 support
ARM: sunxi: Add Allwinner A23 dtsi
ARM: sunxi: Add IR controllers on A20 to dtsi
...
Signed-off-by: Olof Johansson <olof@lixom.net>
- Document and use new cadence serial binding
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.10 (GNU/Linux)
iEYEABECAAYFAlPI73sACgkQykllyylKDCGYzQCggc3g80f6R008+SNKlrN0Wuy+
b9kAnjqTO0Q0kDf4PlI/a5EVsfPmOzoS
=Bo6W
-----END PGP SIGNATURE-----
Merge tag 'zynq-dt-for-3.17' of git://git.xilinx.com/linux-xlnx into next/dt
Merge "Xilinx Zynq changes for v3.17" from Michal Simek:
arm: Xilinx Zynq dt patches for v3.17
- Document and use new cadence serial binding
* tag 'zynq-dt-for-3.17' of git://git.xilinx.com/linux-xlnx:
ARM: zynq: DT: Migrate UART to Cadence binding
tty: cadence: Document DT binding
+ Linux 3.16-rc5
Signed-off-by: Olof Johansson <olof@lixom.net>
- Add device tree sources and pin function header for i.MX6SX SoC
- Initial imx6sx-sdb board support with FEC, MMC, USB, PMIC, Audio
and GPIO key enabled
- New board support: mbimxsd25 and mbimxsd27 from Eukrea, aristainetos
imx6dl boards, Rex Pro and Basic, Ka-Ro TX6
- Restructure imx6qdl-wandboard.dtsi for new rev C1 board
- Split M28EVK and M53EVK into SoM and EVK parts
- A few correction around SDMA, SSI and SATA device nodes
- Add eSATA support for Cubox-i board
- Updates on edmqmx6 to enable PCIe, I2C and CAN
- Use DT macro for clock ID for imx27 and imx6qdl
- Add FlexCAN support for VF610 SoC
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJTyOTXAAoJEFBXWFqHsHzOnMgH/1Kjr8tbtPEx0aJ8HDAqAY7t
L4oDPZOt5QtbkWN4PH00yvgpN/ODl5ux6u1OKXt6F/XYXcBWBngGcIpPl5Qwo8lG
WMOt+OLh6xWSRwvzi9iXKU18PDbHvtHmSHCPLDC64T2esi8AuQIuWW8zWl+NAYhs
yrhjxVN8VQBuc3XubxNjATXr4ybsB4uhpshuFYUvyGo+KeRNJv2aNen//KyFPVNC
VuD/cRag46uWKymJ8gMtl5B5WzbIOqfs5wPHaULiIv8IJzItPW+PbGzyVK1XuTzl
pRbQAIqw7BPCzKpJ1elyvz9MThYyJOhV7F36GZyZIVCvITDoH9bdR9ib1EH4Wyc=
=q+sf
-----END PGP SIGNATURE-----
Merge tag 'imx-dt-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt
Merge "ARM: imx: device tree updates for 3.17" from Shawn Guo:
The i.MX device tree updates for 3.17:
- Add device tree sources and pin function header for i.MX6SX SoC
- Initial imx6sx-sdb board support with FEC, MMC, USB, PMIC, Audio
and GPIO key enabled
- New board support: mbimxsd25 and mbimxsd27 from Eukrea, aristainetos
imx6dl boards, Rex Pro and Basic, Ka-Ro TX6
- Restructure imx6qdl-wandboard.dtsi for new rev C1 board
- Split M28EVK and M53EVK into SoM and EVK parts
- A few correction around SDMA, SSI and SATA device nodes
- Add eSATA support for Cubox-i board
- Updates on edmqmx6 to enable PCIe, I2C and CAN
- Use DT macro for clock ID for imx27 and imx6qdl
- Add FlexCAN support for VF610 SoC
* tag 'imx-dt-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (125 commits)
ARM: dts: vf610: add FlexCAN node
ARM: dts: add initial Rex Basic board support
ARM: dts: add initial Rex Pro board support
ARM: dts: mx5: Split M53EVK into SoM and EVK parts
ARM: dts: imx6: RIoTboard explicitly define pad settings
ARM: dts: vf610: fix length of eshdc1 register property
ARM: dts: Restructure imx6qdl-wandboard.dtsi for new rev C1 board.
ARM: dts: imx53: correct clock-names of SATA node
ARM: imx6: Align ssi nodes between mx6 variants
ARM: i.MX27 clk: dts: Use clock defines in DTS files
ARM: dts: imx: correct sdma compatbile for imx6sl and imx6sx
ARM: dts: imx6sx-sdb: Add audio support
ARM: dts: imx6sx: Pass the fsl,fifo-depth property
ARM: dts: imx6sx: Fix sdma node
ARM: dts: imx6: edmqmx6: Add can bus
ARM: dts: imx6: edmqmx6: Add two other i2c buses
ARM: dts: imx6: edmqmx6: Add PCIe support
ARM: dts: imx25-pdk: Add USB OTG support
ARM: dts: i.MX53: add aipstz nodes
ARM: dts: mxs: Split M28EVK into SoM and EVK parts
...
Signed-off-by: Olof Johansson <olof@lixom.net>
- Add devicetree support for i.MX1 and i.MX21 clock driver
- Use CLOCKSOURCE_OF_DECLARE() to initialize timer for DT targets
- Use of_clk_init() to initialize i.MX25 and i.MX27 clock driver in
device tree boot
- Remove i.MX1 camera support
- Remove i.MX27 IP Camera and Lite-Kit board support
- Add suspend and cpuidle support for i.mx6sx
- Clean up unused clk_register_clkdev() lookups
- Update imx-weim bus driver to support populating devices on a simple
bus
- Switch i.MX27 and i.MX6QDL clock driver to use macro for clock IDs
- Make i.MX51 a DT only platform and clean up the non-DT support code
- Support disabling supervisor protect via DT
- Random defconfig updates
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJTyN58AAoJEFBXWFqHsHzO6WUH/2d/ZYyXS94Iw/kPm1FEweDg
0wtHVb+Fs/Sjj961xASATNepBwOzpQ1ykI++kvZ1TQXk+FdaYEcB9idmTPycAp9j
QcEmhvxjPmGJtjmTzc/zogL7tTf8TVKX0zGbFGhdpT5tmulY8NA6skAQpB0HAt+s
I95O5t+adwNTl7hAcQWGxOb8E+CA2gJCPdnJ5rdPHr2nzw6B7SjjnjeC90vIbDdh
b6jtfePLvbRUIif0kZuVMXWvebNYa+iRsXsvpoV95q3VJhoR2wPN+H4xnfNviJPb
h+nzibRgrPTyxMWWZ3jtUjw4YIvNdrJWaulC2incOAIQTb7zxrn5w5qxxP3Uj4k=
=RGCO
-----END PGP SIGNATURE-----
Merge tag 'imx-soc-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/soc
Merge "ARM: imx: SoC changes for 3.17" from Shawn Guo:
The i.MX SoC changes for 3.17:
- Add devicetree support for i.MX1 and i.MX21 clock driver
- Use CLOCKSOURCE_OF_DECLARE() to initialize timer for DT targets
- Use of_clk_init() to initialize i.MX25 and i.MX27 clock driver in
device tree boot
- Remove i.MX1 camera support
- Remove i.MX27 IP Camera and Lite-Kit board support
- Add suspend and cpuidle support for i.mx6sx
- Clean up unused clk_register_clkdev() lookups
- Update imx-weim bus driver to support populating devices on a simple
bus
- Switch i.MX27 and i.MX6QDL clock driver to use macro for clock IDs
- Make i.MX51 a DT only platform and clean up the non-DT support code
- Support disabling supervisor protect via DT
- Random defconfig updates
* tag 'imx-soc-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (69 commits)
ARM: imx: clk-vf610: fix FlexCAN clock gating
ARM: i.MX: Use CLOCKSOURCE_OF_DECLARE() for DT targets
ARM: i.MX53: globally disable supervisor protect
ARM: i.MX: allow disabling supervisor protect via DT
ARM: i.MX27 clk: Add 26 MHz oscillator circuit clock gate
ARM: i.MX27 clk: Remove unused definitions
ARM: i.MX27 clk: Introduce DT include for clock provider
ARM: i.MX: Remove Freescale Logic Product Development i.MX27 Lite-Kit board support
ARM: i.MX: Remove excess symbols ARCH_MX1, ARCH_MX25 and MACH_MX27
ARM: i.MX: Remove i.MX1 camera support
ARM: imx: use PTR_ERR_OR_ZERO
bus: imx-weim: populate devices on a simple bus
ARM: imx: build cpu_is_imx6sl function conditionally
ARM: imx: imx6sx uses imx6q cpuidle code
ARM: imx: drop PL310 errata 588369 and 727915
ARM: imx_v6_v7_defconfig: add FSL_EDMA and PRINTK_TIME
ARM: imx: clk-imx6sx: register SSI/SSI_IPG as shared gate clocks
ARM: imx_v6_v7_defconfig: Enable flexcan driver for can support
ARM: imx_v6_v7_defconfig: Enable STMPE gpio support
ARM: imx: mark .dt_compat as const
...
Signed-off-by: Olof Johansson <olof@lixom.net>
The genmai board code is going away so remove:
* The genmai defconfig
* MACH_GENMAI from shmobile defconfig
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJTyGCjAAoJENfPZGlqN0++G3sP/Rho5Lwofa3yD1ED2teVBSIw
sQtEvfVsgWHy4iHib1gqVY2fdNb1lMwR3jUsSwoPBljIuonDPHcbOz9+qK1xY9iG
SiJ4H2iFXX9oUNWKoUMHuexAIudXAzzhs8m8senDX5sPDJmhuv13b/LWA5ScjCPP
kvEPi/7gasObuHopLIKsWQczWgpzqzz9q/l75HzcNiSPvEsMLebXXPbEBaHnCfpw
JEgFCGTWk47qka3AGBslpBZMlkR1WviTFgg8HU2C0DBjNrrKB1cZjzgnVvRetgft
Hcs3ZR9ko8VdUhN9co9hDAr2LIznQ7S7TwDLQF1/3/5TxMzMTHHefHM5Pxh8OZKE
jEFd3e/Zapz30F1o/R2odQg5DcXgg65k1T42VvnTCqKq0KDR0jkhdEcm6OrH3jFf
Q0RfcZyJA5SDxP+0zutHq5tFIXv/h8FvMOezcGL9lpUvQ9T7N+LMo1wDiQZ1t0Kr
uGSeK5s8QA71v5M9dnWGsyxMkcS+/93F6IhCMkXsq8Ocq4n38cXArgv9SPips1jF
tAEQm+UYRQ3q7pKyW2LjtTDXeg0XEGioGPAP2TMadMUoBQE3u87Ou6jgSQmv7O5U
o99iW3Wog8lvIOD7hyjAMxlOKF0BWsiOahNoE8BWMcfW1F7p9kA+BCm3z+msdrt7
pxc97pJ0/VITQpIa8+h+
=6wuI
-----END PGP SIGNATURE-----
Merge tag 'renesas-defconfig4-for-v3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/defconfig
Merge "Fourth Round of Renesas ARM Based SoC Defconfig Updates for v3.17" from
Simon Horman:
The genmai board code is going away so remove:
- The genmai defconfig
- MACH_GENMAI from shmobile defconfig
* tag 'renesas-defconfig4-for-v3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: defconfig: Remove MACH_GENMAI
ARM: shmobile: genmai: remove defconfig
Signed-off-by: Olof Johansson <olof@lixom.net>
Pull locking fixes from Thomas Gleixner:
"The locking department delivers:
- A rather large and intrusive bundle of fixes to address serious
performance regressions introduced by the new rwsem / mcs
technology. Simpler solutions have been discussed, but they would
have been ugly bandaids with more risk than doing the right thing.
- Make the rwsem spin on owner technology opt-in for architectures
and enable it only on the known to work ones.
- A few fixes to the lockdep userspace library"
* 'locking-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
locking/rwsem: Add CONFIG_RWSEM_SPIN_ON_OWNER
locking/mutex: Disable optimistic spinning on some architectures
locking/rwsem: Reduce the size of struct rw_semaphore
locking/rwsem: Rename 'activity' to 'count'
locking/spinlocks/mcs: Micro-optimize osq_unlock()
locking/spinlocks/mcs: Introduce and use init macro and function for osq locks
locking/spinlocks/mcs: Convert osq lock to atomic_t to reduce overhead
locking/spinlocks/mcs: Rename optimistic_spin_queue() to optimistic_spin_node()
locking/rwsem: Allow conservative optimistic spinning when readers have lock
tools/liblockdep: Account for bitfield changes in lockdeps lock_acquire
tools/liblockdep: Remove debug print left over from development
tools/liblockdep: Fix comparison of a boolean value with a value of 2
A smaller set of fixes this week, and all regression fixes:
- a handful of issues fixed on at91 with common clock conversion
- a set of fixes for Marvell mvebu (SMP, coherency, PM)
- a clock fix for i.MX6Q.
- ... and a SMP/hotplug fix for Exynos
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.14 (GNU/Linux)
iQIcBAABAgAGBQJTygXeAAoJEIwa5zzehBx3bt0P/2ofpoOuYRV88sHjI9w+0R+F
6t8WIFtTSFypI3zD6cSFBR38wTHI4mJ/jBb0ZnIhGXZE3Bzl/n9Moz7UElxsDD9v
AjMWzyx6XrSJSCATczN/CDMX38QN+0NZW+hdXODGz9g7DrVGT/Z2jqugkaPAkAwy
gVBmCqa+nkksfQCcQF3LDVmCyDUMHKILfUvyQJ217QbIavxO3kU/2wLdgEQpUCrI
YUWAnAj+S/xoxd6OYJr9nMd+M6P9nkRdy+dD56nJtSiZdFwFoI+EgfhUkT3iezPN
q3aYg3GbgiM/Fp8IO58tE2CbbG/xWJH+kwkJ03yl3z1Gx2KqAYeBpy2QMLBR9rUf
F0axul3EeW9Gf7OEEFKQbCW8ETaP2AMEbm11FZkjJxMlNjbG9zkYFnl0oedLXxTA
AcOPB7ABIWU1PsXXTqD9ZxjZmAsKL4CCck0BnWdOyQT5c9gA4ePEGEDMjeT/OiZE
QwlujHFl4M4E1XFJRL6RiBYppNLBKTsrgl+HaoDSW/MbD350WqbOFTzngw9Xy/rO
n7YNxUR2QFfWCNY1Zk8J8oJI/ISxla2bthhIe0+l/kk/zVUM3OMEClp0Fdw/L55X
Md/fc7FzQKV9GPhtSz1RGDN4bjdJuGmitjMrYf+YhbWHa6iKS3XkkHBNpkKhY8Kf
h9MsTmjd0En4BJLUqf0h
=LOtI
-----END PGP SIGNATURE-----
Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Olof Johansson:
"A smaller set of fixes this week, and all regression fixes:
- a handful of issues fixed on at91 with common clock conversion
- a set of fixes for Marvell mvebu (SMP, coherency, PM)
- a clock fix for i.MX6Q.
- ... and a SMP/hotplug fix for Exynos"
* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
ARM: EXYNOS: Fix core ID used by platsmp and hotplug code
ARM: at91/dt: add missing clocks property to pwm node in sam9x5.dtsi
ARM: at91/dt: fix usb0 clocks definition in sam9n12 dtsi
ARM: at91: at91sam9x5: correct typo error for ohci clock
ARM: clk-imx6q: parent lvds_sel input from upstream clock gates
ARM: mvebu: Fix coherency bus notifiers by using separate notifiers
ARM: mvebu: Fix the operand list in the inline asm of armada_370_xp_pmsu_idle_enter
ARM: mvebu: fix SMP boot for Armada 38x and Armada 375 Z1 in big endian
window:
- Enable irqchip crossbar interrupt mapping. These changes
are based on an immutable irqchip branch set up by Jason
Cooper to make it easier to merge the related .dts changes.
- Removal of omap2 related static clock data that now comes
from device tree.
- Enabling of PHY regulators for various omaps
- Enabling of PCIe for dra7
- Add support for am437x starterkit
- Enable audio for for omap5
- Enable display and am335x-evmsk
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJTxj2LAAoJEBvUPslcq6VzQX0QALzyimJdW8GX+9hV1+LgtiPU
eTtR+LxZt1dR5n2EeaNk9dn1DmmNqyQKN5VVB36rdaC2P7NgAfQgOwzG2RBos5mX
Nap/DkMYs1NbNrgJCJVaND85HD2ZNyu8+Au2h1ggZC7xoAZbWlIDdR2livo454tf
Whdjhm47dCTeIagFxBwAnuVml2Ry7P1pA7Gr8AGteAmsOrUwXdwevC4HqCEAhuG8
2bINI71JhvpJ3tvV12VeJqAEZn7GWU5xnJYt7Kftm6RK8chuC0Ohfmo/BHO2DTVy
BPBZDs6fYY8/2lBY/q3UCA3MSqBSLo9lxK+l8n5jaQVPse+6h7uVGijQxQZRcHqf
7oP3tjLeTcszjoiQYSTKcQK65zpu+n7P1UAS4J3IjAoRC7Pi2Qvq5h4ABrxipQMY
rctj2GLvNOV4ntx2GceXeyMGQBvu/p6GAFE7jmj0xLO4kBDORaY8PmQySXF81A12
a0cCNL4g/YexeAfYXr4z6gyjGwOK4XbQocDkH9MlqAgQlSsb501tY7Xe2I/aAaYs
IN4F5sBdvhBAuP79qFXOnlGgi2VkB3zcfu4MIIzIDxE2ZmPDRKv6oGVSGclVEzTd
4HZsZDu6442zaAQ5XbwwST4gIeCygnqj+qrOQ6uYXAvmt3MFzjZ66bdTZjPMp7cC
u7XduFmqLxsoGW7iuqqt
=4svh
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v3.17/dt-part1' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt
Merge "omap dts changes for v3.17 merge window, part1" from Tony Lindgren:
First set of .dts changes for omaps for v3.17 merge window:
- Enable irqchip crossbar interrupt mapping. These changes
are based on an immutable irqchip branch set up by Jason
Cooper to make it easier to merge the related .dts changes.
- Removal of omap2 related static clock data that now comes
from device tree.
- Enabling of PHY regulators for various omaps
- Enabling of PCIe for dra7
- Add support for am437x starterkit
- Enable audio for for omap5
- Enable display and am335x-evmsk
* tag 'omap-for-v3.17/dt-part1' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (43 commits)
ARM: DTS: omap5-uevm: Enable basic audio (McPDM <-> twl6040)
ARM: DTS: omap5-uevm: Add node for twl6040 audio codec
ARM: DTS: omap5-uevm: Enable palmas clk32kgaudio clock
ARM: dts: dra7: Add dt data for PCIe controller
ARM: dts: dra7: Add dt data for PCIe PHY
ARM: dts: dra7: Add dt data for PCIe PHY control module
ARM: dts: dra7xx-clocks: Add missing clocks for second PCIe PHY instance
ARM: dts: dra7xx-clocks: rename pcie clocks to accommodate second PHY instance
ARM: dts: dra7xx-clocks: Add missing 32KHz clocks used for PHY
ARM: dts: dra7xx-clocks: Change the parent of apll_pcie_in_clk_mux to dpll_pcie_ref_m2ldo_ck
ARM: dts: dra7xx-clocks: Add divider table to optfclk_pciephy_div clock
ARM: dts: dra7-evm: Add regulator information to USB2 PHYs
ARM: omap2plus_defconfig: enable TPS65218 configs
ARM: dts: AM437x: Add TPS65218 device tree nodes
ARM: dts: AM437x: Fix i2c nodes indentation
ARM: dts: AM43x: Add TPS65218 device tree nodes
ARM: dts: Add devicetree for Gumstix Pepper board
ARM: dts: dra7: add crossbar device binding
ARM: dts: dra7: add routable-irqs property for gic node
ARM: OMAP24xx: clock: remove legacy clock data
...
Signed-off-by: Olof Johansson <olof@lixom.net>
Merge "ARM: SPEAr13xx PCIe updates for v3.17" from Viresh Kumar:
This is another attempt to merge SPEAr PCIe updates after olof
pointed out *enough* issues with initial PULL request:
https://lkml.org/lkml/2014/7/9/641
Last version was sent here: http://patchwork.ozlabs.org/patch/368479/
and all the nits pointed out by Kishon & Bjorn are fixed in this pull
request.
Apart from ARM specific changes, this updates drivers/{pci|phy}. Bjorn
advised to get complete series via arm-soc tree earlier:
http://www.spinics.net/lists/linux-pci/msg30271.html
* 'spear/pcie-support-v10' of git://git.kernel.org/pub/scm/linux/kernel/git/vireshk/linux:
ARM: SPEAr13xx: Update defconfigs
ARM: SPEAr13xx: Add pcie and miphy DT nodes
ARM: SPEAr13xx: Add bindings and dt node for misc block
ARM: SPEAr13xx: Fix static mapping table
phy: Add drivers for PCIe and SATA phy on SPEAr13xx
PCI: spear: Add PCIe driver for ST Microelectronics SPEAr13xx
Signed-off-by: Olof Johansson <olof@lixom.net>
* Add legacy clocks for SCI for SoCs that do not yet have CCF support.
This is to allow SCI (serial) devices to be enabled using DT and
will be removed after CCF support is added for each SoC.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJTxKxCAAoJENfPZGlqN0++Bt4QAIr9N0wh2V77cQSMegTDlRRg
sawwaTStkG8mbuRdUrYGS/kWJg1UvKvvB4pNG5IHm5vjycg5f4ya8a9fK5rXwXGx
lW1G8xKxb9LSgOtZaMLXzZPI1v6C1GOVzDmouhZ19WvlFtRI7OJKrX7dvvWnU3+R
8XxsU/XRX8o0NWa/vZg/524+pwyffZihREY30LUcJwsFbFpChwki6KETl/RuTB8J
SqlpbXv964D9CZ9fF4UkTkN64wGODxPYTsUTfOl7QlMIkHb9ajA/OordGg5zZWvJ
phk0tgfr0Y/Lar9LzKheR9qLPRdD1oqVsQ+7COpleIiF+Iey8ICsV13CXgsp9qA9
FqFyUd7xneZ0Jeigw4vgCT474I84E9Q/cXLnN/ExBgStAGhf/IDB7U+CvKaDd6qB
+UVKFRjGJgDjzXy05WYtckrH2xHMS4HYdkg+XxKgxXmTl/0NEFRvZa9B1aE3A0FK
adzdxLckOzebgIIpN1IL7V8851h+Yo0YnigMmrf0zlv2QVwn9bjQ3XSfxVCTEhjJ
Qp1ECqGJIluKQ2HC5KDjsxShdTZGicIQlOn2DW6gZPF1zWqTv/A7cD4tP+lwhLhg
ThKALzIj4jPWIKCO0C9Fe73LXZXoQ8NShIGBKhGaIxVYJgz6B8KYv9dkHD+Q262X
mdUAYDVpoKPfpFd8jRyE
=HQjb
-----END PGP SIGNATURE-----
Merge tag 'renesas-clock2-for-v3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc
Merge "Second Round of Renesas ARM Based SoC Clock Updates for v3.17" from
Simon Horman:
- Add legacy clocks for SCI for SoCs that do not yet have CCF support.
This is to allow SCI (serial) devices to be enabled using DT and
will be removed after CCF support is added for each SoC.
* tag 'renesas-clock2-for-v3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: sh73a0: add SCI clock support for DT
ARM: shmobile: r8a7740: correct SCI clock support for DT
ARM: shmobile: r8a73a4: add SCI clock support for DT
ARM: shmobile: r8a7778: add SCI clock support for DT
Signed-off-by: Olof Johansson <olof@lixom.net>
When CPU topology is specified in device tree, cpu_logical_map() does
not return core ID anymore, but rather full MPIDR value. This breaks
existing calculation of PMU register offsets on Exynos SoCs.
This patch fixes the problem by adjusting the code to use only core ID
bits of the value returned by cpu_logical_map() to allow CPU topology to
be specified in device tree on Exynos SoCs.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
It fixes a hard machine hang regression for boards where only pcie is
active but no sata, as the latest imx6-pcie driver is no longer enabling
the upstream clock directly but only lvds clk out.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJTyNTvAAoJEFBXWFqHsHzOm6kIAIQnvL429KlsyQAkZTpwHR/l
omETpfgmjTIpGJ4hYE04Kdi8w/O7GrAVUFe0moBETPRshHBJhYGCDgVuM38fA/PB
dd6vkCL1rS1bELaFFfTzFE07BlbZRSXy6PEs8/9wcE8vQOJ/BEKjscNY6PspKDMb
txRnmDUf9R+YdKBAY7CWTXC465Vtfiz8vFf1v73t+URxi/YTAut7s50V1IaXZf1E
g+W8G6SME8j1mOfPrq6hRdxijLsJ0QpKDVZay4Sb19+WMnLXXrc4M3skQsDUScp8
3dfdJBy/fVtFwQlmcK2z78rr6netMTbIVTDJjbJiz2Eb0kIZXgsDW5Jkgr+6uqE=
=S50Z
-----END PGP SIGNATURE-----
Merge tag 'imx-fixes-3.16-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into fixes
Merge "ARM: imx: fixes for 3.16, 2nd take" from Shawn Guo:
The i.MX fixes for 3.16, 2nd take:
It fixes a hard machine hang regression for boards where only pcie is
active but no sata, as the latest imx6-pcie driver is no longer enabling
the upstream clock directly but only lvds clk out.
* tag 'imx-fixes-3.16-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: clk-imx6q: parent lvds_sel input from upstream clock gates
Signed-off-by: Olof Johansson <olof@lixom.net>
- Fix SMP boot on 38x/375 in big endian
- Fix operand list for pmsu on 370/XP
- Fix coherency bus notifiers
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIcBAABAgAGBQJTyZAQAAoJEP45WPkGe8Zn+DIQAIWvUhQ/7rsThFThmlsa4t01
8l4PqWlPznHHfSAfcM5JZtGBpKvqHhf+e6Hn8wPXek4u7v1x2K6dREk2JgsGZQMP
rsA2Ajn8jseFQb+iBnzdr1eV0AkztlGy0pJ4N+S4pogp4pzn6WPPNGz7P9UUzW/U
U2I8NycTqzsq8siODK/AbqLfFfok2M/++QgNOdEli1cQ44NdYyAzVLeqe/C9Ou6K
fn6RdscbvK/jWmrWi9CS4lhnhNkG8HBxxpzF4Rm06dWDU6z+B/HECq8yjHJlX9rx
EsxiJRV6nzUiws+/o19CUsl/lsJP0pfiTDXCoiUUhOovYUukm632ySdG5QfjnYaK
zsRw9hBnHCfHW5QEt6NaY5fVknnQPmJMM7WsW9B7PtQX4Rl38CWhLdq3LAbPVv9V
ze1AllUSmBLTYuQHFMuA602ZzngFcw1c+ZOmfrOpX+QYlyiv1CkqUOXiVGHNb2Nn
NPiCZaDp8d+JvWloOme0aZX+XfgfUOeXxogtYCtFBTGe9C+P6oqzPni3hqcvL7PA
PUo6BRe1KIOaQuUm0Eh/XqWC5Nyo0gcXm1oM8JgovVTT6RQndPIQLfO9isOa5A+b
PaLrAYtzHge+cCU4TJShYzjcVGzz1K2hsINjJ9NlW8172LbC1g5wQWrUVPFHrLuz
WoZYmkmNzNd8EGQwXdkj
=tq91
-----END PGP SIGNATURE-----
Merge tag 'mvebu-fixes-3.16-3' of git://git.infradead.org/linux-mvebu into fixes
Merge "mvebu fixes for v3.16 (round 3)" from Jason Cooper:
- Fix SMP boot on 38x/375 in big endian
- Fix operand list for pmsu on 370/XP
- Fix coherency bus notifiers
* tag 'mvebu-fixes-3.16-3' of git://git.infradead.org/linux-mvebu:
ARM: mvebu: Fix coherency bus notifiers by using separate notifiers
ARM: mvebu: Fix the operand list in the inline asm of armada_370_xp_pmsu_idle_enter
ARM: mvebu: fix SMP boot for Armada 38x and Armada 375 Z1 in big endian
Signed-off-by: Olof Johansson <olof@lixom.net>
This adds support for the A31 Hummingbird:
http://www.merrii.com/en/pla_d.asp?id=172
The Merrii A31 Hummingbird is a development board based on the
Allwinner A31 SoC with multiple USB ports through a USB hub chip,
a uSD slot, a 10/100/1000M ethernet port, an AP6210 WiFi/BT chip,
TV-in, HDMI, VGA, audio in/out ports, and LCD/CSI headers.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
[wens@csie.org: enable usbphy, ehci0, ohci0 for on-board usb hub;
add pcf8563 rtc node; add comments for i2c0 and mmc0 pull-ups;
correct ethernet phy address to 0x01; drop uart2 (BT chip has
no power) and uart3 (no device); use proper commit message]
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Alias GMAC as ethernet0 so U-boot can fill in the MAC address.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The A31 has the same GMAC found on the A20 SoC, except it has
an extra reset control.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The GMAC uses 1 of 2 sources for its transmit clock, depending on the
PHY interface mode. Add both sources as dummy clocks, and as parents
to the GMAC clock node.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The A31 SoC has a GMAC gigabit ethernet controller supporting
MII, GMII, RGMII modes. Add pin muxing options for these modes.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
After refactoring suspend/resume, which was last part with dependencies
on legacy code, all Kconfig symbols related to Samsung ATAGS support can
be deselected and more unused code removed. This includes most of s5p-*
code as well, as s5pv210 was their last user.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This makes it possible to enable the s5pv210 platform as part of a
multiplatform kernel. Also redundant Kconfig options are removed.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Move debug-macro.S from mach/include to include/debug where
all other common debug macros are.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch makes S5PV210 not rely on legacy suspend helpers in
plat-samsung and implements platform suspend logic locally, similarly to
Exynos.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Since all in-tree boards have been moved to device tree, we can now drop
legacy code and make mach-s5pv210 DT-only. This patch does it.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Add generic device tree for s5pv210 and s5pv210-pinctrl
Signed-off-by: Mateusz Krawczuk <m.krawczuk@partner.samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch adds board file that will be used to boot S5PV210/S5PC110-based
boards using Device Tree.
Signed-off-by: Mateusz Krawczuk <m.krawczuk@partner.samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
[t.figa: Rebased and cleaned-up a bit.]
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Since S5PV210 now has a complete clock driver using Common Clock
Framework, there is no reason to keep the old code. Remove it together
with the whole legacy Samsung-specific clock framework which no longer
has any users.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch migrates the s5pv210 platform to use new clock driver
using Common Clock Framework.
Signed-off-by: Mateusz Krawczuk <m.krawczuk@partner.samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
[t.figa: Rebased and fixed merge conflicts.]
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch add I2S (Inter-IC Sound) dt node which supports 1-port
stereo (1 channels) IIS-bus for audio interface with DMA-based
operation.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Inha Song <ideal.song@samsung.com>
Tested-by: Inha Song <ideal.song@samsung.com>
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This adds cros_ec to exynos5420-peach-pit and exynos5800-peach-pi,
including:
* The keyboard
* The i2c tunnel
* The tps65090 under the i2c tunnel
* The battery under the i2c tunnel
To add extra motivation, it should be noted that tps65090 is one of
the things needed to get display-related FETs turned on for pit and
pi.
Signed-off-by: Doug Anderson <dianders@chromium.org>
Tested-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Tested-by: Tushar Behera <tushar.b@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
In order to support cpuidle through mcpm, suspend and powered-up
callbacks are required in mcpm platform code.
Hence populate the same callbacks.
Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
Signed-off-by: Chander Kashyap <k.chander@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Exynos5420 is big.Little Soc. It uses cpuidle-big-litle generic cpuidle driver.
Hence do not allow exynos cpuidle driver registration for Exynos5420.
Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
The address of cpu power registers in pmu is based on cpu number
offsets. This function calculate the same. This is essentially
required in case of multi-cluster SoC's e.g Exynos5420.
Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch cleans a arm-pmu node up for exynos4. Only exynos4412 series
boards have four pmu interrupts. Rest of exynos4 boards, except 4412, have only
two pmu interrupts. Thus, we can define two interrupts in the
exynos4.dtsi and extends the interrupts only exynos4412.dtsi.
Cc: Chanwoo Choi <cw00.choi@samsung.com>
Cc: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Tested-by: Tushar Behera <tushar.behera@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
The pwm driver requires a clocks property referencing the pwm peripheral
clk.
Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Correct the typo error for the second "uhphs_clk".
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
commit 431a84b1a4
("ARM: 8034/1: Disable preemption in iwmmxt_task_enable()")
introduced macros {inc,dec}_preempt_count to iwmmxt_task_enable
to make it run with preemption disabled.
Unfortunately, other functions in iwmmxt.S also use concan_{save,dump,load}
sections located in iwmmxt_task_enable() to deal with iWMMXt coprocessor.
This causes an unbalanced preempt_count due to excessive dec_preempt_count
and destroyed return addresses in callers of concan_ labels due to a register
collision:
Linux version 3.16.0-rc3-00062-gd92a333-dirty (jef@armhf) (gcc version 4.8.3 (Debian 4.8.3-4) ) #5 PREEMPT Thu Jul 3 19:46:39 CEST 2014
CPU: ARMv7 Processor [560f5815] revision 5 (ARMv7), cr=10c5387d
CPU: PIPT / VIPT nonaliasing data cache, PIPT instruction cache
Machine model: SolidRun CuBox
...
PJ4 iWMMXt v2 coprocessor enabled.
...
Unable to handle kernel paging request at virtual address fffffffe
pgd = bb25c000
[fffffffe] *pgd=3bfde821, *pte=00000000, *ppte=00000000
Internal error: Oops: 80000007 [#1] PREEMPT ARM
Modules linked in:
CPU: 0 PID: 62 Comm: startpar Not tainted 3.16.0-rc3-00062-gd92a333-dirty #5
task: bb230b80 ti: bb256000 task.ti: bb256000
PC is at 0xfffffffe
LR is at iwmmxt_task_copy+0x44/0x4c
pc : [<fffffffe>] lr : [<800130ac>] psr: 40000033
sp : bb257de8 ip : 00000013 fp : bb257ea4
r10: bb256000 r9 : fffffdfe r8 : 76e898e6
r7 : bb257ec8 r6 : bb256000 r5 : 7ea12760 r4 : 000000a0
r3 : ffffffff r2 : 00000003 r1 : bb257df8 r0 : 00000000
Flags: nZcv IRQs on FIQs on Mode SVC_32 ISA Thumb Segment user
Control: 10c5387d Table: 3b25c019 DAC: 00000015
Process startpar (pid: 62, stack limit = 0xbb256248)
This patch fixes the issue by moving concan_{save,dump,load} into separate
code sections and make iwmmxt_task_enable() call them in the same way the
other functions use concan_ symbols. The test for valid ownership is moved
to concan_save and is safe for the other user of it, iwmmxt_task_disable().
The register collision is also resolved by moving concan_ symbols as
{inc,dec}_preempt_count are now local to iwmmxt_task_enable().
Fixes: 431a84b1a4 ("ARM: 8034/1: Disable preemption in iwmmxt_task_enable()")
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Reported-by: Jean-Francois Moine <moinejf@free.fr>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
When the CPU has support for the byte and word exclusive operations,
userspace should use them in preference to the SWP instructions.
Detect the presence of these instructions by reading the ISAR CPU ID
registers and adjust the ELF HWCAP mask appropriately.
Note that ARM1136 < r1p0 has no ISAR4, so this is explicitly detected
and the test disabled, leaving the current situation where HWCAP_SWP
is set.
Tested-by: Tony Lindgren <tony@atomide.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Previous CPUs do not have the ability to trap SWP instructions, so
it's pointless initialising this code there.
Tested-by: Tony Lindgren <tony@atomide.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
SWP is deprecated in ARMv6 and ARMv7 CPUs, but more importantly, when
running on a SMP system, SWP doesn't guarantee atomicity. This means
it can't really be used (by userspace) for locking purposes in a SMP
environment.
Currently, many configurations leave the SWP emulation disabled, which
means we never know if userspace executes this instruction on ARMv7
hardware. Rectify this by enabling SWP emulation for ARMv7 with SMP
(where we can trap the instruction.)
Tested-by: Tony Lindgren <tony@atomide.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The CP15 diagnostic register holds ARM errata bits on Cortex-A9, so it
needs to be saved/restored on suspend/resume. Otherwise, the
effectiveness of errata workaround gets lost together with diagnostic
register bit across suspend/resume cycle. And the CP15 power control
register of Cortex-A9 shares the same problem.
The patch adds a couple of Cortex-A9 specific suspend/resume functions
to save/restore these two Cortex-A9 CP15 registers across the
suspend/resume cycle.
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Acked-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This patch introduces a wfe-based polling loop for spinning on contended
MCS locks and waking up corresponding waiters when the lock is released.
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Recent contributions, including to DRM and binder, introduce 64-bit
values in their interfaces. A common motivation for this is to allow
the same ABI for 32- and 64-bit userspaces (and therefore also a shared
ABI for 32/64 hybrid userspaces). Anyhow, the developers would like to
avoid gotchas like having to use copy_from_user().
This feature is already implemented on x86-32 and the majority of other
32-bit architectures. The current list of get_user_8 hold out
architectures are: arm, avr32, blackfin, m32r, metag, microblaze,
mn10300, sh.
Credit:
My name sits rather uneasily at the top of this patch. The v1 and
v2 versions of the patch were written by Rob Clark and to produce v4
I mostly copied code from Russell King and H. Peter Anvin. However I
have mangled the patch sufficiently that *blame* is rightfully mine
even if credit should more widely shared.
Changelog:
v5: updated to use the ret macro (requested by Russell King)
v4: remove an inlined add on big endian systems (spotted by Russell King),
used __ARMEB__ rather than BIG_ENDIAN (to match rest of file),
cleared r3 on EFAULT during __get_user_8.
v3: fix a couple of checkpatch issues
v2: pass correct size to check_uaccess, and better handling of narrowing
double word read with __get_user_xb() (Russell King's suggestion)
v1: original
Signed-off-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Commit cb8db5d45 (UAPI: (Scripted) Disintegrate arch/arm/include/asm) moved
these syscall comments out of their context into the UAPI headers. Fix this.
Fixes: cb8db5d457 ("UAPI: (Scripted) Disintegrate arch/arm/include/asm")
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The section of the makefile that determines the TEXT_OFFSET is sorted
by address so that, in multi-arch kernel builds, the architecture with the
most stringent requirements for the kernel base address gets to define
TEXT_OFFSET. The comment should reflect that.
Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Add revision info for PL310_ERRATA_588369 and PL310_ERRATA_727915 to
help people understand if they need to enable the errata for their
hardware.
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Since pj4b suspend/resume routines are implemented based on generic
ARMv7 ones, instead of hard-coding cpu_pj4b_suspend_size, we should have
it be cpu_v7_suspend_size plus pj4b specific bytes. Otherwise, if
cpu_v7_suspend_size gets updated alone, the pj4b suspend/resume will
likely be broken.
While at it, fix the comments in cpu_pj4b_do_resume, as we're restoring
CP15 registers rather than saving in there.
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Tested-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Commit 78d7530ac3 ("ARM: Clean up linker script using new linker script
macros.") modified the arm kernel linker script to use the STABS_DEBUG
macro, but left a .comment section definition. As STABS_DEBUG defines
the .comment section in an identical way, the second section definition
is redundant and can be removed.
This patch removes the redundant .comment section definition.
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Use the newly introduced API so that FP is correctly referenced from
either R7/R11 based on whether we are running in THUMB2 mode or not.
Signed-off-by: Nikolay Borisov <Nikolay.Borisov@arm.com>
Acked-by: Will Deacon <will.deacon@arm.com>
Acked-by: Robert Richter <rric@kernel.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Use the newly-introduced frame_pointer macro to extract
the correct FP based on whether we are in THUMB2 mode or not.
Signed-off-by: Nikolay Borisov <Nikolay.Borisov@arm.com>
Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Make the unwind code use the correct API so that the frame pointer
is extracted from the correct register.
Signed-off-by: Nikolay Borisov <Nikolay.Borisov@arm.com>
Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Make use of the arm_get_current_stackframe api so that
the frame pointer is correctly referenced in THUMB2 mode
Signed-off-by: Nikolay Borisov <Nikolay.Borisov@arm.com>
Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Make the perf backend use the API so that it correctly references the FP
when in THUMB2 mode
Signed-off-by: Nikolay Borisov <Nikolay.Borisov@arm.com>
Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Currently there are numerous places where "struct pt_regs" are used to
populate "struct stackframe", however all of those location do not
consider the situation where the kernel might be compiled in THUMB2
mode, in which case the framepointer member of pt_regs become ARM_r7
instead of ARM_fp (r11). Document this idiosyncracy in the
definition of "struct stackframe"
The easiest solution is to introduce a new function (in the spirit of
https://groups.google.com/forum/#!topic/linux.kernel/dA2YuUcSpZ4)
which would hide the complexity of initializing the stackframe struct
from pt_regs.
Also implement a macro frame_pointer(regs) that would return the correct
register so that we can use it in cases where we just require the frame
pointer and not a whole struct stackframe
Signed-off-by: Nikolay Borisov <Nikolay.Borisov@arm.com>
Acked-by: Will Deacon <will.deacon@arm.com>
Acked-by: Robert Richter <rric@kernel.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
With patch #8067/1 ("zImage: ensure header in LE format for BE8 kernels")
applied, it is no longer possible to determine the endianness of a compiled
kernel image. This normally shouldn't matter to the boot environment,
except for those cases where the selection of a ramdisk or root filesystem
with a matching endianness has to be automated.
Let's add a flag to the zImage header indicating the actual endianness.
Four bytes from offset 0x30 can be interpreted as follows:
04 03 02 01 big endian kernel
01 02 03 04 little endian kernel
Anything else should be interpreted as "unknown", in which case it is
most likely that patch #8067/1 was not applied either and the zImage
magic number at offset 0x24 could be used instead to determine
endianness. No zImage before this patch ever produced 0x01020304 nor
0x04030201 at offset 0x30 so there is no confusion possible.
Signed-off-by: Nicolas Pitre <nico@linaro.org>
Acked-by: Kevin Hilman <khilman@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Save and report (via the procfs file) the last kernel unaligned fault
location. This allows us to trivially inspect where the last fault
happened for cases which we don't expect to occur.
Since we expect the kernel to generate misalignment faults (due to
the networking layer), even when warnings are enabled, we don't log
them for the kernel.
Tested-by: Tony Lindgren <tony@atomide.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
ARMv6 and greater introduced a new instruction ("bx") which can be used
to return from function calls. Recent CPUs perform better when the
"bx lr" instruction is used rather than the "mov pc, lr" instruction,
and this sequence is strongly recommended to be used by the ARM
architecture manual (section A.4.1.1).
We provide a new macro "ret" with all its variants for the condition
code which will resolve to the appropriate instruction.
Rather than doing this piecemeal, and miss some instances, change all
the "mov pc" instances to use the new macro, with the exception of
the "movs" instruction and the kprobes code. This allows us to detect
the "mov pc, lr" case and fix it up - and also gives us the possibility
of deploying this for other registers depending on the CPU selection.
Reported-by: Will Deacon <will.deacon@arm.com>
Tested-by: Stephen Warren <swarren@nvidia.com> # Tegra Jetson TK1
Tested-by: Robert Jarzmik <robert.jarzmik@free.fr> # mioa701_bootresume.S
Tested-by: Andrew Lunn <andrew@lunn.ch> # Kirkwood
Tested-by: Shawn Guo <shawn.guo@freescale.com>
Tested-by: Tony Lindgren <tony@atomide.com> # OMAPs
Tested-by: Gregory CLEMENT <gregory.clement@free-electrons.com> # Armada XP, 375, 385
Acked-by: Sekhar Nori <nsekhar@ti.com> # DaVinci
Acked-by: Christoffer Dall <christoffer.dall@linaro.org> # kvm/hyp
Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com> # PXA3xx
Acked-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com> # Xen
Tested-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> # ARMv7M
Tested-by: Simon Horman <horms+renesas@verge.net.au> # Shmobile
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Ensure that platform maintainers check the CPU part number in the right
manner: the CPU part number is meaningless without also checking the
CPU implement(e|o)r (choose your preferred spelling!) Provide an
interface which returns both the implementer and part number together,
and update the definitions to include the implementer.
Mark the old function as being deprecated... indeed, using the old
function with the definitions will now always evaluate as false, so
people must update their un-merged code to the new function. While
this could be avoided by adding new definitions, we'd also have to
create new names for them which would be awkward.
Acked-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Building of EXYNOS5420_MCPM with disabled SUSPEND fails:
arch/arm/mach-exynos/built-in.o: In function `exynos_mcpm_init':
arch/arm/mach-exynos/mcpm-exynos.c:361: undefined reference to `mcpm_loopback'
The exynos_mcpm_init() in mcp-exynos.c calls mcpm_loopback() which
depends on cpu_suspend function (ARM_CPU_SUSPEND).
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Acked-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The Chromebook firmware doesn't enable the CCI for the boot cpu, and
arguably it shouldn't have to either. Let's have the kernel handle the
CCI on its own for the boot CPU the same way it does it for secondary CPUs
by using the MCPM loopback.
This allows to boot all 8 cores on exynos5420-peach-pit,
exynos5800-peach-pi and ARM Chromebook 2.
Signed-off-by: Nicolas Pitre <nico@linaro.org>
Tested-by: Tushar Behera <tushar.b@samsung.com>
Reviewed-by: Kevin Hilman <khilman@linaro.org>
Tested-by: Kevin Hilman <khilman@linaro.org>
Tested-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This is not strictly needed on TC2 but still a good idea to exercise
that code.
Signed-off-by: nicolas Pitre <nico@linaro.org>
Reviewed-by: Kevin Hilman <khilman@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The kernel already has the responsibility to handle resources such as the
CCI when hotplugging CPUs, during the booting of secondary CPUs, and when
resuming from suspend/idle. It would be more coherent and less confusing
if the CCI for the boot CPU (or cluster) was also initialized by the
kernel rather than expecting the firmware/bootloader to do it and only in
that case. After all, the kernel has all the necessary code already and
the bootloader shouldn't have to care at all.
The CCI may be turned on only when the cache is off. Leveraging the CPU
suspend code to loop back through the low-level MCPM entry point is all
that is needed to properly turn on the CCI from the kernel by using the
same code as during secondary boot.
Let's provide a generic MCPM loopback function that can be invoked by
backend initialization code to set things (CCI or similar) on the boot
CPU just as it is done for the other CPUs.
Signed-off-by: Nicolas Pitre <nico@linaro.org>
Reviewed-by: Kevin Hilman <khilman@linaro.org>
Tested-by: Kevin Hilman <khilman@linaro.org>
Tested-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
After applying patch:
"ARM: 8078/1: get rid of hardcoded assumptions about kernel stack size"
following build failure happens on iop13xx platform:
In file included from include/linux/srcu.h:33:0,
from include/linux/notifier.h:15,
from include/linux/reboot.h:5,
from arch/arm/mach-iop13xx/include/mach/iop13xx.h:6,
from arch/arm/mach-iop13xx/include/mach/hardware.h:14,
from arch/arm/mach-iop13xx/include/mach/memory.h:4,
from arch/arm/include/asm/memory.h:24,
from arch/arm/include/asm/page.h:163,
from arch/arm/include/asm/thread_info.h:17,
from include/linux/thread_info.h:54,
from include/asm-generic/preempt.h:4,
from arch/arm/include/generated/asm/preempt.h:1,
from include/linux/preempt.h:18,
from include/linux/spinlock.h:50,
from include/linux/seqlock.h:35,
from include/linux/time.h:5,
from include/uapi/linux/timex.h:56,
from include/linux/timex.h:56,
from include/linux/sched.h:19,
from arch/arm/kernel/asm-offsets.c:13:
include/linux/rcupdate.h: In function '__rcu_read_lock':
>> include/linux/rcupdate.h:220:2: error: implicit declaration of function 'preempt_disable' [-Werror=implicit-function-declaration]
preempt_disable();
The problem here is recursive header inclusion which could be avoided by
removing linux/reboot.h from mach/iop13xxx.h.
linux/reboot.h in include/mach/iop13xx.h is needed only for enum reboot_mode,
so header it could be replaced with a enum declaration.
Whatever patch "ARM: 8078/1: get rid of hardcoded assumptions about kernel stack size"
does, I think it's good to avoid unnecessary header inclusion here in any case.
Reported-by: kbuild test robot <fengguang.wu@intel.com>
Reported-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Andrey Ryabinin <a.ryabinin@samsung.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The Zynq UART is Cadence IP and the driver has been renamed accordingly.
Migrate the DT to use the new binding for the UART driver.
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Acked-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Acked-by: Rob Herring <robh@kernel.org>
Tested-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
These properties are deprecated and no longer of any use.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Add FlexCAN node for the two FlexCAN IP instances in Vybrid.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Add initial Rex Pro i.mx6dl board support. Ethernet, UART, USB, I2C, SPI, HDMI,
Audio, and SDHC cards are working. Currently no mainline u-boot, so boot with
cat zImage imx6dl-rex-basic.dtb > zImage.dtb, then using mkimage create uImage
Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Add initial Rex Pro i.mx6q board support. Ethernet, UART, USB, I2C, SPI, HDMI,
Audio, and SDHC cards are working. Currently no mainline u-boot, so boot with
cat zImage imx6q-rex-pro.dtb > zImage.dtb, then using mkimage create uImage
Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
This patch splits the M53EVK device tree file into a common SoM
part and an EVK part. This is needed to make it easier for users
of the SoM to put it into different, non-reference baseboard.
Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Instead of relying on defaults or bootloader settings, explicitly define
all pad settings.
This resolves reported issues of no analogue audio output.
Signed-off-by: Iain Paton <ipaton0@gmail.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
The rev C1 Wandboard uses the Broadcom 4330 for WiFi and Bluetooth instead of
the 4329. This changes the PADS assigned for the control lines. Another
side effect of the change is that on the rev C1 board, usdhc driver can't
detect the chip presence correctly so usdhc2 now needs its 'non-removeable'
property removed.
So that rev B1 and earlier can continue to work, this patch splits the
board-specific definitions from imx6qdl-wandboard.dtsi into
imx6qdl-wandboard-revb1.dtsi and imx6qdl-wandboard-revc1.dtsi. The new files
include the original base imx6qdl-wandboard.dtsi which retains the common
definitions.
The existing imx6dl-wandboard.dts includes imx6qdl-wandboard-revc1.dtsi and
imx6dl-wandboard-revb1.dts (new) includes imx6qdl-wandboard-revb1.dtsi.
This makes the rev C1 board the new default. The same pattern is used for
imx6q-wandboard.dts.
So, from U-Boot on a WB-Quad you use imxq-wandboard-revb1.dtb for the older B1
board and imxq-wandboard.dtb for the current rev C1 board.
Signed-off-by: George Joseph <george.joseph@fairview5.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Per the binding doc imx-sata.txt, the first entry of clock-names should
be "sata" than anything else. Correct it for imx53 SATA node.
It works for now only because SATA driver gets clock by index so far.
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Since commit 98ea6ad2ed (ARM: dts: imx6: use imx51-ssi) the mx6 ssi is
compatible with imx51, so align all the mx6 variant ssi compatible strings as:
compatible = "fsl,<imx6-soc>-ssi", "fsl,imx51-ssi";
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Use clock definitions in i.MX27 DTS files.
Additional changes included in this patch (imx27.dtsi):
- Fix IPG clock for UART6.
- Use EMI_AHB_GATE clock for WEIM.
- Added GPIO_IPG_GATE clock for GPIO nodes. Currently this clock is
not used by the driver, but it can be added in the future.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
The SDMA on imx6sl and imx6sx is more compatible with imx6q one than
imx35. Let's use "fsl,imx6q-sdma" instead of "fsl,imx35-sdma", so that
SDMA ROM script on imx6sl and imx6sx can work for audio driver just like
the case of imx6q.
Reported-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Acked-by: Robin Gong <yibin.gong@freescale.com>
Like the other mx6 variants, we need to pass fsl,fifo-depth property in dtsi.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Use the correct compatible string for sdma and also provide the sdma firmware
path.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Add support for the PCI express bus available on MX6 Data Modul
edm-qmx6 board.
Signed-off-by: Silvio Fricke <silvio.fricke@gmail.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Tested by loading the g_ether module and doing a ping between mx25pdk and the
host PC via USB.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
The AHB to IP bridges (AIPSTZ) allow fine grained access rights management.
Add both bridges to the DT.
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
This patch splits the M28EVK device tree file into a common SoM
part and an EVK part. This is needed to make it easier for users
of the SoM to put it into different, non-reference baseboard.
Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Without that fix, the board freeze during boot.
This appeared after the following commit:
496f065 ARM: i.MX: Use of_clk_get_by_name() for timer clocks for DT case.
Signed-off-by: Denis Carikli <denis@eukrea.com>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
When booting a board that does not have a keypad (such as imx6q-sabresd) the
following error is seen on boot:
imx-keypad 20b8000.kpp: OF: linux,keymap property not defined in /soc/aips-bus@02000000/kpp@020b8000
imx-keypad 20b8000.kpp: failed to build keymap
imx-keypad: probe of 20b8000.kpp failed with error -2
Let's disable the keypad functionality in the dtsi files and let each board dts
enable it when needed.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Spread-spectrum doesn't work with Cubox-i hardware. eSATA devices are
detected, but then fail on normal IO. Therefore, disable this feature.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Add the transmit level, boost and attenuation parameters necessary for
the eSATA interface on Cubox-i to work.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Fix usbmisc compatible string so that usbmisc node can be found and USB
functionality can be functional.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
The imx6sx iomuxc-gpr syscon is compatible to imx6q, so let's add
compatible string 'fsl,imx6q-iomuxc-gpr' for imx6sx iomuxc-gpr syscon node.
This is necessary to enable SW workaround for ERR007265,
please refer to imx6_pm_common_init of arch/arm/mach-imx/pm-imx6.c
for detail.
Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
This patch add support for the imx6dl based aristainetos board
with following configuration:
CPU: Freescale i.MX6DL rev1.1 at 792 MHz
DRAM: 1 GiB
NAND: 512 MiB
MMC: FSL_SDHC: 0, FSL_SDHC: 1
SF: Detected N25Q128 with page size 256 Bytes, erase size 64 KiB, total 16 MiB
As this board can used with 2 different display types, the
differences between them are extracted into 2 DTS files, and
the common settings are collected in a common file.
Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
The fixed-regulator's enable-active-high property
is needed to indicate that the GPIO regulator is
active high.
Before that the regulator state was inverted.
Signed-off-by: Denis Carikli <denis@eukrea.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
The DAI mode is and should be configured by the sound card driver as
codec and ssi have to be in the right modes to communicate with each
other. It is possible to operate the ssi unit or the codec in master mode,
sometimes even on the same board in different configurations.
With the latest changes in the fsl-ssi driver, the 'fsl,mode' property
is only handled as a fallback property. If the sound card sets the DAI
mode correctly, this fallback configuration is dropped.
Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
All dtsi files where already moved to generic dma bindings. Remove the
old non-generic DMA properties.
Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
All imx5*.dtsi files define the generic dma bindings. Drop the old
non-generic fsl,ssi-dma-events.
Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Replace old ssi dma properties by the generic dma properties.
Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
The other i.mx6 variants use "vddarm" as the name of the internal regulator
that powers the core. Use the same convention here for consistency.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
The S/PDIF rxtx4 and rxtx6 clock inputs are "ESAI_HCKT" and "MLB clock",
respectively, according to the SoC documentation, and they are currently
mapped to clocks "esai" and "mlb".
However, they do not seem to actually work correctly. Testing on a
Cubox-i system with fsl_spdif driver forced to select one of those as
input will result in I/O errors on audio playback, which I believe means
missing clock signal.
Possibly the "ESAI_HCKT" and "MLB clock" refer to some other clocks
related to ESAI and MLB, or we are missing something else.
Since audio playback will not work if fsl_spdif selects these clocks
(which happens rarely), set the inputs do dummy clocks, at least for
now.
Signed-off-by: Anssi Hannula <anssi.hannula@iki.fi>
Cc: Mark Brown <broonie@kernel.org>
Acked-by: Nicolin Chen <Guangyu.Chen@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
The rxtx2 clock of i.MX6 S/PDIF is currently set to "asrc" clock.
However, according to SoC documentation, rxtx2 is connected to
ASRC_EXT_CLK, a different external clock.
Testing on Cubox-i system seems to confirm that: when fsl_spdif is
forced to select rxtx2 as input clock, audio playback fails with an I/O
error.
Set rxtx2 to the dummy clock by default to prevent fsl_spdif from
selecting it.
Signed-off-by: Anssi Hannula <anssi.hannula@iki.fi>
Cc: Mark Brown <broonie@kernel.org>
Acked-by: Nicolin Chen <Guangyu.Chen@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
This patch adds support for the Ka-Ro electronics GmbH TX6 modules.
There are five distinct module types with either i.MX6Q or i.MX6DL and
LVDS or LCD display interface and one DTS file for a complete system
with an i.MX6DL based TX6 module and a baseboard mounted on the back
of a display (imx6dl-tx6dl-comtft.dts).
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
This patch adds CSI subnodes for IPU1 and IPU2 that will contain
ports and endpoints connecting to external elements in the video
pipeline.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
The 2.5V VDD_ETH_IO voltage supplied by the DA9063 LDO4 is used
to power the KSZ9031 PHY DVDDH input and to pull the necessary
pins (including bootstrap pins) high.
It also powers the i.MX6 NVCC_RGMII and NVCC_ENET inputs.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
The imx6dl dts supports both DualLite and Solo CPU variants
The imx6q dts supports both Dual and Quad CPU variants
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
The 'model' property in the imx-audio-sgtl5000 binding specifies the
user-visible name of the audio device. This should be something common and
not baseboard specific.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
The PWM3 pinmux configuration conflicts with gpio 3.28. Introduce a regulator
for mmc0 so that it conflicts with the pwm driver and fails gracefully. The
kernel will then able to access mmc0 normally.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
when system suspend, need to set pins to low power state to
save IO power consumption, there are three states of pinctrl:
"default", "idle" and "sleep". Currently enet supports default
and sleep state.
Signed-off-by: Fugang Duan <B38611@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
GPIO4_9 is used as ECSPI1 chip select and it needs to be configured as GPIO.
Configure the pin functionality explicitly in the dts file instead of relying
on the fact that it comes configured as GPIO from POR or from the bootloader.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
This patch adds support for the cpuimx27 board from Eukrea and its
baseboard. This change is intended to further remove non-DT support
for this board.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Extend the clock control for FlexCAN with the second gate which
enable the clocks in the Clock Divider (CCM_CSCDR2) register too.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Most peripherals on the i.MX53 have an
Off-Platform Peripheral Access Control Register (OPACR)
in which the access rights (together with the MPROT registers) can be declared.
However, this does not seem to work for example for SSI1+SDMA, because the
supervisor bit is not set for the SDMA unit.
It does work for SSI2, the QSB for example uses SSI2 for its audio. But SSI2 only
works because it does NOT have an OPACR.
The right solution would be to fix the access rights for the SDMA, but the unit
responsible for this is the Central Security Unit (CSU), which of course is NOT
documented. So, until documentation for this is openly available, turn off the
supervisor protection because it cripples the hardware.
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
The i.MX SoCs allow to setup fine grained access rights to peripherals on the
AIPS bus.
This is done via the Peripheral Access Register (PAR) in e.g. the i.MX21
or in later SoC versions the Off-Platform Peripheral Access Control Register
(OPACR), e.g. i.MX53.
Under certain circumstances this leads to problems in which bus masters are
not granted their access rights to peripherals.
To be able to disable these restrictions on DT platforms, add a helper function
that looks for AIPS nodes in the DT and disables them for every compatible node
it finds.
The compatible has to be declared in the mach-specific entry file, where this
helper function should then be called.
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
This patch removes definitions which not used anywhere in the driver.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Use clock defines in order to make devicetrees more human readable.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
The board has no insufficient support to be fully functional and seems
has no users. This patch removes support for this board.
However, the support may be added in the future by using the devicetree.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
This patch removes excess symbols ARCH_MX1, ARCH_MX25 and MACH_MX27.
Instead we use SOC_IMX*.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
i.MX1 camera driver has been removed by the commit 90b055898e.
This patch removes remaining support files for this camera.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
imx6q_pm_enter calls imx6sl_set_wait_clk when run on an imx6sl
based machine. However if support for imx6sl is not enabled
at compile time, this prevents us from building the kernel and
we get this link error instead:
arch/arm/mach-imx/built-in.o: In function `imx6q_pm_enter':
:(.text+0x4b84): undefined reference to `imx6sl_set_wait_clk'
This makes the cpu_is_imx6sl function conditionally return false
if imx6sl is disabled at compile-time, which matches what the
older cpu_is_mx* macros did. We have similar inline functions for
the other imx6 variants, but so far I have not run into a case
where the extra #ifdef is necessary.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Building a kernel for imx6sx but without imx6q support results in
this link error because of the missing cpuidle driver:
arch/arm/mach-imx/built-in.o: In function `imx6sx_init_late'::(.init.text+0xc228):
undefined reference to `imx6q_cpuidle_init'
This patch adds a Makefile entry so we always build support for
the imx6q_cpuidle code when at least one of the 6sx or 6q variants
are enabled.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
The PL310 integrated on i.MX6 series and VF610 are revision r3p1 and
later. Per ARM PL310 errata document, 588369 is fixed in r2p0 and
727915 is fixed in r3p1. Neither is needed for i.MX6 or VF610. So
let's drop them.
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Add EDMA for DMA support for Vybrid SoCs. Also add printk time.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
SSI and SSI_IPG are clocks controlled by the same clock gating field, so
register them with imx_clk_gate2_shared.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Enable STMPE gpio support as this is used on MX6 Data Modul edm-qmx6
board.
Signed-off-by: Silvio Fricke <silvio.fricke@gmail.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Otherwise GCC will mark the .init.rodata section R/W, which causes
a compile error once we add other real R/O data.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
It is only the mx6quad variant that can run up to 1.2GHz, so add the check
accordingly.
This avoids getting the following warning on a mx6solo:
failed to disable 1.2 GHz OPP
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Replace .init_time() hook with of_clk_init() for DT targets.
Based on:
d4347ee ARM: i.MX27 clk: Use of_clk_init() for DT case
Signed-off-by: Denis Carikli <denis@eukrea.com>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
The gpt0 timer clock has been wrong since:
6bbaec5 ARM i.MX25: implement clocks using common clock framework
Signed-off-by: Denis Carikli <denis@eukrea.com>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
This patch adds devicetree support CCM module for i.MX21 CPUs.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
This is a cleanup for i.MX21 clk driver. This change includes:
- Reduce license text.
- Remove unused definitions.
- Remove unused #include and sort the rest.
- Remove useless comment.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
This patch removes clk_register_clkdev() for the clocks that do not
have any users for boards and drivers.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
This patch perform rework i.MX21 clock initialization. This includes
adding missing clocks and sort clocks by register address.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
mx51 and mx53 are device tree only platforms, so we no longer need all these
calls to clk_register_clkdev().
Only keep cpu0 and gpc_dvfs clk_register_clkdev() calls.
Tested on imx51-babbage and imx53-qsb boards.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Add standby mode support for suspend, to enter standby mode:
echo standby > /sys/power/state;
Use UART or RTC alarm to wake up system, when system enters
standby mode, SOC will enter STOP mode with ARM core kept
power on and 24M XTAL on.
Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
According to hardware design, mem bit must be clear before
entering DSM mode, as ARM core will be power gated in DSM mode.
Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Instead of using enum for clock ID, let's switch imx6qdl clock driver to
use macro. In this case, device tree can reuse these macros to improve
readability.
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Add suspend support for i.MX6SX.
To enter suspend, echo mem > /sys/power/state.
To exit suspend, using RTC alarm or enable debug UART wakeup.
Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
The board has no insufficient support to be fully functional and seems
has no users. This patch removes support for this board. However, the
support may be added in the future by using the devicetree.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
This patch adds a reset fallback if base address of watchdog is not set.
This is intended for a targets not compatible with imx-21 watchdog,
i.MX1 for example.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
This patch simplifies handling watchdog clock a bit.
As an additional change, now we properly check WDT clock in a reset
function.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
This patch moves clock check function in common i.MX location
and switch i.MX clk drivers to use this new function.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Jason Cooper