This patch adds user-configurable CRC region support.
The users may choose a region of interest(ROI) as the CRC source
(i.e., the CRC evaluation window) via the debugfs control node.
The ROI cannot exceed the display region as indicated by
drm_crtc_state->adjusted_mode. The users may write a string in
the fashion of "roi:x1,y1,x2,y2" to the node to specify the ROI
within the display region. The inclusive position at (x1, y1)
indicates the upper left of the region, while the exclusive
position at (x2, y2) indicates the lower right of the region.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Reviewed-by: Robby Cai <robby.cai@nxp.com>
This patch adds auto control mode debugfs CRC support based on
DPU Signature units. The evaluation window is the same to the
display region as indicated by drm_crtc_state->adjusted_mode.
The CRC data count is three when single DPU display stream is used,
while six when the pixel combiner(dual DPU display streams) is used.
Each data shows the CRC value for the 8 most significant bits of
red/green/blue channel of the entire evaluation window, which reflects
how DPU Signature unit reports CRC values.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Reviewed-by: Robby Cai <robby.cai@nxp.com>
The structure dpu_crtc essentially contains drm crtc. If we allocate
the instance of the structure dpu_crtc with devm_kzalloc() in ->bind(),
it would be freed in case anything in dpu_crtc_init() fails after the
call for drm_crtc_init_with_planes(). However, drm_crtc_init_with_planes()
may have already added the crtc into the crtc_list. The function
drm_mode_config_cleanup() called in imx_drm_bind() as a part of it's
bailout logic would walk through the list to try to cleanup the crtc,
which would cause the use-after-free issue. This patch changes the
dpu_crtc allocation from ->bind() to ->probe() to fix the issue. And,
with this change, ->unbind() doesn't need to cleanup the crtc anymore,
since it can be done by the imx-drm core driver.
Reviewed-by: Sandor Yu <Sandor.yu@nxp.com>
Signed-off-by: Liu Ying <victor.liu@nxp.com>
In order to avoid garbage data left in RTRAM after disabling CRTC,
the SoC designer suggests us to disable DPRC repeat_en after FrameGen
FGEN is cleared and before ENSTS is cleared. Also, it is suggested
that FGEN clearing should be done in the frame prior to DPRC repeat_en
disablement. So, syncing to FrameGen frame counter moving is needed.
The disablement procedure should be done as soon as possible, so we
disable local irq and preemption during the procedure to ensure this.
Reviewed-by: Sandor Yu <Sandor.yu@nxp.com>
Signed-off-by: Liu Ying <victor.liu@nxp.com>
(cherry picked from commit b73861cc5ed15d1f809147d055165f3cd6ce030e)
The SoC designer suggests us to disable DPRC repeat_en right after
FrameGen frame counter moving so that a plane with prefetch engine
can be disabled correctly on-the-fly. This helps the plane be
enabled again later without flashing at the initial several lines
fetched by the plane. The DPRC repeat_en disablement should be done
as soon as the FrameGen frame counter moving, which requires us to
disable preemption and irq. However, based on tests, there is no
malfunction observed without the strict sequence implemented.
So, tag this as FIXME to achieve some simplicity for now.
Reviewed-by: Sandor Yu <Sandor.yu@nxp.com>
Signed-off-by: Liu Ying <victor.liu@nxp.com>
(cherry picked from commit 692f5c61782f5edbb15a60ed00e0c614dd263591)
The pin-off mechanism tries to avoid disabling primary plane's
fetchunit together with CRTC and just leave it be untouched.
However, this shouldn't be something unsupported by the hardware.
Reviewed-by: Sandor Yu <Sandor.yu@nxp.com>
Signed-off-by: Liu Ying <victor.liu@nxp.com>
(cherry picked from commit 311774969072a977618dbf5560a4d39cd146d16e)
This patch adds pixel combiner support in the DPU KMS driver.
Pretty much logics are implemented to allocate/organize the
CRTC resources(extdst, framegen, tcon, pixel combiner, etc)
and plane resources(extdst, fetchunit, layerblend, etc) which
are needed to drive a high pixel rate display via pixel combiner.
Additional logics are implemented to support sync up mode fixup
found in the new version of DPU IP.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Cache the auxiliary CRTC resources in struct dpu_crtc via the
dpu_aux_{unit}_peek() helpers so that the DPU CRTC driver may
use them later.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
The DPU CRTC device driver may get the CRTC group id from
the pdata of the device. Let's cache it in struct dpu_crtc
so that the driver may use it later.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
This patch adds side-by-side support for tcon so that
two tcons can participate in the dual display streams
to work with pixel combiner to drive a high pixel rate
display.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
This patch adds side-by-side support for framegen so that
two framegens can work in sync mode to participate in the
dual display streams to drive a high pixel rate display
via a pixel combiner.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
The CRTC background should be full screen instead of partial
screen, because the DRM core is likely to add configurable
background color support in the future. We may cover the full
screen with ConstFrame0/1, upon which builds planes. With this,
it is easier to compute each plane's layer offset vs CRTC start
point and all ConstFrame units can be controlled by CRTC.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Although the hardware spec doesn't mention the additional operation to
wait for FrameGen secondary syncup for FrameGen non-sync mode when we
enable a display, it doesn't hurt to do it and we may get warning message
in case it's not syncup.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
The DPU planes' fetch units are built upon the CRTC's FrameGen secondary
channel. Empty FIFO read request from the channel is very likely caused
by insufficient AXI bandwidth for the fetch units, which makes display
underrun. This patch warns users via dmesg on the empty FIFO read request.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
If CRTC is active, we should send vblank event in vblank
interrupt handler to make sure it's sent precisely. This
patch caches the event to be sent at dpu_crtc->event in
the ->atomic_enable() and the ->atomic_flush() callbacks
and finally sends it out in dpu_vbl_irq_handler(). Since
we rely on the interrupt handler to send the event, we
call drm_crtc_vblank_get() to get a vblank refcount to
guarantee the interrupt is enabled when caching the event
in dpu_crtc_queue_state_event() and call drm_crtc_vblank_put()
to drop a vblank refcount in the interrupt handler.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
The DRM atomic core ensures crtc->state->event is not NULL when
calling the ->atomic_disable() or the ->atomic_flush() callbacks.
So, let's remove the unnecessary NULL check warning on it.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
When a full modeset is needed, the CRTC could be totally disabled or
enabled/re-enabled after the modeset. If it's re-enabled, a vblank
event would be sent during the CRTC enablement procedure. So, a bogus
event should be killed in the ->atomic_disable() callback.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
The Kdoc for the event entry of struct drm_crtc_state mentions that the
simplest way to send vblank event when a CRTC is being disabled is that
calling drm_crtc_send_vblank_event() somewhen after drm_crtc_vblank_off()
has been called. This patch takes the way mentioned above to send vblank
event in the ->atomic_disable() callback.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
To workaround the errata TKT320950, DPR/PRG need to evade the first dumb frame
which is generated by DPU. The way we achieve that is to bypass TCON(but set
the TCON sync signals and KA_CHUCK strobe signal up) before enabling the DPU
display controller, and then 1) enable the display controller, 2) wait for the
frame index starting to move and 3) finally switch TCON to operation mode.
Steps 1) to 3) should be done within a frame, so we disable local irq and
preemption to make sure we don't relinquish CPU during the procedure.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
This patch specifies encoder type for framegen_cfg_videomode()
so that framegen driver may program display clock tree properly
for different kinds of encoders.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
This patch sets display clock's parent to bypass clock when display
encoder type is TMDS, otherwise, to pll clock when other types of
encoder.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Liu Ying