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4235 Commits (ce1b79a598df3b34625f4c4b6118970fae19cbb0)

Author SHA1 Message Date
Andy Shevchenko 8fa2c2ca23 dmaengine: dw: platform: Mark 'hclk' clock optional
commit f27c22736d upstream.

On some platforms the clock can be fixed rate, always running one and
there is no need to do anything with it.

In order to support those platforms, switch to use optional clock.

Fixes: f8d9ddbc28 ("dmaengine: dw: platform: Enable iDMA 32-bit on Intel Elkhart Lake")
Depends-on: 60b8f0ddf1 ("clk: Add (devm_)clk_get_optional() functions")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Link: https://lore.kernel.org/r/20190924085116.83683-1-andriy.shevchenko@linux.intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-01-17 19:48:49 +01:00
Peter Ujfalusi fdfd8f9ef2 dmaengine: virt-dma: Fix access after free in vchan_complete()
commit 24461d9792 upstream.

vchan_vdesc_fini() is freeing up 'vd' so the access to vd->tx_result is
via already freed up memory.

Move the vchan_vdesc_fini() after invoking the callback to avoid this.

Fixes: 09d5b702b0 ("dmaengine: virt-dma: store result on dma descriptor")
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Reviewed-by: Alexandru Ardelean <alexandru.ardelean@analog.com>
Link: https://lore.kernel.org/r/20191220131100.21804-1-peter.ujfalusi@ti.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-01-09 10:20:00 +01:00
Paul Cercueil 61dc7d025d dmaengine: dma-jz4780: Also break descriptor chains on JZ4725B
commit a40c94be23 upstream.

It turns out that the JZ4725B displays the same buggy behaviour as the
JZ4740 that was described in commit f4c255f1a7 ("dmaengine: dma-jz4780:
Break descriptor chains on JZ4740").

Work around it by using the same workaround previously used for the
JZ4740.

Fixes commit f4c255f1a7 ("dmaengine: dma-jz4780: Break descriptor
chains on JZ4740")

Cc: <stable@vger.kernel.org>
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Link: https://lore.kernel.org/r/20191210165545.59690-1-paul@crapouillou.net
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-01-09 10:19:58 +01:00
Krzysztof Kozlowski 37958001e1 dmaengine: fsl-qdma: Handle invalid qdma-queue0 IRQ
[ Upstream commit 41814c4ead ]

platform_get_irq_byname() might return -errno which later would be cast
to an unsigned int and used in IRQ handling code leading to usage of
wrong ID and errors about wrong irq_base.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Peng Ma <peng.ma@nxp.com>
Tested-by: Peng Ma <peng.ma@nxp.com>
Link: https://lore.kernel.org/r/20191004150826.6656-1-krzk@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-01-04 19:17:01 +01:00
Nicholas Graumann 2456880b7a dmaengine: xilinx_dma: Clear desc_pendingcount in xilinx_dma_reset
[ Upstream commit 8a631a5a0f ]

Whenever we reset the channel, we need to clear desc_pendingcount
along with desc_submitcount. Otherwise when a new transaction is
submitted, the irq coalesce level could be programmed to an incorrect
value in the axidma case.

This behavior can be observed when terminating pending transactions
with xilinx_dma_terminate_all() and then submitting new transactions
without releasing and requesting the channel.

Signed-off-by: Nicholas Graumann <nick.graumann@gmail.com>
Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com>
Link: https://lore.kernel.org/r/1571150904-3988-8-git-send-email-radhey.shyam.pandey@xilinx.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-01-04 19:16:41 +01:00
Tony Lindgren bacdcb6675 dmaengine: cppi41: Fix cppi41_dma_prep_slave_sg() when idle
Yegor Yefremov <yegorslists@googlemail.com> reported that musb and ftdi
uart can fail for the first open of the uart unless connected using
a hub.

This is because the first dma call done by musb_ep_program() must wait
if cppi41 is PM runtime suspended. Otherwise musb_ep_program() continues
with other non-dma packets before the DMA transfer is started causing at
least ftdi uarts to fail to receive data.

Let's fix the issue by waking up cppi41 with PM runtime calls added to
cppi41_dma_prep_slave_sg() and return NULL if still idled. This way we
have musb_ep_program() continue with PIO until cppi41 is awake.

Fixes: fdea2d09b9 ("dmaengine: cppi41: Add basic PM runtime support")
Reported-by: Yegor Yefremov <yegorslists@googlemail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Cc: stable@vger.kernel.org # v4.9+
Link: https://lore.kernel.org/r/20191023153138.23442-1-tony@atomide.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-10-23 21:15:21 +05:30
Jeffrey Hugo 7667819385 dmaengine: qcom: bam_dma: Fix resource leak
bam_dma_terminate_all() will leak resources if any of the transactions are
committed to the hardware (present in the desc fifo), and not complete.
Since bam_dma_terminate_all() does not cause the hardware to be updated,
the hardware will still operate on any previously committed transactions.
This can cause memory corruption if the memory for the transaction has been
reassigned, and will cause a sync issue between the BAM and its client(s).

Fix this by properly updating the hardware in bam_dma_terminate_all().

Fixes: e7c0fe2a5c ("dmaengine: add Qualcomm BAM dma driver")
Signed-off-by: Jeffrey Hugo <jeffrey.l.hugo@gmail.com>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20191017152606.34120-1-jeffrey.l.hugo@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-10-18 13:27:58 +05:30
Baolin Wang ec1ac30959 dmaengine: sprd: Fix the possible memory leak issue
If we terminate the channel to free all descriptors associated with this
channel, we will leak the memory of current descriptor if the current
descriptor is not completed, since it had been deteled from the desc_issued
list and have not been added into the desc_completed list.

Thus we should check if current descriptor is completed or not, when freeing
the descriptors associated with one channel, if not, we should free it to
avoid this issue.

Fixes: 9b3b8171f7 ("dmaengine: sprd: Add Spreadtrum DMA driver")
Reported-by: Zhenfang Wang <zhenfang.wang@unisoc.com>
Tested-by: Zhenfang Wang <zhenfang.wang@unisoc.com>
Signed-off-by: Baolin Wang <baolin.wang@linaro.org>
Link: https://lore.kernel.org/r/170dbbc6d5366b6fa974ce2d366652e23a334251.1570609788.git.baolin.wang@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-10-15 15:47:24 +05:30
Radhey Shyam Pandey 6c6de1ddb1 dmaengine: xilinx_dma: Fix control reg update in vdma_channel_set_config
In vdma_channel_set_config clear the delay, frame count and master mask
before updating their new values. It avoids programming incorrect state
when input parameters are different from default.

Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com>
Acked-by: Appana Durga Kedareswara rao <appana.durga.rao@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/1569495060-18117-3-git-send-email-radhey.shyam.pandey@xilinx.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-10-15 15:41:55 +05:30
Radhey Shyam Pandey 68fe2b520c dmaengine: xilinx_dma: Fix 64-bit simple AXIDMA transfer
In AXI DMA simple mode also pass MSB bits of source and destination
address to xilinx_write function. It fixes simple AXI DMA operation
mode using 64-bit addressing.

Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com>
Link: https://lore.kernel.org/r/1569495060-18117-2-git-send-email-radhey.shyam.pandey@xilinx.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-10-15 15:41:55 +05:30
Robin Gong bd73dfabdd dmaengine: imx-sdma: fix size check for sdma script_number
Illegal memory will be touch if SDMA_SCRIPT_ADDRS_ARRAY_SIZE_V3
(41) exceed the size of structure sdma_script_start_addrs(40),
thus cause memory corrupt such as slob block header so that kernel
trap into while() loop forever in slob_free(). Please refer to below
code piece in imx-sdma.c:
for (i = 0; i < sdma->script_number; i++)
	if (addr_arr[i] > 0)
		saddr_arr[i] = addr_arr[i]; /* memory corrupt here */
That issue was brought by commit a572460be9 ("dmaengine: imx-sdma: Add
support for version 3 firmware") because SDMA_SCRIPT_ADDRS_ARRAY_SIZE_V3
(38->41 3 scripts added) not align with script number added in
sdma_script_start_addrs(2 scripts).

Fixes: a572460be9 ("dmaengine: imx-sdma: Add support for version 3 firmware")
Cc: stable@vger.kernel
Link: https://www.spinics.net/lists/arm-kernel/msg754895.html
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Reported-by: Jurgen Lambrecht <J.Lambrecht@TELEVIC.com>
Link: https://lore.kernel.org/r/1569347584-3478-1-git-send-email-yibin.gong@nxp.com
[vkoul: update the patch title]
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-10-14 13:33:44 +05:30
Sameer Pujar 9ec691f48b dmaengine: tegra210-adma: fix transfer failure
>From Tegra186 onwards OUTSTANDING_REQUESTS field is added in channel
configuration register(bits 7:4) which defines the maximum number of reads
from the source and writes to the destination that may be outstanding at
any given point of time. This field must be programmed with a value
between 1 and 8. A value of 0 will prevent any transfers from happening.

Thus added 'has_outstanding_reqs' bool member in chip data structure and is
set to false for Tegra210, since the field is not applicable. For Tegra186
it is set to true and channel configuration is updated with maximum
outstanding requests.

Fixes: 433de642a7 ("dmaengine: tegra210-adma: add support for Tegra186/Tegra194")
Cc: stable@vger.kernel.org
Signed-off-by: Sameer Pujar <spujar@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Link: https://lore.kernel.org/r/1568626513-16541-1-git-send-email-spujar@nvidia.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-10-14 12:40:38 +05:30
Zhenfang Wang 8b6bc5fd71 dmaengine: sprd: Fix the link-list pointer register configuration issue
We will set the link-list pointer register point to next link-list
configuration's physical address, which can load DMA configuration
from the link-list node automatically.

But the link-list node's physical address can be larger than 32bits,
and now Spreadtrum DMA driver only supports 32bits physical address,
which may cause loading a incorrect DMA configuration when starting
the link-list transfer mode. According to the DMA datasheet, we can
use SRC_BLK_STEP register (bit28 - bit31) to save the high bits of the
link-list node's physical address to fix this issue.

Fixes: 4ac6954647 ("dmaengine: sprd: Support DMA link-list mode")
Signed-off-by: Zhenfang Wang <zhenfang.wang@unisoc.com>
Signed-off-by: Baolin Wang <baolin.wang@linaro.org>
Link: https://lore.kernel.org/r/eadfe9295499efa003e1c344e67e2890f9d1d780.1568267061.git.baolin.wang@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-10-14 10:32:18 +05:30
Linus Torvalds 5c6bd5de3c Main MIPS changes for v5.4:
- boot_mem_map is removed, providing a nice cleanup made possible by the
   recent removal of bootmem.
 
 - Some fixes to atomics, in general providing compiler barriers for
   smp_mb__{before,after}_atomic plus fixes specific to Loongson CPUs or
   MIPS32 systems using cmpxchg64().
 
 - Conversion to the new generic VDSO infrastructure courtesy of Vincenzo
   Frascino.
 
 - Removal of undefined behavior in set_io_port_base(), fixing the
   behavior of some MIPS kernel configurations when built with recent
   clang versions.
 
 - Initial MIPS32 huge page support, functional on at least Ingenic SoCs.
 
 - pte_special() is now supported for some configurations, allowing among
   other things generic fast GUP to be used.
 
 - Miscellaneous fixes & cleanups.
 
 And platform specific changes:
 
 - Major improvements to Ingenic SoC support from Paul Cercueil, mostly
   enabled by the inclusion of the new TCU (timer-counter unit) drivers
   he's spent a very patient year or so working on. Plus some fixes for
   X1000 SoCs from Zhou Yanjie.
 
 - Netgear R6200 v1 systems are now supported by the bcm47xx platform.
 
 - DT updates for BMIPS, Lantiq & Microsemi Ocelot systems.
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Merge tag 'mips_5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux

Pull MIPS updates from Paul Burton:
 "Main MIPS changes:

   - boot_mem_map is removed, providing a nice cleanup made possible by
     the recent removal of bootmem.

   - Some fixes to atomics, in general providing compiler barriers for
     smp_mb__{before,after}_atomic plus fixes specific to Loongson CPUs
     or MIPS32 systems using cmpxchg64().

   - Conversion to the new generic VDSO infrastructure courtesy of
     Vincenzo Frascino.

   - Removal of undefined behavior in set_io_port_base(), fixing the
     behavior of some MIPS kernel configurations when built with recent
     clang versions.

   - Initial MIPS32 huge page support, functional on at least Ingenic
     SoCs.

   - pte_special() is now supported for some configurations, allowing
     among other things generic fast GUP to be used.

   - Miscellaneous fixes & cleanups.

  And platform specific changes:

   - Major improvements to Ingenic SoC support from Paul Cercueil,
     mostly enabled by the inclusion of the new TCU (timer-counter unit)
     drivers he's spent a very patient year or so working on. Plus some
     fixes for X1000 SoCs from Zhou Yanjie.

   - Netgear R6200 v1 systems are now supported by the bcm47xx platform.

   - DT updates for BMIPS, Lantiq & Microsemi Ocelot systems"

* tag 'mips_5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: (89 commits)
  MIPS: Detect bad _PFN_SHIFT values
  MIPS: Disable pte_special() for MIPS32 with RiXi
  MIPS: ralink: deactivate PCI support for SOC_MT7621
  mips: compat: vdso: Use legacy syscalls as fallback
  MIPS: Drop Loongson _CACHE_* definitions
  MIPS: tlbex: Remove cpu_has_local_ebase
  MIPS: tlbex: Simplify r3k check
  MIPS: Select R3k-style TLB in Kconfig
  MIPS: PCI: refactor ioc3 special handling
  mips: remove ioremap_cachable
  mips/atomic: Fix smp_mb__{before,after}_atomic()
  mips/atomic: Fix loongson_llsc_mb() wreckage
  mips/atomic: Fix cmpxchg64 barriers
  MIPS: Octeon: remove duplicated include from dma-octeon.c
  firmware: bcm47xx_nvram: Allow COMPILE_TEST
  firmware: bcm47xx_nvram: Correct size_t printf format
  MIPS: Treat Loongson Extensions as ASEs
  MIPS: Remove dev_err() usage after platform_get_irq()
  MIPS: dts: mscc: describe the PTP ready interrupt
  MIPS: dts: mscc: describe the PTP register range
  ...
2019-09-22 09:30:30 -07:00
Linus Torvalds 04cbfba620 dmaengine updates for v5.4-rc1
- Move Dmaengine DT bindings to YAML and convert Allwinner to schema.
  - FSL dma device_synchronize implementation
  - DW split acpi and of helpers and updates to driver and support for Elkhart
    Lake
  - Move filter fn as private for omap-dma and edma drivers and improvements
    to these drivers
  - Mark expected switch fall-through in couple of drivers
  - Renames of shdma and nbpfaxi binding document
  - Minor updates to bunch of drivers
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Merge tag 'dmaengine-5.4-rc1' of git://git.infradead.org/users/vkoul/slave-dma

Pull dmaengine updates from Vinod Koul:

 - Move Dmaengine DT bindings to YAML and convert Allwinner to schema.

 - FSL dma device_synchronize implementation

 - DW split acpi and of helpers and updates to driver and support for
   Elkhart Lake

 - Move filter fn as private for omap-dma and edma drivers and
   improvements to these drivers

 - Mark expected switch fall-through in couple of drivers

 - Renames of shdma and nbpfaxi binding document

 - Minor updates to bunch of drivers

* tag 'dmaengine-5.4-rc1' of git://git.infradead.org/users/vkoul/slave-dma: (55 commits)
  dmaengine: ti: edma: Use bitmap_set() instead of open coded edma_set_bits()
  dmaengine: ti: edma: Only reset region0 access registers
  dmaengine: ti: edma: Do not reset reserved paRAM slots
  dmaengine: iop-adma.c: fix printk format warning
  dmaengine: stm32-dma: Use struct_size() helper
  dt-bindings: dmaengine: dma-common: Fix the dma-channel-mask property
  dmanegine: ioat/dca: Use struct_size() helper
  dmaengine: iop-adma: remove set but not used variable 'slots_per_op'
  dmaengine: dmatest: Add support for completion polling
  dmaengine: ti: omap-dma: Remove variable override in omap_dma_tx_status()
  dmaengine: ti: omap-dma: Remove 'Assignment in if condition'
  dmaengine: ti: edma: Remove 'Assignment in if condition'
  dmaengine: dw: platform: Split OF helpers to separate module
  dmaengine: dw: platform: Split ACPI helpers to separate module
  dmaengine: dw: platform: Move handle check to dw_dma_acpi_controller_register()
  dmaengine: dw: platform: Switch to acpi_dma_controller_register()
  dmaengine: dw: platform: Use devm_platform_ioremap_resource()
  dmaengine: dw: platform: Enable iDMA 32-bit on Intel Elkhart Lake
  dmaengine: dw: platform: Use struct dw_dma_chip_pdata
  dmaengine: dw: Export struct dw_dma_chip_pdata for wider use
  ...
2019-09-17 19:04:40 -07:00
Linus Torvalds 2b97c39514 ARM: SoC platform updates for v5.4
The main change this time around is a cleanup of some of the oldest
 platforms based on the XScale and ARM9 CPU cores, which are between 10
 and 20 years old.
 
 The Kendin/Micrel/Microchip KS8695, Winbond/Nuvoton W90x900 and Intel
 IOP33x/IOP13xx platforms are removed after we determined that nobody is
 using them any more.
 
 The TI Davinci and NXP LPC32xx platforms on the other hand are still in
 active use and are converted to the ARCH_MULTIPLATFORM build, meaning
 that we can compile a kernel that works on these along with most other
 ARMv5 platforms. Changes toward that goal are also merged for IOP32x,
 but additional work is needed to complete this. Patches for the
 remaining ARMv5 platforms have started but need more work and some
 testing.
 
 Support for the new ASpeed AST2600 gets added, this is based on the
 Cortex-A7 ARMv7 core, and is a newer version of the existing ARMv5 and
 ARMv6 chips in the same family.
 
 Other changes include a cleanup of the ST-Ericsson ux500 platform
 and the move of the TI Davinci platform to a new clocksource driver.
 
 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC platform updates from Arnd Bergmann:
 "The main change this time around is a cleanup of some of the oldest
  platforms based on the XScale and ARM9 CPU cores, which are between 10
  and 20 years old.

  The Kendin/Micrel/Microchip KS8695, Winbond/Nuvoton W90x900 and Intel
  IOP33x/IOP13xx platforms are removed after we determined that nobody
  is using them any more.

  The TI Davinci and NXP LPC32xx platforms on the other hand are still
  in active use and are converted to the ARCH_MULTIPLATFORM build,
  meaning that we can compile a kernel that works on these along with
  most other ARMv5 platforms. Changes toward that goal are also merged
  for IOP32x, but additional work is needed to complete this. Patches
  for the remaining ARMv5 platforms have started but need more work and
  some testing.

  Support for the new ASpeed AST2600 gets added, this is based on the
  Cortex-A7 ARMv7 core, and is a newer version of the existing ARMv5 and
  ARMv6 chips in the same family.

  Other changes include a cleanup of the ST-Ericsson ux500 platform and
  the move of the TI Davinci platform to a new clocksource driver"

[ The changes had marked INTEL_IOP_ADMA and USB_LPC32XX as being
  buildable on other platforms through COMPILE_TEST, but that causes new
  warnings that I most definitely do not want to see during the merge
  window as that could hide other issues.

  So the COMPILE_TEST option got disabled for them again   - Linus ]

* tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (61 commits)
  ARM: multi_v5_defconfig: make DaVinci part of the ARM v5 multiplatform build
  ARM: davinci: support multiplatform build for ARM v5
  arm64: exynos: Enable exynos-chipid driver
  ARM: OMAP2+: Delete an unnecessary kfree() call in omap_hsmmc_pdata_init()
  ARM: OMAP2+: move platform-specific asm-offset.h to arch/arm/mach-omap2
  ARM: davinci: dm646x: Fix a typo in the comment
  ARM: davinci: dm646x: switch to using the clocksource driver
  ARM: davinci: dm644x: switch to using the clocksource driver
  ARM: aspeed: Enable SMP boot
  ARM: aspeed: Add ASPEED AST2600 architecture
  ARM: aspeed: Select timer in each SoC
  dt-bindings: arm: cpus: Add ASPEED SMP
  ARM: imx: stop adjusting ar8031 phy tx delay
  mailmap: map old company name to new one @microchip.com
  MAINTAINERS: at91: remove the TC entry
  MAINTAINERS: at91: Collect all pinctrl/gpio drivers in same entry
  ARM: at91: move platform-specific asm-offset.h to arch/arm/mach-at91
  MAINTAINERS: Extend patterns for Samsung SoC, Security Subsystem and clock drivers
  ARM: s3c64xx: squash samsung_usb_phy.h into setup-usb-phy.c
  ARM: debug-ll: Add support for r7s9210
  ...
2019-09-16 15:48:14 -07:00
Mark Brown b769c5ba8a
Merge branch 'spi-5.4' into spi-next 2019-09-15 10:32:06 +01:00
Lukas Wunner bf75703d09
dmaengine: bcm2835: Avoid accessing memory when copying zeroes
The BCM2835 DMA controller is capable of synthesizing zeroes instead of
copying them from a source address. The feature is enabled by setting
the SRC_IGNORE bit in the Transfer Information field of a Control Block:

"Do not perform source reads.
 In addition, destination writes will zero all the write strobes.
 This is used for fast cache fill operations."
https://www.raspberrypi.org/app/uploads/2012/02/BCM2835-ARM-Peripherals.pdf

The feature is only available on 8 of the 16 channels. The others are
so-called "lite" channels with a limited feature set and performance.

Enable the feature if a cyclic transaction copies from the zero page.
This reduces traffic on the memory bus.

A forthcoming use case is the BCM2835 SPI driver, which will cyclically
copy from the zero page to the TX FIFO. The idea to use SRC_IGNORE was
taken from an ancient GitHub conversation between Martin and Noralf:
https://github.com/msperl/spi-bcm2835/issues/13#issuecomment-98180451

Tested-by: Nuno Sá <nuno.sa@analog.com>
Tested-by: Noralf Trønnes <noralf@tronnes.org>
Signed-off-by: Lukas Wunner <lukas@wunner.de>
Acked-by: Vinod Koul <vkoul@kernel.org>
Acked-by: Stefan Wahren <wahrenst@gmx.net>
Acked-by: Martin Sperl <kernel@martin.sperl.org>
Cc: Florian Kauer <florian.kauer@koalo.de>
Link: https://lore.kernel.org/r/b2286c904408745192e4beb3de3c88f73e4a7210.1568187525.git.lukas@wunner.de
Signed-off-by: Mark Brown <broonie@kernel.org>
2019-09-11 15:56:46 +01:00
Lukas Wunner c3ef820783
dmaengine: bcm2835: Document struct bcm2835_dmadev
Document the BCM2835 DMA driver's device data structure so that upcoming
commits may add further members with proper kerneldoc.

Tested-by: Nuno Sá <nuno.sa@analog.com>
Tested-by: Noralf Trønnes <noralf@tronnes.org>
Signed-off-by: Lukas Wunner <lukas@wunner.de>
Acked-by: Vinod Koul <vkoul@kernel.org>
Acked-by: Stefan Wahren <wahrenst@gmx.net>
Acked-by: Martin Sperl <kernel@martin.sperl.org>
Cc: Florian Kauer <florian.kauer@koalo.de>
Link: https://lore.kernel.org/r/78648f80f67d97bb7beecc1b9be6b6e4a45bc1d8.1568187525.git.lukas@wunner.de
Signed-off-by: Mark Brown <broonie@kernel.org>
2019-09-11 15:53:27 +01:00
Lukas Wunner 6f6869dc97
dmaengine: bcm2835: Allow reusable descriptors
The DMA engine API requires DMA drivers to explicitly allow that
descriptors are prepared once and reused multiple times. Only a
single driver makes use of this functionality so far (pxa_dma.c,
to speed up pxa_camera.c).

We're about to add another use case for reusable descriptors in
the BCM2835 SPI driver, so allow that in the BCM2835 DMA driver.

Tested-by: Nuno Sá <nuno.sa@analog.com>
Tested-by: Noralf Trønnes <noralf@tronnes.org>
Signed-off-by: Lukas Wunner <lukas@wunner.de>
Acked-by: Vinod Koul <vkoul@kernel.org>
Acked-by: Stefan Wahren <wahrenst@gmx.net>
Acked-by: Martin Sperl <kernel@martin.sperl.org>
Cc: Florian Kauer <florian.kauer@koalo.de>
Cc: Robert Jarzmik <robert.jarzmik@free.fr>
Link: https://lore.kernel.org/r/bfc98a38225bbec4158440ad06cb9eee675e3e6f.1568187525.git.lukas@wunner.de
Signed-off-by: Mark Brown <broonie@kernel.org>
2019-09-11 15:53:02 +01:00
Lukas Wunner 4f2228cce2
dmaengine: bcm2835: Allow cyclic transactions without interrupt
The BCM2835 DMA driver currently requests an interrupt from the
controller regardless whether or not the client has passed in the
DMA_PREP_INTERRUPT flag. This causes unnecessary overhead for cyclic
transactions which do not need an interrupt after each period.

We're about to add such a use case, namely cyclic clearing of the SPI
controller's RX FIFO, so amend the DMA driver to request an interrupt
only if DMA_PREP_INTERRUPT was passed in. Ignore the period_len for
such transactions and set it to the buffer length to make the driver's
calculations work.

Tested-by: Nuno Sá <nuno.sa@analog.com>
Tested-by: Noralf Trønnes <noralf@tronnes.org>
Signed-off-by: Lukas Wunner <lukas@wunner.de>
Acked-by: Vinod Koul <vkoul@kernel.org>
Acked-by: Stefan Wahren <wahrenst@gmx.net>
Acked-by: Martin Sperl <kernel@martin.sperl.org>
Cc: Florian Kauer <florian.kauer@koalo.de>
Link: https://lore.kernel.org/r/73cf37be56eb4cbe6f696057c719f3a38cbaf26e.1568187525.git.lukas@wunner.de
Signed-off-by: Mark Brown <broonie@kernel.org>
2019-09-11 15:52:53 +01:00
Linus Torvalds d3464ccd10 dmaengine late fixes for 5.3
Some late fixes for drivers:
  - memory leak in ti crossbar dma driver
  - cleanup of omap dma probe
  - Fix for link list configuration in sprd dma driver
  - Handling fixed for DMACHCLR if iommu is mapped in rcar dma
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Merge tag 'dmaengine-fix-5.3' of git://git.infradead.org/users/vkoul/slave-dma

Pull dmaengine fixes from Vinod Koul:
 "Some late fixes for drivers:

   - memory leak in ti crossbar dma driver

   - cleanup of omap dma probe

   - Fix for link list configuration in sprd dma driver

   - Handling fixed for DMACHCLR if iommu is mapped in rcar dma"

* tag 'dmaengine-fix-5.3' of git://git.infradead.org/users/vkoul/slave-dma:
  dmaengine: rcar-dmac: Fix DMACHCLR handling if iommu is mapped
  dmaengine: sprd: Fix the DMA link-list configuration
  dmaengine: ti: omap-dma: Add cleanup in omap_dma_probe()
  dmaengine: ti: dma-crossbar: Fix a memory leak bug
2019-09-07 10:00:34 -07:00
Peter Ujfalusi c5c6faaee6 dmaengine: ti: edma: Use bitmap_set() instead of open coded edma_set_bits()
bitmap_set() is the standard way of setting an area in the bitfield.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Link: https://lore.kernel.org/r/20190823125618.8133-4-peter.ujfalusi@ti.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-09-04 15:19:19 +05:30
Peter Ujfalusi b2003f61a5 dmaengine: ti: edma: Only reset region0 access registers
Region0 is used by Linux, do not reset other registers controlling access
for other shadow regions.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Link: https://lore.kernel.org/r/20190823125618.8133-3-peter.ujfalusi@ti.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-09-04 15:19:19 +05:30
Peter Ujfalusi c5dbe60664 dmaengine: ti: edma: Do not reset reserved paRAM slots
Skip resetting paRAM slots marked as reserved as they might be used by
other cores.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Link: https://lore.kernel.org/r/20190823125618.8133-2-peter.ujfalusi@ti.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-09-04 15:19:19 +05:30
Yoshihiro Shimoda cf24aac386 dmaengine: rcar-dmac: Fix DMACHCLR handling if iommu is mapped
The commit 20c169aceb ("dmaengine: rcar-dmac: clear pertinence
number of channels") forgets to clear the last channel by
DMACHCLR in rcar_dmac_init() (and doesn't need to clear the first
channel) if iommu is mapped to the device. So, this patch fixes it
by using "channels_mask" bitfield.

Note that the hardware and driver don't support more than 32 bits
in DMACHCLR register anyway, so this patch should reject more than
32 channels in rcar_dmac_parse_of().

Fixes: 20c169aceb ("dmaengine: rcar-dmac: clear pertinence number of channels")
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/1567424643-26629-1-git-send-email-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-09-04 11:35:58 +05:30
Baolin Wang 689379c2f3 dmaengine: sprd: Fix the DMA link-list configuration
For the Spreadtrum DMA link-list mode, when the DMA engine got a slave
hardware request, which will trigger the DMA engine to load the DMA
configuration from the link-list memory automatically. But before the
slave hardware request, the slave will get an incorrect residue due
to the first node used to trigger the link-list was configured as the
last source address and destination address.

Thus we should make sure the first node was configured the start source
address and destination address, which can fix this issue.

Fixes: 4ac6954647 ("dmaengine: sprd: Support DMA link-list mode")
Signed-off-by: Baolin Wang <baolin.wang@linaro.org>
Link: https://lore.kernel.org/r/77868edb7aff9d5cb12ac3af8827ef2e244441a6.1567150471.git.baolin.wang@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-09-04 11:25:38 +05:30
Randy Dunlap d17d9ea957 dmaengine: iop-adma.c: fix printk format warning
Fix printk format warning in iop-adma.c (seen on x86_64) by using
%pad:

../drivers/dma/iop-adma.c:118:12: warning: format ‘%x’ expects argument of type ‘unsigned int’, but argument 6 has type ‘dma_addr_t {aka long long unsigned int}’ [-Wformat=]

Fixes: c211092313 ("dmaengine: driver for the iop32x, iop33x, and iop13xx raid engines")
Signed-off-by: Randy Dunlap <rdunlap@infradead.org>
Acked-by: Dan Williams <dan.j.williams@intel.com>
Link: https://lore.kernel.org/r/1803541f-98a6-7cce-b050-ff1e9a333ab2@infradead.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-09-04 11:14:00 +05:30
Gustavo A. R. Silva 402096cb5b dmaengine: stm32-dma: Use struct_size() helper
One of the more common cases of allocation size calculations is finding
the size of a structure that has a zero-sized array at the end, along
with memory for some number of elements for that array. For example:

struct stm32_dma_desc {
	...
        struct stm32_dma_sg_req sg_req[];
};

Make use of the struct_size() helper instead of an open-coded version
in order to avoid any potential type mistakes.

So, replace the following function:

static struct stm32_dma_desc *stm32_dma_alloc_desc(u32 num_sgs)
{
       return kzalloc(sizeof(struct stm32_dma_desc) +
                      sizeof(struct stm32_dma_sg_req) * num_sgs, GFP_NOWAIT);
}

with:

kzalloc(struct_size(desc, sg_req, num_sgs), GFP_NOWAIT)

This code was detected with the help of Coccinelle.

Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com>
Link: https://lore.kernel.org/r/20190830161423.GA3483@embeddedor
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-09-04 10:25:08 +05:30
Gustavo A. R. Silva 25af5afe77 dmanegine: ioat/dca: Use struct_size() helper
One of the more common cases of allocation size calculations is finding
the size of a structure that has a zero-sized array at the end, along
with memory for some number of elements for that array. For example:

struct ioat_dca_priv {
	...
        struct ioat_dca_slot     req_slots[0];
};

Make use of the struct_size() helper instead of an open-coded version
in order to avoid any potential type mistakes.

So, replace the following form:

sizeof(*ioatdca) + (sizeof(struct ioat_dca_slot) * slots)

with:

struct_size(ioatdca, req_slots, slots)

This code was detected with the help of Coccinelle.

Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com>
Acked-by: Dave Jiang <dave.jiang@intel.com>
Link: https://lore.kernel.org/r/20190828184015.GA4273@embeddedor
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-09-04 10:17:14 +05:30
YueHaibing 09104bb1b5 dmaengine: iop-adma: remove set but not used variable 'slots_per_op'
Fixes gcc '-Wunused-but-set-variable' warning:

drivers/dma/iop-adma.c: In function iop_adma_tx_submit:
drivers/dma/iop-adma.c:367:6: warning:
 variable slots_per_op set but not used [-Wunused-but-set-variable]

It is never used, so can be removed.

Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: YueHaibing <yuehaibing@huawei.com>
Link: https://lore.kernel.org/r/20190821121908.7468-1-yuehaibing@huawei.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-09-04 10:15:38 +05:30
Peter Ujfalusi fb9816f9d0 dmaengine: dmatest: Add support for completion polling
With the polled parameter the DMA drivers can be tested if they can work
correctly when no completion is requested (no DMA_PREP_INTERRUPT and no
callback is provided).

If polled mode is selected then use dma_sync_wait() to execute the test
iteration instead of relying on the completion callback.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Link: https://lore.kernel.org/r/20190731071438.24075-1-peter.ujfalusi@ti.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-09-04 10:14:22 +05:30
Peter Ujfalusi 9fa2df6eaf dmaengine: ti: omap-dma: Remove variable override in omap_dma_tx_status()
There is no need to fetch local omap_desc since the desc we have is the
correct one already when we need to check the channel status.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Link: https://lore.kernel.org/r/20190730132029.2971-1-peter.ujfalusi@ti.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-09-04 10:11:17 +05:30
Peter Ujfalusi 7a09c09c30 dmaengine: ti: omap-dma: Remove 'Assignment in if condition'
While the compiler does not have problem with how it is implemented,
checkpatch does give en ERROR for this arrangement.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Link: https://lore.kernel.org/r/20190730132015.2863-1-peter.ujfalusi@ti.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-09-04 10:10:17 +05:30
Peter Ujfalusi e3b9fef8dd dmaengine: ti: edma: Remove 'Assignment in if condition'
While the compiler does not have problem with how it is implemented,
checkpatch does give en ERROR for this arrangement.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Link: https://lore.kernel.org/r/20190730132006.2790-1-peter.ujfalusi@ti.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-09-04 10:06:15 +05:30
Linus Torvalds 20eabc8966 Wimplicit-fallthrough patches for 5.3-rc6
Hi Linus,
 
 Please, pull the following patches that mark switch cases where we are
 expecting to fall through.
 
  - Fix fall-through warnings on arm and mips for multiple
    configurations.
 
 Thanks
 
 Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com>
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Merge tag 'Wimplicit-fallthrough-5.3-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/gustavoars/linux

Pull more fallthrough fixes from Gustavo A. R. Silva:
 "Fix fall-through warnings on arm and mips for multiple configurations"

* tag 'Wimplicit-fallthrough-5.3-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/gustavoars/linux:
  video: fbdev: acornfb: Mark expected switch fall-through
  scsi: libsas: sas_discover: Mark expected switch fall-through
  MIPS: Octeon: Mark expected switch fall-through
  power: supply: ab8500_charger: Mark expected switch fall-through
  watchdog: wdt285: Mark expected switch fall-through
  mtd: sa1100: Mark expected switch fall-through
  drm/sun4i: tcon: Mark expected switch fall-through
  drm/sun4i: sun6i_mipi_dsi: Mark expected switch fall-through
  ARM: riscpc: Mark expected switch fall-through
  dmaengine: fsldma: Mark expected switch fall-through
2019-08-22 11:26:10 -07:00
Andy Shevchenko f5e84eae79 dmaengine: dw: platform: Split OF helpers to separate module
For better maintenance split OF helpers to the separate module.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20190820131546.75744-11-andriy.shevchenko@linux.intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-08-21 09:41:28 +05:30
Andy Shevchenko b685fe26e9 dmaengine: dw: platform: Split ACPI helpers to separate module
For better maintenance split ACPI helpers to the separate module.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20190820131546.75744-10-andriy.shevchenko@linux.intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-08-21 09:41:28 +05:30
Andy Shevchenko 84da042e70 dmaengine: dw: platform: Move handle check to dw_dma_acpi_controller_register()
Move ACPI handle check to the dw_dma_acpi_controller_register().

While here, convert it to has_acpi_companion() which is recommended way.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20190820131546.75744-9-andriy.shevchenko@linux.intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-08-21 09:41:28 +05:30
Andy Shevchenko e7b8514e4d dmaengine: dw: platform: Switch to acpi_dma_controller_register()
There is a possibility to have registered ACPI DMA controller
while it has been gone already.

To avoid the potential crash, move to non-managed
acpi_dma_controller_register().

Fixes: 42c91ee71d ("dw_dmac: add ACPI support")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20190820131546.75744-8-andriy.shevchenko@linux.intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-08-21 09:41:28 +05:30
Andy Shevchenko a9c56721d6 dmaengine: dw: platform: Use devm_platform_ioremap_resource()
Use the new helper that wraps the calls to platform_get_resource()
and devm_ioremap_resource() together.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20190820131546.75744-7-andriy.shevchenko@linux.intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-08-21 09:41:28 +05:30
Andy Shevchenko f8d9ddbc28 dmaengine: dw: platform: Enable iDMA 32-bit on Intel Elkhart Lake
Intel® PSE (Programmable Services Engine) provides few DMA controllers
to the host on Intel Elkhart Lake. Enable them in the ACPI glue driver.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20190820131546.75744-6-andriy.shevchenko@linux.intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-08-21 09:41:27 +05:30
Andy Shevchenko b3757413b9 dmaengine: dw: platform: Use struct dw_dma_chip_pdata
Now, when we have a generic structure for the chip and platform data,
use it in the platform glue driver.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20190820131546.75744-5-andriy.shevchenko@linux.intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-08-21 09:41:27 +05:30
Andy Shevchenko ae923c91aa dmaengine: dw: Export struct dw_dma_chip_pdata for wider use
We are expecting some devices can be enumerated either as PCI or ACPI.
Nevertheless, they will share same information, thus, provide a generic
struct dw_dma_chip_pdata for all glue drivers.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20190820131546.75744-4-andriy.shevchenko@linux.intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-08-21 09:41:27 +05:30
Andy Shevchenko 4b8584bac0 dmaengine: acpi: Add kernel doc parameter descriptions
Kernel documentation script is not happy about absence of function parameter
descriptions:

drivers/dma/acpi-dma.c:163: warning: Function parameter or member 'data' not described in 'acpi_dma_controller_register'
drivers/dma/acpi-dma.c:247: warning: Function parameter or member 'data' not described in 'devm_acpi_dma_controller_register'
drivers/dma/acpi-dma.c:274: warning: Function parameter or member 'dev' not described in 'devm_acpi_dma_controller_free'

Append the descriptions of above mentioned function parameters.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20190820131546.75744-3-andriy.shevchenko@linux.intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-08-21 09:41:27 +05:30
Andy Shevchenko a6bc332373 dmaengine: acpi: Set up DMA mask based on CSRT
CSRT has an information about address width, which is supported by
the certain DMA controller.

Use information from CSRT to set up DMA mask for shared controller.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20190820131546.75744-2-andriy.shevchenko@linux.intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-08-21 09:41:27 +05:30
Gustavo A. R. Silva 377ec83643 dmaengine: fsldma: Mark expected switch fall-through
Mark switch cases where we are expecting to fall through.

Fix the following warnings (Building: powerpc-ppa8548_defconfig powerpc):

drivers/dma/fsldma.c: In function ‘fsl_dma_chan_probe’:
drivers/dma/fsldma.c:1165:26: warning: this statement may fall through [-Wimplicit-fallthrough=]
   chan->toggle_ext_pause = fsl_chan_toggle_ext_pause;
   ~~~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/dma/fsldma.c:1166:2: note: here
  case FSL_DMA_IP_83XX:
  ^~~~

Reported-by: kbuild test robot <lkp@intel.com>
Acked-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com>
2019-08-20 19:42:34 -05:00
Wenwen Wang 962411b05a dmaengine: ti: omap-dma: Add cleanup in omap_dma_probe()
If devm_request_irq() fails to disable all interrupts, no cleanup is
performed before retuning the error. To fix this issue, invoke
omap_dma_free() to do the cleanup.

Signed-off-by: Wenwen Wang <wenwen@cs.uga.edu>
Acked-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Link: https://lore.kernel.org/r/1565938570-7528-1-git-send-email-wenwen@cs.uga.edu
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-08-20 17:16:17 +05:30
Wenwen Wang 2c231c0c1d dmaengine: ti: dma-crossbar: Fix a memory leak bug
In ti_dra7_xbar_probe(), 'rsv_events' is allocated through kcalloc(). Then
of_property_read_u32_array() is invoked to search for the property.
However, if this process fails, 'rsv_events' is not deallocated, leading to
a memory leak bug. To fix this issue, free 'rsv_events' before returning
the error.

Signed-off-by: Wenwen Wang <wenwen@cs.uga.edu>
Acked-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Link: https://lore.kernel.org/r/1565938136-7249-1-git-send-email-wenwen@cs.uga.edu
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-08-20 17:16:15 +05:30
Mao Wenan d071fd294f dmaengine: change alignment of mux_configure32 and fsl_edma_chan_mux
The alignment of mux_configure32() and fsl_edma_chan_mux() need
to be adjusted, it must start precisely at the first column after
the openning parenthesis of the first line.

Fixes: 9d831528a6 ("dmaengine: fsl-edma: extract common fsl-edma code (no changes in behavior intended)")
Signed-off-by: Mao Wenan <maowenan@huawei.com>
Link: https://lore.kernel.org/r/20190814072105.144107-3-maowenan@huawei.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2019-08-20 17:09:34 +05:30