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876320 Commits (d736dfa7d054e98672782e299b766f53d5e14857)

Author SHA1 Message Date
Calvin Johnson d736dfa7d0 staging: fsl_ppfe/eth: add pfe support to Kconfig and Makefile
Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
[ Aisheng: fix minor conflict due to removed VBOXSF_FS ]
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
2019-12-02 18:05:11 +08:00
Ting Liu 69b54742b6 staging: fsl_ppfe/eth: prefix header search paths with $(srctree)/
Currently, the rules for configuring search paths in Kbuild have
changed: https://lkml.org/lkml/2019/5/13/37

This will lead the below error:

fatal error: pfe/pfe.h: No such file or directory

Fix it by adding $(srctree)/ prefix to the search paths.

Signed-off-by: Ting Liu <ting.liu@nxp.com>
2019-12-02 18:05:10 +08:00
Li Yang 0594c1fff6 staging: fsl_ppfe/eth: remove 'fallback' argument from dev->ndo_select_queue()
To be consistent with upstream API change.

Signed-off-by: Li Yang <leoyang.li@nxp.com>
2019-12-02 18:05:09 +08:00
Calvin Johnson 658db0ba79 staging: fsl_ppfe/eth: use memremap() to map RAM area used by PFE
RAM area used by PFE should be mapped using memremap() instead of
directly traslating physical addr to virtual. This will ensure proper
checks are done before the area is used.

Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
2019-12-02 18:05:09 +08:00
Calvin Johnson 24d69cea65 staging: fsl_ppfe/eth: use generic soc_device infra instead of fsl_guts_get_svr()
Commit ("soc: fsl: guts: make fsl_guts_get_svr() static") has
made fsl_guts_get_svr() static and hence use generic soc_device
infrastructure to check SoC revision.

Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
2019-12-02 18:05:08 +08:00
Calvin Johnson 54fe1e0dd6 staging: fsl_ppfe/eth: adapt to link mode based phydev changes
Setting link mode bits have changed with the integration of
commit (3c1bcc8 net: ethernet: Convert phydev advertize and
supported from u32 to link mode). Adapt to the new method of
setting and clearing the link mode bits.

Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
2019-12-02 18:05:08 +08:00
Calvin Johnson 9688f347dd staging: fsl_ppfe/eth: separate mdio init from mac init
- separate mdio initialization from mac initialization
- Define pfe_mdio_priv_s structure to hold mii_bus structure and other
  related data.
- Modify functions to work with the separted mdio init model.

Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
2019-12-02 18:05:07 +08:00
Calvin Johnson e6092a5f07 staging: fsl_ppfe/eth: remove unused code
- remove gemac-bus-id related code that is unused.
- remove unused prototype gemac_set_mdc_div.

Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
2019-12-02 18:05:07 +08:00
Calvin Johnson 5f95d60da3 net: fsl_ppfe: update dts properties for phy
Use commonly used phy-handle property and mdio subnode to handle
phy properties.

Deprecate bindings fsl,gemac-phy-id & fsl,pfe-phy-if-flags.

Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
2019-12-02 18:05:07 +08:00
Calvin Johnson a498d8f7a0 staging: fsl_ppfe/eth: support single interface initialization
- arrange members of struct mii_bus in sequence matching phy.h
- if mdio node is defined, use of_mdiobus_register to register
  child nodes (phy devices) available on the mdio bus.
- remove of_phy_register_fixed_link from pfe_phy_init as it is being
  handled in pfe_get_gemac_if_properties
- remove mdio enabled check
- skip phy init, if no PHY or fixed-link

Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
2019-12-02 18:05:07 +08:00
Calvin Johnson f0645177f9 staging: fsl_ppfe/eth: reorganize platform phy parameters
- Use "phy-handle" and of_* functions to get phy node and fixed-link
parameters

- Reorganize phy parameters and initialize them only if phy-handle
or fixed-link is defined in the dtb.

- correct typo pfe_get_gemac_if_proprties to pfe_get_gemac_if_properties

Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
2019-12-02 18:05:06 +08:00
Calvin Johnson b44f7c508b staging: fsl_ppfe/eth: misc clean up
- remove redundant hwfeature init
- remove unused vars from ls1012a_eth_platform_data
- To handle ls1012a errata_a010897, PPFE driver requires GUTS driver
to be compiled in. Select FSL_GUTS when PPFE driver is compiled.

Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
2019-12-02 18:05:06 +08:00
Calvin Johnson 1783b0624b staging: fsl_ppfe/eth: Update to use SPDX identifiers
Replace license text with corresponding SPDX identifiers and update the
format of existing SPDX identifiers to follow the new guideline
Documentation/process/license-rules.rst.

Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
2019-12-02 18:05:05 +08:00
Akhil Goyal 1785151bb0 staging: fsl_ppfe: performance tuning for user space
interrupt coalescing of 100 usec is added.

Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
Signed-off-by: Sachin Saxena <sachin.saxena@nxp.com>
2019-12-02 18:05:05 +08:00
Akhil Goyal d2009ed1f0 staging: fsl_ppfe: enable hif event from userspace
HIF interrupts are enabled using ioctl from user space,
and epoll wait from user space wakes up when there is an HIF
interrupt.

Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
2019-12-02 18:05:05 +08:00
Shreyansh Jain 62d4c212c0 staging: fsl_ppfe: add support for a char dev for link status
Read and IOCTL support is added. Application would need to open,
read/ioctl the /dev/pfe_us_cdev device.
select is pending as it requires a wait_queue.

Signed-off-by: Shreyansh Jain <shreyansh.jain@nxp.com>
Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
2019-12-02 18:05:04 +08:00
Calvin Johnson fab313f6f0 staging: fsl_ppfe/eth: add fixed-link support
In cases where MAC is not connected to a normal MDIO-managed PHY
device, and instead to a switch, it is configured as a "fixed-link".
Code to handle this scenario is added here.

phy_node in the dtb is checked to identify a fixed-link.
On identification of a fixed-link, it is registered and connected.

Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
2019-12-02 18:05:03 +08:00
Calvin Johnson d75972b2ca staging: fsl_ppfe/eth: resolve indentation warning
Resolve the following indentation warning:

drivers/staging/fsl_ppfe/pfe_ls1012a_platform.c:
In function ‘pfe_get_gemac_if_proprties’:
drivers/staging/fsl_ppfe/pfe_ls1012a_platform.c:96:2:
warning: this ‘else’ clause does not guard...
[-Wmisleading-indentation]
  else
  ^~~~
drivers/staging/fsl_ppfe/pfe_ls1012a_platform.c:98:3:
note: ...this statement, but the latter is misleadingly indented as
if it were guarded by the ‘else’
   pdata->ls1012a_eth_pdata[port].mdio_muxval = phy_id;
   ^~~~~

Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
2019-12-02 18:05:02 +08:00
Calvin Johnson dbff4fe66a staging: fsl_ppfe/eth: replace magic numbers
Replace magic numbers and some cosmetic changes.

Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
2019-12-02 18:05:02 +08:00
Calvin Johnson 3d59ba5818 staging: fsl_ppfe/eth: handle ls1012a errata_a010897
On LS1012A rev 1.0, Jumbo frames are not supported as it causes
the PFE controller to hang. A reset of the entire chip is required
to resume normal operation.

To handle this errata, frames with length > 1900 are truncated for
rev 1.0 of LS1012A.

Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
2019-12-02 18:05:02 +08:00
Calvin Johnson 3f288e369a staging: fsl_ppfe/eth: disable CRC removal
Disable CRC removal from the packet, so that packets are forwarded
as is to Linux.
CRC configuration in MAC will be reflected in the packet received
to Linux.

Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
2019-12-02 18:05:01 +08:00
Calvin Johnson b9d5f651e6 staging: fsl_ppfe/eth: remove jumbo frame enable from gemac init
MAC Receive Control Register was configured to allow jumbo frames.
This is removed as jumbo frames can be supported anytime by changing
mtu which will in turn modify MAX_FL field of MAC RCR.
Jumbo frames caused pfe to hang on LS1012A rev 1.0 Silicon due to
erratum A-010897.

Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
2019-12-02 18:05:01 +08:00
Calvin Johnson 3b7a66dc81 staging: fsl_ppfe/eth: define pfe ndo_change_mtu function
Define ndo_change_mtu function for pfe. This sets the max Rx frame
length to the new mtu.

Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
2019-12-02 18:05:00 +08:00
Calvin Johnson 4f617ff735 staging: fsl_ppfe/eth: use mask for rx max frame len
Define and use PFE_RCR_MAX_FL_MASK to properly set Rx max frame
length of MAC Receive Control Register.

Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
2019-12-02 18:04:59 +08:00
Calvin Johnson 5bf4094441 staging: fsl_ppfe/eth: reorganize pfe_netdev_ops
Reorganize members of struct pfe_netdev_ops to match with the order
of members in struct net_device_ops defined in include/linux/netdevice.h

Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
2019-12-02 18:04:59 +08:00
anuj batham 8ea7cbc859 staging: fsl_ppfe/eth: HW parse results for DPDK
HW Parse results are included in the packet headroom.
Length and Offset calculation now accommodates parse info size.

Signed-off-by: Archana Madhavan <archana.madhavan@nxp.com>
2019-12-02 18:04:58 +08:00
Calvin Johnson b0c6cb4781 staging: fsl_ppfe/eth: unregister netdev after pfe_phy_exit
rmmod pfe.ko throws below warning:

kernfs: can not remove 'phydev', no directory
------------[ cut here ]------------
WARNING: CPU: 0 PID: 2230 at fs/kernfs/dir.c:1481
kernfs_remove_by_name_ns+0x90/0xa0

This is caused when the unregistered netdev structure is accessed to
disconnect phy.

Resolve the issue by unregistering netdev after disconnecting phy.

Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
2019-12-02 18:04:58 +08:00
Akhil Goyal 5c20cca334 staging: fsl_ppfe/eth: support for userspace networking
This patch adds the userspace mode support to fsl_ppfe network driver.
In the new mode, basic hardware initialization is performed in kernel, while
the datapath and HIF handling is the responsibility of the userspace.

The new command line parameter is added to initialize the ppfe module
in userspace mode. By default the module remains in kernelspace networking
mode.
To enable userspace mode, use "insmod pfe.ko us=1"

Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
Signed-off-by: Gagandeep Singh <g.singh@nxp.com>
2019-12-02 18:04:58 +08:00
Calvin Johnson 11c4548e49 staging: fsl_ppfe/eth: calculate PFE_PKT_SIZE with SKB_DATA_ALIGN
pfe packet size was calculated without considering skb data alignment
and this resulted in jumbo frames crashing kernel when the
cacheline size increased from 64 to 128 bytes with
commit 9730348075 ("arm64: Increase the max granular size").

Modify pfe packet size caclulation to include skb data alignment of
sizeof(struct skb_shared_info).

Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
2019-12-02 18:04:57 +08:00
Bhaskar Upadhaya 1f13ccbbf0 staging: fsl_ppfe/eth: Disable autonegotiation for 2.5G SGMII
PCS initialization sequence for 2.5G SGMII interface governs
auto negotiation to be in disabled mode

Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com>
2019-12-02 18:04:57 +08:00
Bhaskar Upadhaya e947a43e6e staging: fsl_ppfe/eth: Enable PFE in clause 45 mode
when we opearate in clause 45 mode, we need to call
the function get_phy_device() with its 3rd argument as
"true" and then the resultant phy device needs to be
register with phy layer via phy_device_register()

Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com>
2019-12-02 18:04:57 +08:00
Kavi Akhila-B46177 d923279b92 staging: fsl_ppfe/eth: Avoid packet drop at TMU queues
Added flow control between TMU queues and PFE Linux driver,
based on TMU credits availability.
Added tx_qos module parameter to control this behavior.
Use queue-0 as default queue to transmit packets.

Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
Signed-off-by: Akhila Kavi <akhila.kavi@nxp.com>
Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com>
2019-12-02 18:04:56 +08:00
Calvin Johnson 4dd92879c0 staging: fsl_ppfe/eth: add function to update tmu credits
__hif_lib_update_credit function is used to update the tmu credits.
If tx_qos is set, tmu credit is updated based on the number of packets
transmitted by tmu.

Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com>
2019-12-02 18:04:56 +08:00
Calvin Johnson eff1d7fc71 staging: fsl_ppfe/eth: Make phy_ethtool_ksettings_get return void
Make return value void since function never return meaningful value

Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
2019-12-02 18:04:55 +08:00
Calvin Johnson 6b7fa1fdb5 staging: fsl_ppfe/eth: fix read/write/ack idx issue
While fixing checkpatch errors some of the index increments
were commented out. They are enabled.

Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
2019-12-02 18:04:55 +08:00
Calvin Johnson 782ffeea4c staging: fsl_ppfe/eth: remove unused functions
Remove unused functions hif_xmit_pkt & hif_lib_xmit_pkt.

Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
2019-12-02 18:04:54 +08:00
Calvin Johnson 2162c084f7 staging: fsl_ppfe/eth: fix RGMII tx delay issue
Recently logic to enable RGMII tx delay was changed by
below patch.

https://patchwork.kernel.org/patch/9447581/

Based on the patch, appropriate change is made in PFE driver.

Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com>
2019-12-02 18:04:54 +08:00
Calvin Johnson 520f8c5cf5 staging: fsl_ppfe/eth: introduce pfe driver
This patch introduces Linux support for NXP's LS1012A Packet
Forwarding Engine (pfe_eth). LS1012A uses hardware packet forwarding
engine to provide high performance Ethernet interfaces. The device
includes two Ethernet ports.

Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com>
2019-12-02 18:04:53 +08:00
Calvin Johnson 23bf09a6eb staging: fsl_ppfe/eth: header files for pfe driver
This patch has all pfe header files.

Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com>
2019-12-02 18:04:53 +08:00
Calvin Johnson e424f891ed net: fsl_ppfe: dts binding for ppfe
Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com>
2019-12-02 18:04:53 +08:00
Vladimir Oltean 1082a3ef9e net: dsa: felix: Add PCS operations for PHYLINK
This removes the bootloader dependency for SGMII PCS pre-configuration,
as well as adds support for monitoring the in-band SGMII AN between the
PCS and the system-side link partner (PHY or other MAC).

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
2019-12-02 18:04:52 +08:00
Vladimir Oltean 423c8b0400 net: mscc: ocelot: introduce more focused PCS ops for PHYLINK
The reason for doing this is that the 2 mainline Ocelot switches so far,
VSC7514 and VSC9959, have radically different SoC/SerDes integration. So
although the PHYLINK callbacks are common, the implementations will
actually lie in device-specific function pointers.

Also, there was a duplicated and unused function pointer for pcs_init in
struct ocelot, remove that.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
2019-12-02 18:04:52 +08:00
Vladimir Oltean e51cc023c3 net: mscc: ocelot: convert to PHYLINK
This patch reworks ocelot_board.c (aka the MIPS on the VSC7514) to
register a PHYLINK instance for each port. The registration code is
local to the VSC7514, but the PHYLINK callback implementation is common
so that the Felix DSA front-end can use it as well (but DSA does its own
registration).

Now Felix can use native PHYLINK callbacks instead of the PHYLIB
adaptation layer in DSA, which had issues supporting fixed-link slave
ports (no struct phy_device to pass to the adjust_link callback), as
well as fixed-link CPU port at 2.5Gbps.

The old code from ocelot_port_enable and ocelot_port_disable has been
moved into ocelot_phylink_mac_link_up and ocelot_phylink_mac_link_down.

The PHY connect operation has been moved from ocelot_port_open to
mscc_ocelot_probe in ocelot_board.c.

The phy_set_mode_ext() call for the SerDes PHY has also been moved into
mscc_ocelot_probe from ocelot_port_open, and since that was the only
reason why a reference to it was kept in ocelot_port_private, that
reference was removed.

Again, the usage of phy_interface_t phy_mode is now local to
mscc_ocelot_probe only, after moving the PHY connect operation.
So it was also removed from ocelot_port_private.
*Maybe* in the future, it can be added back to the common struct
ocelot_port, with the purpose of validating mismatches between
state->phy_interface and ocelot_port->phy_mode in PHYLINK callbacks.
But at the moment that is not critical, since other DSA drivers are not
doing that either. No SFP+ modules are in use with Felix/Ocelot yet, to
my knowledge.

In-band AN is not yet supported, due to the fact that this is a mostly
mechanical patch for the moment. The mac_an_restart PHYLINK operation
needs to be implemented, as well as mac_link_state. Both are SerDes
specific, and Felix does not have its PCS configured yet (it works just
by virtue of U-Boot initialization at the moment).

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
2019-12-02 18:04:52 +08:00
Vladimir Oltean f3ebad1269 net: mscc: ocelot: do not force Felix MACs at lower speeds than gigabit
In the LS1028A, the VSC9959 switch was integrated with an NXP PCS which
performs SGMII AN and rate adaptation autonomously. The MAC does not
need to know about this, and forcing the MAC speed to something else,
when connected to a 10/100 link partner, actually breaks the GMII
internal link between the MAC and the PCS.

Add a quirk system in the ocelot driver, and a first quirk called "PCS
performs rate adaptation", to distinguish the VSC7514 from the VSC9959
regarding this behavior.

Signed-off-by: Catalin Horghidan <catalin.horghidan@nxp.com>
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
2019-12-02 18:04:51 +08:00
Vladimir Oltean 9dc338323f net: mscc: ocelot: unregister the PTP clock on deinit
Currently a switch driver deinit frees the regmaps, but the PTP clock is
still out there, available to user space via /dev/ptpN. Any PTP
operation is a ticking time bomb, since it will attempt to use the freed
regmaps and thus trigger kernel panics:

[    4.291746] fsl_enetc 0000:00:00.2 eth1: error -22 setting up slave phy
[    4.291871] mscc_felix 0000:00:00.5: Failed to register DSA switch: -22
[    4.308666] mscc_felix: probe of 0000:00:00.5 failed with error -22
[    6.358270] Unable to handle kernel NULL pointer dereference at virtual address 0000000000000088
[    6.367090] Mem abort info:
[    6.369888]   ESR = 0x96000046
[    6.369891]   EC = 0x25: DABT (current EL), IL = 32 bits
[    6.369892]   SET = 0, FnV = 0
[    6.369894]   EA = 0, S1PTW = 0
[    6.369895] Data abort info:
[    6.369897]   ISV = 0, ISS = 0x00000046
[    6.369899]   CM = 0, WnR = 1
[    6.369902] user pgtable: 4k pages, 48-bit VAs, pgdp=00000020d58c7000
[    6.369904] [0000000000000088] pgd=00000020d5912003, pud=00000020d5915003, pmd=0000000000000000
[    6.369914] Internal error: Oops: 96000046 [#1] PREEMPT SMP
[    6.420443] Modules linked in:
[    6.423506] CPU: 1 PID: 262 Comm: phc_ctl Not tainted 5.4.0-03625-gb7b2a5dadd7f #204
[    6.431273] Hardware name: LS1028A RDB Board (DT)
[    6.435989] pstate: 40000085 (nZcv daIf -PAN -UAO)
[    6.440802] pc : css_release+0x24/0x58
[    6.444561] lr : regmap_read+0x40/0x78
[    6.448316] sp : ffff800010513cc0
[    6.451636] x29: ffff800010513cc0 x28: ffff002055873040
[    6.456963] x27: 0000000000000000 x26: 0000000000000000
[    6.462289] x25: 0000000000000000 x24: 0000000000000000
[    6.467617] x23: 0000000000000000 x22: 0000000000000080
[    6.472944] x21: ffff800010513d44 x20: 0000000000000080
[    6.478270] x19: 0000000000000000 x18: 0000000000000000
[    6.483596] x17: 0000000000000000 x16: 0000000000000000
[    6.488921] x15: 0000000000000000 x14: 0000000000000000
[    6.494247] x13: 0000000000000000 x12: 0000000000000000
[    6.499573] x11: 0000000000000000 x10: 0000000000000000
[    6.504899] x9 : 0000000000000000 x8 : 0000000000000000
[    6.510225] x7 : 0000000000000000 x6 : ffff800010513cf0
[    6.515550] x5 : 0000000000000000 x4 : 0000000fffffffe0
[    6.520876] x3 : 0000000000000088 x2 : ffff800010513d44
[    6.526202] x1 : ffffcada668ea000 x0 : ffffcada64d8b0c0
[    6.531528] Call trace:
[    6.533977]  css_release+0x24/0x58
[    6.537385]  regmap_read+0x40/0x78
[    6.540795]  __ocelot_read_ix+0x6c/0xa0
[    6.544641]  ocelot_ptp_gettime64+0x4c/0x110
[    6.548921]  ptp_clock_gettime+0x4c/0x58
[    6.552853]  pc_clock_gettime+0x5c/0xa8
[    6.556699]  __arm64_sys_clock_gettime+0x68/0xc8
[    6.561331]  el0_svc_common.constprop.2+0x7c/0x178
[    6.566133]  el0_svc_handler+0x34/0xa0
[    6.569891]  el0_sync_handler+0x114/0x1d0
[    6.573908]  el0_sync+0x140/0x180
[    6.577232] Code: d503201f b00119a1 91022263 b27b7be4 (f9004663)
[    6.583349] ---[ end trace d196b9b14cdae2da ]---
[    6.587977] Kernel panic - not syncing: Fatal exception
[    6.593216] SMP: stopping secondary CPUs
[    6.597151] Kernel Offset: 0x4ada54400000 from 0xffff800010000000
[    6.603261] PHYS_OFFSET: 0xffffd0a7c0000000
[    6.607454] CPU features: 0x10002,21806008
[    6.611558] Memory Limit: none

And now that ocelot->ptp_clock is checked at exit, prevent a potential
error where ptp_clock_register returned a pointer-encoded error, which
we are keeping in the ocelot private data structure. So now,
ocelot->ptp_clock is now either NULL or a valid pointer.

Fixes: 4e3b0468e6 ("net: mscc: PTP Hardware Clock (PHC) support")
Cc: Antoine Tenart <antoine.tenart@bootlin.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
2019-12-02 18:04:51 +08:00
Vladimir Oltean 3f643e4af0 enetc: Set MDIO_CFG_HOLD to the recommended value of 2
This increases the MDIO hold time to 5 enet_clk cycles from the previous
value of 0. This is actually the out-of-reset value, that the driver was
previously overwriting with 0. Zero worked for the external MDIO, but
breaks communication with the internal MDIO buses on which the PCS of
ENETC SI's and Felix switch are found.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
2019-12-02 18:04:51 +08:00
Vladimir Oltean f8d80c003b enetc: export enetc_mdio definitionns to include/linux/fsl
The Felix DSA switch has an internal MDIO bus that has the same register
map as the ENETC one, so the accessors can be reused.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
2019-12-02 18:04:50 +08:00
Vladimir Oltean 57fe15baac net: phylink: call mac_an_restart for SGMII/QSGMII inband interfaces too
It doesn't quite make sense why restarting the AN process should be
unique to 802.3z (1000Base-X) modes. It is valid to put an SGMII PCS in
in-band AN mode, therefore also make PHYLINK re-trigger an
auto-negotiation if needed.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
2019-12-02 18:04:50 +08:00
Vladimir Oltean fe7fd9f6af net: phylink: make QSGMII a valid PHY mode for in-band AN
QSGMII is just SGMII clocked at a higher frequency (5 Gbaud vs 1.25
Gbaud). Logically it is just 4 SGMII interfaces multiplexed onto the
same physical lanes. Each MAC PCS has its own in-band AN process with
the system side of the QSGMII PHY, which is identical to the regular
SGMII AN process. So allow QSGMII as a valid in-band AN mode.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
2019-12-02 18:04:49 +08:00
Vladimir Oltean de81e3c1cc mii: Add helpers for parsing SGMII auto-negotiation
Typically a MAC PCS auto-configures itself after it receives the
negotiated link settings from the PHY, but some MAC devices are more
special and need manual manipulation of the SGMII AN result.

Therefore, add the bit definitions for the SGMII registers 4 and 5
(local device ability, link partner ability), as well as a link_mode
conversion helper that can be used to feed the AN results into
phy_resolve_aneg_linkmode.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
2019-12-02 18:04:48 +08:00