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855384 Commits (e4faafbf5c3f5ec9242583c920542eceda2b6fab)

Author SHA1 Message Date
Bjorn Helgaas e4faafbf5c Merge branch 'remotes/lorenzo/pci/misc'
- Propagate regulator_get_optional() errors so callers can distinguish
    real errors from optional regulators that are absent (Thierry Reding)

  - Propagate devm_of_phy_get() errors so callers can distinguish
    real errors from optional PHYs that are absent (Thierry Reding)

  - Add Andrew Murray as PCI native driver reviewer (Lorenzo Pieralisi)

* remotes/lorenzo/pci/misc:
  MAINTAINERS: Add PCI native host/endpoint controllers designated reviewer
  PCI: iproc: Propagate errors for optional PHYs
  PCI: histb: Propagate errors for optional regulators
  PCI: armada8x: Propagate errors for optional PHYs
  PCI: imx6: Propagate errors for optional regulators
  PCI: exynos: Propagate errors for optional PHYs
  PCI: rockchip: Propagate errors for optional regulators
2019-09-23 16:10:26 -05:00
Bjorn Helgaas 8b38b5f2cf Merge branch 'remotes/lorenzo/pci/mediatek'
- Add mediatek support for MT7629 (Jianjun Wang)

* remotes/lorenzo/pci/mediatek:
  PCI: mediatek: Add controller support for MT7629
  dt-bindings: PCI: Add support for MT7629
2019-09-23 16:10:24 -05:00
Bjorn Helgaas 5adc7d5106 Merge branch 'remotes/lorenzo/pci/layerscape'
- Mark Layerscape endpoint BARs 2 and 4 as 64-bit (Xiaowei Bao)

  - Add CONFIG_PCI_LAYERSCAPE_EP so EP/RC can be built separately (Xiaowei
    Bao)

* remotes/lorenzo/pci/layerscape:
  PCI: layerscape: Add CONFIG_PCI_LAYERSCAPE_EP to build EP/RC separately
  PCI: layerscape: Add the bar_fixed_64bit property to the endpoint driver
2019-09-23 16:10:23 -05:00
Bjorn Helgaas 7088241678 Merge branch 'remotes/lorenzo/pci/imx'
- Reduce i.MX 6Quad DBI register length to avoid aborts from accessing
    invalid registers (Stefan Agner)

* remotes/lorenzo/pci/imx:
  PCI: imx6: Limit DBI register length
2019-09-23 16:10:21 -05:00
Bjorn Helgaas a40c4b379f Merge branch 'remotes/lorenzo/pci/hv'
- Fix Hyper-V use-after-free in pci_dev removal (Dexuan Cui)

  - Fix Hyper-V build error in non-sysfs config (Randy Dunlap)

  - Reallocate to avoid Hyper-V domain number collisions (Haiyang Zhang)

  - Use Hyper-V instance ID bytes 4-5 to reduce domain collisions (Haiyang
    Zhang)

* remotes/lorenzo/pci/hv:
  PCI: hv: Use bytes 4 and 5 from instance ID as the PCI domain numbers
  PCI: hv: Detect and fix Hyper-V PCI domain number collision
  PCI: pci-hyperv: Fix build errors on non-SYSFS config
  PCI: hv: Avoid use of hv_pci_dev->pci_slot after freeing it
2019-09-23 16:10:19 -05:00
Bjorn Helgaas b83e445d46 Merge branch 'remotes/lorenzo/pci/dwc'
- Make kirin_dw_pcie_ops constant (Nishka Dasgupta)

  - Make DesignWare "num-lanes" property optional and remove from relevant
    DTs (Hou Zhiqiang)

* remotes/lorenzo/pci/dwc:
  arm64: dts: fsl: Remove num-lanes property from PCIe nodes
  ARM: dts: ls1021a: Remove num-lanes property from PCIe nodes
  PCI: dwc: Return directly when num-lanes is not found
  dt-bindings: PCI: designware: Remove the num-lanes from Required properties
  PCI: kirin: Make structure kirin_dw_pcie_ops constant
2019-09-23 16:10:18 -05:00
Bjorn Helgaas af47f25f33 Merge branch 'remotes/lorenzo/pci/al'
- Add driver for Amazon Annapurna Labs PCIe controller (Jonathan Chocron)

  - Disable MSI-X since Annapurna Labs advertises it, but it's broken
    (Jonathan Chocron)

  - Disable VPD since Annapurna Labs advertises it, but it's broken
    (Jonathan Chocron)

  - Add ACS quirk since Annapurna Labs doesn't support ACS but does provide
    some equivalent protections (Ali Saidi)

* remotes/lorenzo/pci/al:
  PCI: dwc: Add validation that PCIe core is set to correct mode
  PCI: dwc: al: Add Amazon Annapurna Labs PCIe controller driver
  dt-bindings: PCI: Add Amazon's Annapurna Labs PCIe host bridge binding
  PCI: Add quirk to disable MSI-X support for Amazon's Annapurna Labs Root Port
  PCI/VPD: Prevent VPD access for Amazon's Annapurna Labs Root Port
  PCI: Add ACS quirk for Amazon Annapurna Labs root ports
  PCI: Add Amazon's Annapurna Labs vendor ID

# Conflicts:
#	drivers/pci/quirks.c
2019-09-23 16:10:17 -05:00
Bjorn Helgaas 0ca0ef1042 Merge branch 'pci/resource'
- Convert pci_resource_to_user() to a weak function to remove
    HAVE_ARCH_PCI_RESOURCE_TO_USER #defines (Denis Efremov)

  - Use PCI_SRIOV_NUM_BARS for idiomatic loop structure (Denis Efremov)

  - Fix Resizable BAR size suspend/restore for 1MB BARs (Sumit Saxena)

  - Correct "pci=resource_alignment" example in documentation (Alexey
    Kardashevskiy)

* pci/resource:
  PCI: Correct pci=resource_alignment parameter example
  PCI: Restore Resizable BAR size bits correctly for 1MB BARs
  PCI: Use PCI_SRIOV_NUM_BARS in loops instead of PCI_IOV_RESOURCE_END
  PCI: Convert pci_resource_to_user() to a weak function

# Conflicts:
#	drivers/pci/pci.c
2019-09-23 16:10:15 -05:00
Bjorn Helgaas 203104c8d5 Merge branch 'pci/pciehp'
- Cleanup pciehp LED/indicator control with a new consolidated
    pciehp_set_indicators() interface that controls both Attention and
    Power Indicators (Denis Efremov)

* pci/pciehp:
  PCI: pciehp: Refer to "Indicators" instead of "LEDs" in comments
  PCI: pciehp: Remove pciehp_green_led_{on,off,blink}()
  PCI: pciehp: Remove pciehp_set_attention_status()
  PCI: pciehp: Combine adjacent indicator updates
  PCI: pciehp: Add pciehp_set_indicators() to set both indicators
2019-09-23 16:10:14 -05:00
Bjorn Helgaas 63fa8437cb Merge branch 'pci/p2pdma'
- Move P2PCMA PCI bus offset from generic dev_pagemap to
    pci_p2pdma_pagemap (Logan Gunthorpe)

  - Add provider's pci_dev to pci_p2pdma_pagemap (Logan Gunthorpe)

  - Apply host bridge whitelist for ACS (Logan Gunthorpe)

  - Whitelist some Intel host bridges for P2PDMA (Logan Gunthorpe)

  - Add attrs to pci_p2pdma_map_sg() to match dma_map_sg() (Logan
    Gunthorpe)

  - Add pci_p2pdma_unmap_sg() (Logan Gunthorpe)

  - Store P2PDMA mapping method in xarray (Logan Gunthorpe)

  - Map requests that traverse a host bridge (Logan Gunthorpe)

  - Allow IOMMU for host bridge whitelist (Logan Gunthorpe)

* pci/p2pdma:
  PCI/P2PDMA: Update pci_p2pdma_distance_many() documentation
  PCI/P2PDMA: Allow IOMMU for host bridge whitelist
  PCI/P2PDMA: dma_map() requests that traverse the host bridge
  PCI/P2PDMA: Store mapping method in an xarray
  PCI/P2PDMA: Factor out __pci_p2pdma_map_sg()
  PCI/P2PDMA: Introduce pci_p2pdma_unmap_sg()
  PCI/P2PDMA: Add attrs argument to pci_p2pdma_map_sg()
  PCI/P2PDMA: Whitelist some Intel host bridges
  PCI/P2PDMA: Factor out host_bridge_whitelist()
  PCI/P2PDMA: Apply host bridge whitelist for ACS
  PCI/P2PDMA: Factor out __upstream_bridge_distance()
  PCI/P2PDMA: Add constants for map type results to upstream_bridge_distance()
  PCI/P2PDMA: Add provider's pci_dev to pci_p2pdma_pagemap struct
  PCI/P2PDMA: Introduce private pagemap structure
2019-09-23 16:10:12 -05:00
Bjorn Helgaas 3ddbff3676 Merge branch 'pci/msi'
- Enable PCI_MSI_IRQ_DOMAIN support for RISC-V (Wesley Terpstra)

* pci/msi:
  PCI/MSI: Enable PCI_MSI_IRQ_DOMAIN support for RISC-V
2019-09-23 16:10:12 -05:00
Bjorn Helgaas 6ce54f0219 Merge branch 'pci/misc'
- Use devm_add_action_or_reset() helper (Fuqian Huang)

  - Mark expected switch fall-through (Gustavo A. R. Silva)

  - Convert sysfs device attributes from __ATTR() to DEVICE_ATTR() (Kelsey
    Skunberg)

  - Convert sysfs file permissions from S_IRUSR etc to octal (Kelsey
    Skunberg)

  - Move SR-IOV sysfs functions to iov.c (Kelsey Skunberg)

  - Add pci_info_ratelimited() to ratelimit PCI messages separately
    (Krzysztof Wilczynski)

  - Fix "'static' not at beginning of declaration" warnings (Krzysztof
    Wilczynski)

  - Clean up resource_alignment parameter to not require static buffer
    (Logan Gunthorpe)

  - Add ACS quirk for iProc PAXB (Abhinav Ratna)

  - Add pci_irq_vector() and other stubs for !CONFIG_PCI (Herbert Xu)

* pci/misc:
  PCI: Add pci_irq_vector() and other stubs when !CONFIG_PCI
  PCI: Add ACS quirk for iProc PAXB
  PCI: Force trailing new line to resource_alignment_param in sysfs
  PCI: Move pci_[get|set]_resource_alignment_param() into their callers
  PCI: Clean up resource_alignment parameter to not require static buffer
  PCI: Use static const struct, not const static struct
  PCI: Add pci_info_ratelimited() to ratelimit PCI separately
  PCI/IOV: Remove group write permission from sriov_numvfs, sriov_drivers_autoprobe
  PCI/IOV: Move sysfs SR-IOV functions to iov.c
  PCI: sysfs: Change permissions from symbolic to octal
  PCI: sysfs: Change DEVICE_ATTR() to DEVICE_ATTR_WO()
  PCI: sysfs: Define device attributes with DEVICE_ATTR*()
  PCI: Mark expected switch fall-through
  PCI: Use devm_add_action_or_reset()
2019-09-23 16:10:10 -05:00
Bjorn Helgaas a10a1f60c7 Merge branch 'pci/enumeration'
- Consolidate _HPP & _HPX code in pci-acpi.h and remove unnecessary
    struct hotplug_program_ops (Krzysztof Wilczynski)

  - Fixup PCIe device types to remove the need for dev->has_secondary_link
    (Mika Westerberg)

* pci/enumeration:
  PCI: Get rid of dev->has_secondary_link flag
  PCI: Make pcie_downstream_port() available outside of access.c
  PCI/ACPI: Remove unnecessary struct hotplug_program_ops
  PCI/ACPI: Move _HPP & _HPX functions to pci-acpi.c
  PCI/ACPI: Rename _HPX structs from hpp_* to hpx_*
2019-09-23 16:10:08 -05:00
Bjorn Helgaas 77dc51fd55 Merge branch 'pci/encapsulate'
- Move many symbols from public linux/pci.h to subsystem-private
    drivers/pci/pci.h (Kelsey Skunberg)

  - Unexport pci_bus_get() and pci_bus_sem since they're not needed by
    modules (Kelsey Skunberg)

  - Remove unused pci_block_cfg_access() et al (Kelsey Skunberg)

* pci/encapsulate:
  PCI: Make pci_set_of_node(), etc private
  PCI: Make pci_enable_ptm() private
  PCI: Make pcie_set_ecrc_checking(), pcie_ecrc_get_policy() private
  PCI: Make pci_ats_init() private
  PCI: Make pcie_update_link_speed() private
  PCI: Make pci_bus_get(), pci_bus_put() private
  PCI: Make pci_hotplug_io_size, mem_size, and bus_size private
  PCI: Make pci_save_vc_state(), pci_restore_vc_state(), etc private
  PCI: Make pci_get_host_bridge_device(), pci_put_host_bridge_device() private
  PCI: Make pci_check_pme_status(), pci_pme_wakeup_bus() private
  PCI: Make PCI_PM_* delay times private
  PCI: Unexport pci_bus_sem
  PCI: Unexport pci_bus_get() and pci_bus_put()
  PCI: Remove pci_block_cfg_access() et al (unused)
2019-09-23 16:10:07 -05:00
Bjorn Helgaas 20d3618b25 Merge branch 'pci/aspm'
- Consolidate ASPM interfaces in linux/pci.h (Krzysztof Wilczynski)

* pci/aspm:
  PCI: Move ASPM declarations to linux/pci.h
2019-09-23 16:10:06 -05:00
Herbert Xu 0d8006ddbe PCI: Add pci_irq_vector() and other stubs when !CONFIG_PCI
Add stub functions pci_alloc_irq_vectors_affinity() and pci_irq_vector()
when CONFIG_PCI is off so drivers can use them without resorting to ifdefs.

Also move the PCI_IRQ_* macros outside of the ifdefs so they are always
available.

Fixes: 625f269a5a ("crypto: inside-secure - add support for PCI based FPGA development board")
Link: https://lore.kernel.org/r/20190904122600.GA28660@gondor.apana.org.au
Reported-by: kbuild test robot <lkp@intel.com>
Reported-by: YueHaibing <yuehaibing@huawei.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2019-09-21 09:51:55 -05:00
Jonathan Chocron 0b24134f78 PCI: dwc: Add validation that PCIe core is set to correct mode
Some PCIe controllers can be set to either Host or EP according to some
early boot FW. To make sure there is no discrepancy (e.g. FW configured
the port to EP mode while the DT specifies it as a host bridge or vice
versa), a check has been added for each mode.

Signed-off-by: Jonathan Chocron <jonnyc@amazon.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Andrew Murray <andrew.murray@arm.com>
Acked-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
2019-09-16 14:17:15 +01:00
Jonathan Chocron a8daea9475 PCI: dwc: al: Add Amazon Annapurna Labs PCIe controller driver
This driver is DT based and utilizes the DesignWare APIs.

It allows using a smaller ECAM range for a larger bus range -
usually an entire bus uses 1MB of address space, but the driver
can use it for a larger number of buses. This is achieved by using a HW
mechanism which allows changing the BUS part of the "final" outgoing
config transaction. There are 2 HW regs, one which is basically a
bitmask determining which bits to take from the AXI transaction itself
and another which holds the complementary part programmed by the
driver.

All link initializations are handled by the boot FW.

Signed-off-by: Jonathan Chocron <jonnyc@amazon.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
Reviewed-by: Andrew Murray <andrew.murray@arm.com>
2019-09-16 14:16:44 +01:00
Jonathan Chocron ed4381da34 dt-bindings: PCI: Add Amazon's Annapurna Labs PCIe host bridge binding
Document Amazon's Annapurna Labs PCIe host bridge.

Signed-off-by: Jonathan Chocron <jonnyc@amazon.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Andrew Murray <andrew.murray@arm.com>
Reviewed-by: Rob Herring <robh@kernel.org>
2019-09-16 14:16:38 +01:00
Jonathan Chocron 738cb37b01 PCI: Add quirk to disable MSI-X support for Amazon's Annapurna Labs Root Port
The Root Port (identified by [1c36:0031]) doesn't support MSI-X. On some
platforms it is configured to not advertise the capability at all, while
on others it (mistakenly) does. This causes a panic during
initialization by the pcieport driver, since it tries to configure the
MSI-X capability. Specifically, when trying to access the MSI-X table
a "non-existing addr" exception occurs.

Example stacktrace snippet:

  SError Interrupt on CPU2, code 0xbf000000 -- SError
  CPU: 2 PID: 1 Comm: swapper/0 Not tainted 5.2.0-rc1-Jonny-14847-ge76f1d4a1828-dirty #33
  Hardware name: Annapurna Labs Alpine V3 EVP (DT)
  pstate: 80000005 (Nzcv daif -PAN -UAO)
  pc : __pci_enable_msix_range+0x4e4/0x608
  lr : __pci_enable_msix_range+0x498/0x608
  sp : ffffff80117db700
  x29: ffffff80117db700 x28: 0000000000000001
  x27: 0000000000000001 x26: 0000000000000000
  x25: ffffffd3e9d8c0b0 x24: 0000000000000000
  x23: 0000000000000000 x22: 0000000000000000
  x21: 0000000000000001 x20: 0000000000000000
  x19: ffffffd3e9d8c000 x18: ffffffffffffffff
  x17: 0000000000000000 x16: 0000000000000000
  x15: ffffff80116496c8 x14: ffffffd3e9844503
  x13: ffffffd3e9844502 x12: 0000000000000038
  x11: ffffffffffffff00 x10: 0000000000000040
  x9 : ffffff801165e270 x8 : ffffff801165e268
  x7 : 0000000000000002 x6 : 00000000000000b2
  x5 : ffffffd3e9d8c2c0 x4 : 0000000000000000
  x3 : 0000000000000000 x2 : 0000000000000000
  x1 : 0000000000000000 x0 : ffffffd3e9844680
  Kernel panic - not syncing: Asynchronous SError Interrupt
  CPU: 2 PID: 1 Comm: swapper/0 Not tainted 5.2.0-rc1-Jonny-14847-ge76f1d4a1828-dirty #33
  Hardware name: Annapurna Labs Alpine V3 EVP (DT)
  Call trace:
   dump_backtrace+0x0/0x140
   show_stack+0x14/0x20
   dump_stack+0xa8/0xcc
   panic+0x140/0x334
   nmi_panic+0x6c/0x70
   arm64_serror_panic+0x74/0x88
   __pte_error+0x0/0x28
   el1_error+0x84/0xf8
   __pci_enable_msix_range+0x4e4/0x608
   pci_alloc_irq_vectors_affinity+0xdc/0x150
   pcie_port_device_register+0x2b8/0x4e0
   pcie_portdrv_probe+0x34/0xf0

Notice that this quirk also disables MSI (which may work, but hasn't
been tested nor has a current use case), since currently there is no
standard way to disable only MSI-X.

Signed-off-by: Jonathan Chocron <jonnyc@amazon.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
Reviewed-by: Andrew Murray <andrew.murray@arm.com>
2019-09-16 14:14:43 +01:00
Jonathan Chocron a638b5de20 PCI/VPD: Prevent VPD access for Amazon's Annapurna Labs Root Port
The Amazon Annapurna Labs PCIe Root Port exposes the VPD capability,
but there is no actual support for it.

Trying to access the VPD (for example, as part of lspci -vv or when
reading the vpd sysfs file), results in the following warning print:

  pcieport 0001:00:00.0: VPD access failed.  This is likely a firmware bug on this device.  Contact the card vendor for a firmware update

Signed-off-by: Jonathan Chocron <jonnyc@amazon.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
Reviewed-by: Andrew Murray <andrew.murray@arm.com>
Acked-by: Bjorn Helgaas <bhelgaas@google.com>
2019-09-16 14:10:09 +01:00
Ali Saidi 76e67e9e0f PCI: Add ACS quirk for Amazon Annapurna Labs root ports
The Amazon's Annapurna Labs root ports don't advertise an ACS
capability, but they don't allow peer-to-peer transactions and do
validate bus numbers through the SMMU. Additionally, it's not possible
for one RP to pass traffic to another RP.

Signed-off-by: Ali Saidi <alisaidi@amazon.com>
Signed-off-by: Jonathan Chocron <jonnyc@amazon.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
Reviewed-by: Andrew Murray <andrew.murray@arm.com>
Acked-by: Bjorn Helgaas <bhelgaas@google.com>
2019-09-16 14:10:04 +01:00
Jonathan Chocron 4a36a60c34 PCI: Add Amazon's Annapurna Labs vendor ID
Add Amazon's Annapurna Labs vendor ID to pci_ids.h.

Signed-off-by: Jonathan Chocron <jonnyc@amazon.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Andrew Murray <andrew.murray@arm.com>
Acked-by: Bjorn Helgaas <bhelgaas@google.com>
2019-09-16 14:10:00 +01:00
Lorenzo Pieralisi 716c6a228e MAINTAINERS: Add PCI native host/endpoint controllers designated reviewer
Add Andrew Murray as designated reviewer for PCI native host
and endpoint controller drivers.

Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Andrew Murray <andrew.murray@arm.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
2019-09-13 12:33:07 +01:00
Haiyang Zhang f73f8a504e PCI: hv: Use bytes 4 and 5 from instance ID as the PCI domain numbers
As recommended by Azure host team, the bytes 4, 5 have more uniqueness
(info entropy) than bytes 8, 9 so use them as the PCI domain numbers.

On older hosts, bytes 4, 5 can also be used -- no backward compatibility
issues are introduced and the chance of collision is greatly reduced.

In the rare cases of collision, the driver code detects and finds
another number that is not in use.

Suggested-by: Michael Kelley <mikelley@microsoft.com>
Signed-off-by: Haiyang Zhang <haiyangz@microsoft.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Sasha Levin <sashal@kernel.org>
2019-09-10 12:14:08 +01:00
Mika Westerberg ca78410403 PCI: Get rid of dev->has_secondary_link flag
In some systems, the Device/Port Type in the PCI Express Capabilities
register incorrectly identifies upstream ports as downstream ports.

d0751b98df ("PCI: Add dev->has_secondary_link to track downstream PCIe
links") addressed this by adding pci_dev.has_secondary_link, which is set
for downstream ports.  But this is confusing because pci_pcie_type()
sometimes gives the wrong answer, and it's not obvious that we should use
pci_dev.has_secondary_link instead.

Reduce the confusion by correcting the type of the port itself so that
pci_pcie_type() returns the actual type regardless of what the Device/Port
Type register claims it is.  Update the users to call pci_pcie_type() and
pcie_downstream_port() accordingly, and remove pci_dev.has_secondary_link
completely.

Link: https://lore.kernel.org/linux-pci/20190703133953.GK128603@google.com/
Suggested-by: Bjorn Helgaas <bhelgaas@google.com>
Link: https://lore.kernel.org/r/20190822085553.62697-2-mika.westerberg@linux.intel.com
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2019-09-07 07:45:31 -05:00
Mika Westerberg 984998e340 PCI: Make pcie_downstream_port() available outside of access.c
pcie_downstream_port() is useful in other places where code needs to
determine whether the PCIe port is downstream so make it available outside
of access.c.

Link: https://lore.kernel.org/r/20190822085553.62697-1-mika.westerberg@linux.intel.com
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2019-09-07 07:45:25 -05:00
Abhinav Ratna 46b2c32df7 PCI: Add ACS quirk for iProc PAXB
iProc PAXB Root Ports don't advertise an ACS capability, but they do not
allow peer-to-peer transactions between Root Ports.  Add an ACS quirk so
each Root Port can be in a separate IOMMU group.

[bhelgaas: commit log, comment, use common implementation style]
Link: https://lore.kernel.org/r/1566275985-25670-1-git-send-email-srinath.mannam@broadcom.com
Signed-off-by: Abhinav Ratna <abhinav.ratna@broadcom.com>
Signed-off-by: Srinath Mannam <srinath.mannam@broadcom.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Scott Branden <scott.branden@broadcom.com>
2019-09-05 17:22:53 -05:00
Logan Gunthorpe e499081da1 PCI: Force trailing new line to resource_alignment_param in sysfs
When 'pci=resource_alignment=' is specified on the command line, there is
no trailing new line.  Then, when it's read through the corresponding sysfs
attribute, there will be no newline and a cat command will not show
correctly in a shell. If the parameter is set through sysfs a new line will
be stored and it will 'cat' correctly.

To solve this, append a new line character in the show function if one does
not already exist.

Link: https://lore.kernel.org/r/20190822161013.5481-4-logang@deltatee.com
Signed-off-by: Logan Gunthorpe <logang@deltatee.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2019-09-05 16:47:30 -05:00
Logan Gunthorpe 273b177cac PCI: Move pci_[get|set]_resource_alignment_param() into their callers
Both the functions pci_get_resource_alignment_param() and
pci_set_resource_alignment_param() are now only called in one place:
resource_alignment_show() and resource_alignment_store() respectively.

There is no value in this extra set of functions so move both into their
callers respectively.

[bhelgaas: fold in "GFP_KERNEL while atomic" fix from Christoph Hellwig
<hch@infradead.org>
https://lore.kernel.org/r/20190902075006.GB754@infradead.org]
Link: https://lore.kernel.org/r/20190822161013.5481-3-logang@deltatee.com
Signed-off-by: Logan Gunthorpe <logang@deltatee.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2019-09-05 16:47:22 -05:00
Bjorn Helgaas 4a06c2c382 PCI: pciehp: Refer to "Indicators" instead of "LEDs" in comments
The PCIe spec doesn't mention "green LEDs" or "amber LEDs".  Replace those
terms with "Power Indicator" and "Attention Indicator" so the comments
match the spec language.  Comment changes only.

Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2019-09-05 15:52:24 -05:00
Denis Efremov 9194094be4 PCI: pciehp: Remove pciehp_green_led_{on,off,blink}()
Remove pciehp_green_led_{on,off,blink}() and use pciehp_set_indicators()
instead, since the code is mostly the same.

[bhelgaas: drop set_power_indicator() wrapper to reduce the number of
interfaces]
Link: https://lore.kernel.org/r/20190903111021.1559-5-efremov@linux.com
Signed-off-by: Denis Efremov <efremov@linux.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
2019-09-05 15:45:00 -05:00
Denis Efremov 106feb2fdc PCI: pciehp: Remove pciehp_set_attention_status()
Remove pciehp_set_attention_status() and use pciehp_set_indicators()
instead, since the code is mostly the same.

Link: https://lore.kernel.org/r/20190903111021.1559-4-efremov@linux.com
Signed-off-by: Denis Efremov <efremov@linux.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
2019-09-05 15:44:08 -05:00
Denis Efremov 94719ba090 PCI: pciehp: Combine adjacent indicator updates
Combine adjacent updates of power and attention indicators into a single
pciehp_set_indicators() call.  This sends one command to the hotplug
controller instead of two.

Link: https://lore.kernel.org/r/20190903111021.1559-3-efremov@linux.com
Signed-off-by: Denis Efremov <efremov@linux.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
Reviewed-by: Lukas Wunner <lukas@wunner.de>
2019-09-05 15:43:33 -05:00
Denis Efremov 688033f52d PCI: pciehp: Add pciehp_set_indicators() to set both indicators
Add pciehp_set_indicators() to set power and attention indicators with a
single register write.

This is a minor optimization because we frequently set both indicators and
this can do it with a single command.  It also reduces the number of
interfaces related to the indicators and makes them more discoverable
because callers use the PCI_EXP_SLTCTL_ATTN_IND_* and
PCI_EXP_SLTCTL_PWR_IND_* definitions directly.

[bhelgaas: extend commit log, s/PCI_EXP_SLTCTL_.*_IND_NONE/INDICATOR_NOOP/
so they don't look like things defined by the spec, add function doc, mask
commands to make it obvious we only send valid commands
(pcie_do_write_cmd() does mask it, but requires more effort to verify)]
Link: https://lore.kernel.org/r/20190903111021.1559-2-efremov@linux.com
Signed-off-by: Denis Efremov <efremov@linux.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2019-09-05 15:39:36 -05:00
Logan Gunthorpe 70aaf61a9b PCI: Clean up resource_alignment parameter to not require static buffer
Clean up the 'resource_alignment' parameter code to use kstrdup() in the
initcall routine instead of a static buffer that wastes memory regardless
of whether the feature is used.  This allows us to drop 'COMMAND_LINE_SIZE'
bytes (typically 256-4096 depending on architecture) of static data.

This is similar to what has been done for the 'disable_acs_redir'
parameter.

Link: https://lore.kernel.org/r/20190822161013.5481-2-logang@deltatee.com
Signed-off-by: Logan Gunthorpe <logang@deltatee.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2019-09-05 13:26:46 -05:00
Krzysztof Wilczynski 8050f3f664 PCI: Use static const struct, not const static struct
Move the static keyword to the front of declarations of pci_regs_behavior[]
and pcie_cap_regs_behavior[], which resolves compiler warnings when
building with "W=1":

  drivers/pci/pci-bridge-emul.c:41:1: warning: ‘static’ is not at beginning of
  declaration [-Wold-style-declaration]
   const static struct pci_bridge_reg_behavior pci_regs_behavior[] = {
   ^
  drivers/pci/pci-bridge-emul.c:176:1: warning: ‘static’ is not at beginning of
  declaration [-Wold-style-declaration]
   const static struct pci_bridge_reg_behavior pcie_cap_regs_behavior[] = {
   ^

Link: https://lore.kernel.org/r/20190826151436.4672-1-kw@linux.com
Link: https://lore.kernel.org/r/20190828131733.5817-1-kw@linux.com
Signed-off-by: Krzysztof Wilczynski <kw@linux.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
2019-09-05 13:26:46 -05:00
Krzysztof Wilczynski 7f1c62c443 PCI: Add pci_info_ratelimited() to ratelimit PCI separately
Do not use printk_ratelimit() in drivers/pci/pci.c as it shares the rate
limiting state with all other callers to the printk_ratelimit().

Add pci_info_ratelimited() (similar to pci_notice_ratelimited() added in
the commit a88a7b3eb0 ("vfio: Use dev_printk() when possible")) and use
it instead of printk_ratelimit() + pci_info().

Link: https://lore.kernel.org/r/20190825224616.8021-1-kw@linux.com
Signed-off-by: Krzysztof Wilczynski <kw@linux.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2019-09-05 13:26:46 -05:00
Kelsey Skunberg 244c06c3b6 PCI/IOV: Remove group write permission from sriov_numvfs, sriov_drivers_autoprobe
Previously the sriov_numvfs and sriov_drivers_autoprobe sysfs files had
0664 permissions, which allowed group write.  libvirt runs as root when
dealing with PCI, and it chowns files needed by qemu, so group write
permission should not be needed.

Change these permissions from 0664 to 0644, which is what DEVICE_ATTR_RW()
does by default.

[bhelgaas: commit log]
Link: https://lore.kernel.org/r/20190905063226.43269-1-skunberg.kelsey@gmail.com
Link: https://lore.kernel.org/r/850cf536-0b72-d78c-efaf-855dcb391087@redhat.com
Signed-off-by: Kelsey Skunberg <skunberg.kelsey@gmail.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Acked-by: Donald Dutile <ddutile@redhat.com>
2019-09-05 13:26:23 -05:00
Thierry Reding c1e33666c9 PCI: iproc: Propagate errors for optional PHYs
devm_phy_get() can fail for a number of reasons besides probe deferral.
It can for example return -ENOMEM if it runs out of memory as it tries
to allocate devres structures. Propagating only -EPROBE_DEFER is
problematic because it results in these legitimately fatal errors being
treated as "PHY not specified in DT".

What we really want is to ignore the optional PHYs only if they have not
been specified in DT. devm_phy_optional_get() is a function that exactly
does what's required here, so use that instead.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Andrew Murray <andrew.murray@arm.com>
Cc: Ray Jui <rjui@broadcom.com>
Cc: Scott Branden <sbranden@broadcom.com>
Cc: bcm-kernel-feedback-list@broadcom.com
2019-09-04 15:44:05 +01:00
Thierry Reding 8f9e1641ba PCI: histb: Propagate errors for optional regulators
regulator_get_optional() can fail for a number of reasons besides probe
deferral. It can for example return -ENOMEM if it runs out of memory as
it tries to allocate data structures. Propagating only -EPROBE_DEFER is
problematic because it results in these legitimately fatal errors being
treated as "regulator not specified in DT".

What we really want is to ignore the optional regulators only if they
have not been specified in DT. regulator_get_optional() returns -ENODEV
in this case, so that's the special case that we need to handle. So we
propagate all errors, except -ENODEV, so that real failures will still
cause the driver to fail probe.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Andrew Murray <andrew.murray@arm.com>
Cc: Shawn Guo <shawn.guo@linaro.org>
2019-09-04 15:43:09 +01:00
Thierry Reding e7a877b2fa PCI: armada8x: Propagate errors for optional PHYs
devm_of_phy_get_by_index() can fail for a number of reasons besides
probe deferral. It can for example return -ENOMEM if it runs out of
memory as it tries to allocate devres structures. Propagating only
-EPROBE_DEFER is problematic because it results in these legitimately
fatal errors being treated as "PHY not specified in DT".

What we really want is to ignore the optional PHYs only if they have not
been specified in DT. devm_of_phy_get_by_index() returns -ENODEV in this
case, so that's the special case that we need to handle. So we propagate
all errors, except -ENODEV, so that real failures will still cause the
driver to fail probe.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Andrew Murray <andrew.murray@arm.com>
Cc: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
2019-09-04 15:42:38 +01:00
Thierry Reding 2170a09fb4 PCI: imx6: Propagate errors for optional regulators
regulator_get_optional() can fail for a number of reasons besides probe
deferral. It can for example return -ENOMEM if it runs out of memory as
it tries to allocate data structures. Propagating only -EPROBE_DEFER is
problematic because it results in these legitimately fatal errors being
treated as "regulator not specified in DT".

What we really want is to ignore the optional regulators only if they
have not been specified in DT. regulator_get_optional() returns -ENODEV
in this case, so that's the special case that we need to handle. So we
propagate all errors, except -ENODEV, so that real failures will still
cause the driver to fail probe.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Andrew Murray <andrew.murray@arm.com>
Cc: Richard Zhu <hongxing.zhu@nxp.com>
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: kernel@pengutronix.de
Cc: linux-imx@nxp.com
2019-09-04 15:40:24 +01:00
Thierry Reding ddd6960087 PCI: exynos: Propagate errors for optional PHYs
devm_of_phy_get() can fail for a number of reasons besides probe
deferral. It can for example return -ENOMEM if it runs out of memory as
it tries to allocate devres structures. Propagating only -EPROBE_DEFER
is problematic because it results in these legitimately fatal errors
being treated as "PHY not specified in DT".

What we really want is to ignore the optional PHYs only if they have not
been specified in DT. devm_of_phy_get() returns -ENODEV in this case, so
that's the special case that we need to handle. So we propagate all
errors, except -ENODEV, so that real failures will still cause the
driver to fail probe.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Andrew Murray <andrew.murray@arm.com>
Cc: Jingoo Han <jingoohan1@gmail.com>
Cc: Kukjin Kim <kgene@kernel.org>
Cc: Krzysztof Kozlowski <krzk@kernel.org>
2019-09-04 15:39:41 +01:00
Thierry Reding 0e3ff0ac5f PCI: rockchip: Propagate errors for optional regulators
regulator_get_optional() can fail for a number of reasons besides probe
deferral. It can for example return -ENOMEM if it runs out of memory as
it tries to allocate data structures. Propagating only -EPROBE_DEFER is
problematic because it results in these legitimately fatal errors being
treated as "regulator not specified in DT".

What we really want is to ignore the optional regulators only if they
have not been specified in DT. regulator_get_optional() returns -ENODEV
in this case, so that's the special case that we need to handle. So we
propagate all errors, except -ENODEV, so that real failures will still
cause the driver to fail probe.

Tested-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Andrew Murray <andrew.murray@arm.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Shawn Lin <shawn.lin@rock-chips.com>
Cc: Shawn Lin <shawn.lin@rock-chips.com>
Cc: Heiko Stuebner <heiko@sntech.de>
Cc: linux-rockchip@lists.infradead.org
2019-09-04 15:37:47 +01:00
Krzysztof Wilczynski 4a2dbeddd3 PCI/ACPI: Remove unnecessary struct hotplug_program_ops
Move the ACPI-specific structs hpx_type0, hpx_type1, hpx_type2 and
hpx_type3 to drivers/pci/pci-acpi.c as they are not used anywhere else.
Then remove the struct hotplug_program_ops that has been shared between
drivers/pci/probe.c and drivers/pci/pci-acpi.c from drivers/pci/pci.h as it
is no longer needed.

The struct hotplug_program_ops was added by 87fcf12e84 ("PCI/ACPI: Remove
the need for 'struct hotplug_params'") and replaced previously used struct
hotplug_params enabling the support for the _HPX Type 3 Setting Record that
was added by f873c51a15 ("PCI/ACPI: Implement _HPX Type 3 Setting
Record").

The new struct allowed for the static functions such program_hpx_type0(),
program_hpx_type1(), etc., from the drivers/pci/probe.c to be called from
the function pci_acpi_program_hp_params() in the drivers/pci/pci-acpi.c.

Previously a programming of _HPX Type 0 was as follows:

  drivers/pci/probe.c:

    program_hpx_type0()
    ...
    pci_configure_device()
      hp_ops = {
        .program_type0 = program_hpx_type0,
        ...
      }
      pci_acpi_program_hp_params(&hp_ops)

  drivers/pci/pci-acpi.c:

    pci_acpi_program_hp_params(&hp_ops)
      acpi_run_hpx(hp_ops)
        decode_type0_hpx_record()
          hp_ops->program_type0     # program_hpx_type0() called via hp_ops

After the ACPI-specific functions, structs, enums, etc., have been moved to
drivers/pci/pci-acpi.c there is no need for the hotplug_program_ops as all
of the _HPX Type 0, 1, 2 and 3 are directly accessible.

Link: https://lore.kernel.org/r/20190827094951.10613-4-kw@linux.com
Signed-off-by: Krzysztof Wilczynski <kw@linux.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2019-08-28 15:29:14 -05:00
Krzysztof Wilczynski 8c3aac6e1b PCI/ACPI: Move _HPP & _HPX functions to pci-acpi.c
Move program_hpx_type0(), program_hpx_type1(), etc., and enums
hpx_type3_dev_type, hpx_type3_fn_type and hpx_type3_cfg_loc to
drivers/pci/pci-acpi.c as these functions and enums are ACPI-specific.

Move structs hpx_type0, hpx_type1, hpx_type2 and hpx_type3 to
drivers/pci/pci.h as these are shared between drivers/pci/pci-acpi.c and
drivers/pci/probe.c.

Link: https://lore.kernel.org/r/20190827094951.10613-3-kw@linux.com
Signed-off-by: Krzysztof Wilczynski <kw@linux.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2019-08-28 15:25:53 -05:00
Krzysztof Wilczynski e2797ad31f PCI/ACPI: Rename _HPX structs from hpp_* to hpx_*
The names of the hpp_type0, hpp_type1 and hpp_type2 structs suggest that
they're related to _HPP, when in fact they're related to _HPX.

The struct hpp_type0 denotes an _HPX Type 0 setting record that supersedes
the _HPP setting record, and it has been used interchangeably for _HPP as
per the ACPI specification (see version 6.3, section 6.2.9.1) which states
that it should be applied to PCI, PCI-X and PCI Express devices, with
settings being ignored if they are not applicable.

Rename them to hpx_type0, hpx_type1 and hpx_type2 to reflect their relation
to _HPX rather than _HPP.

Link: https://lore.kernel.org/r/20190827094951.10613-2-kw@linux.com
Signed-off-by: Krzysztof Wilczynski <kw@linux.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2019-08-28 15:09:45 -05:00
Krzysztof Wilczynski 7ce2e76a04 PCI: Move ASPM declarations to linux/pci.h
Move ASPM definitions and function prototypes from include/linux/pci-aspm.h
to include/linux/pci.h so users only need to include <linux/pci.h>:

  PCIE_LINK_STATE_L0S
  PCIE_LINK_STATE_L1
  PCIE_LINK_STATE_CLKPM
  pci_disable_link_state()
  pci_disable_link_state_locked()
  pcie_no_aspm()

No functional changes intended.

Link: https://lore.kernel.org/r/20190827095620.11213-1-kw@linux.com
Signed-off-by: Krzysztof Wilczynski <kw@linux.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2019-08-28 08:28:39 -05:00
Hou Zhiqiang 4035ff36a6 arm64: dts: fsl: Remove num-lanes property from PCIe nodes
Remove the num-lanes property to avoid the driver setting the
link width.

On FSL Layerscape SoCs, the number of lanes assigned to PCIe
controller is not fixed, it is determined by the selected SerDes
protocol in the RCW (Reset Configuration Word).

The PCIe link training is completed automatically through the selected
SerDes protocol - the link width set-up is updated by hardware after
power on reset, so the num-lanes property is not needed for Layerscape
PCIe.

The current num-lanes property was added erroneously, which actually
indicates the maximum lanes the PCIe controller can support up to,
instead of the lanes assigned to the PCIe controller. The link width set
by SerDes protocol will be overridden by the num-lanes property, hence
the subsequent re-training will fail when the assigned lanes do not
match the value in the num-lanes property.

Remove the property to fix the issue

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Andrew Murray <andrew.murray@arm.com>
2019-08-22 18:25:55 +01:00