* Global
- Use interrupt macros
- Use #include in device tree sources
- Tidyup DT node naming
* emev2 (Emma Mobile EV2) SoC
- Setup internal peripheral interrupts as level high
- Use interrupt macros in DT files
- Add clock tree description in DT
* r8a7791 (R-Car M2) SoC
- Correct GPIO resources
* r8a7791 (R-Car M2) based Koelsch board
- Configure PFC and GPO
- Use r8a7791 suffix for IRQC compat string
- Add DT reference
* r8a7790 (R-Car H2) based Lager board
- Include all 4 GiB of memory
- Use r8a7790 suffix for IRQC and MMCIF compat strings
- Enable MMCIF
- Add default PFC settings
* r8a7778 (R-Car M1) SoC
- Suffix for INTC compat string
- Add HSPI, MMCIF, SDHI and I2C suppport on DTSI
- Correct pin control device addresses
* r8a7778 (R-Car M1) based Bock-W board
- Use falling edge IRQ for LAN9221 in DT reference
- Enable I2C, HSPI0, MMCIF and SDHI
- Correct MMC pin conflict
- Remove manual PFC settings from DT reference
- Add default PFC settings
* r8a7779 (R-Car H1) SoC
- Add HSPI and SDHI support
- Suffix for INTC compat string
* r8a7779 (R-Car H1) based Marzen board
- Enable HSPI0 and SDHI in DTS
- Remove SDHI0 WP pin setting
- Use falling edge IRQ for LAN9221 in DT reference
- Add SDHI support
* r8a7740 (R-Mobile A1) SoC
- Suffix for INTC compat string
- Add FSI support via DTSI
- Use interrupt macros
* r8a7740 based Armadillo board
- Add FSI support for DTS
- Use low level IRQ for ST1231 in DT reference
* r8a73a4 (SH-Mobile APE6) SoC
- Use interrupt macros in DT files
* r8a73a4 (R-Mobile APE6) based ape6evm board
- Include all 2 GiB of memory
* r8a73a0 (SH-Mobile AG5) SoC
- Correct SDHI compat string
* r8a73a0 (SH-Mobile AG5) based kzm9d board
- Add GPIO keys and Add PCF8575 GPIO extender to DT
- Enable DSW2 with gpio-keys
- Use falling edge IRQ for LAN9221 in DT reference
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Merge tag 'renesas-dt-for-v3.14' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt
From Simon Horman:
Renesas ARM based SoC DT updates for v3.14
* Global
- Use interrupt macros
- Use #include in device tree sources
- Tidyup DT node naming
* emev2 (Emma Mobile EV2) SoC
- Setup internal peripheral interrupts as level high
- Use interrupt macros in DT files
- Add clock tree description in DT
* r8a7791 (R-Car M2) SoC
- Correct GPIO resources
* r8a7791 (R-Car M2) based Koelsch board
- Configure PFC and GPO
- Use r8a7791 suffix for IRQC compat string
- Add DT reference
* r8a7790 (R-Car H2) based Lager board
- Include all 4 GiB of memory
- Use r8a7790 suffix for IRQC and MMCIF compat strings
- Enable MMCIF
- Add default PFC settings
* r8a7778 (R-Car M1) SoC
- Suffix for INTC compat string
- Add HSPI, MMCIF, SDHI and I2C suppport on DTSI
- Correct pin control device addresses
* r8a7778 (R-Car M1) based Bock-W board
- Use falling edge IRQ for LAN9221 in DT reference
- Enable I2C, HSPI0, MMCIF and SDHI
- Correct MMC pin conflict
- Remove manual PFC settings from DT reference
- Add default PFC settings
* r8a7779 (R-Car H1) SoC
- Add HSPI and SDHI support
- Suffix for INTC compat string
* r8a7779 (R-Car H1) based Marzen board
- Enable HSPI0 and SDHI in DTS
- Remove SDHI0 WP pin setting
- Use falling edge IRQ for LAN9221 in DT reference
- Add SDHI support
* r8a7740 (R-Mobile A1) SoC
- Suffix for INTC compat string
- Add FSI support via DTSI
- Use interrupt macros
* r8a7740 based Armadillo board
- Add FSI support for DTS
- Use low level IRQ for ST1231 in DT reference
* r8a73a4 (SH-Mobile APE6) SoC
- Use interrupt macros in DT files
* r8a73a4 (R-Mobile APE6) based ape6evm board
- Include all 2 GiB of memory
* r8a73a0 (SH-Mobile AG5) SoC
- Correct SDHI compat string
* r8a73a0 (SH-Mobile AG5) based kzm9d board
- Add GPIO keys and Add PCF8575 GPIO extender to DT
- Enable DSW2 with gpio-keys
- Use falling edge IRQ for LAN9221 in DT reference
* tag 'renesas-dt-for-v3.14' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (102 commits)
ARM: shmobile: marzen: enable HSPI0 in DTS
ARM: shmobile: r8a7779: add HSPI support to DTSI
ARM: shmobile: Use r8a7779 suffix for INTC compat string
ARM: shmobile: Use r8a7778 suffix for INTC compat string
ARM: shmobile: Use r8a7740 suffix for INTC compat string
ARM: shmobile: Use sh73a0 suffix for INTC compat string
ARM: shmobile: armadillo: add FSI support for DTS
ARM: shmobile: r8a7740: add FSI support via DTSI
ARM: shmobile: emev2: Setup internal peripheral interrupts as level high
ARM: shmobile: emev2: Use interrupt macros in DT files
ARM: shmobile: Use interrupt macros in r8a73a4 and r8a7778 DT files
ARM: shmobile: Fix r8a7791 GPIO resources in DTS
ARM: shmobile: Include all 4 GiB of memory on Lager DT Ref
ARM: shmobile: Include all 4 GiB of memory on Lager
ARM: shmobile: Include all 2 GiB of memory on APE6EVM
ARM: shmobile: Include all 2 GiB of memory on APE6EVM DT Ref
ARM: shmobile: kzm9g-reference: Add GPIO keys to DT
ARM: shmobile: kzm9g-reference: Add PCF8575 GPIO extender to DT
ARM: shmobile: Koelsch DT reference GPIO LED support
ARM: shmobile: Enable DSW2 with gpio-keys on KZM9D
...
Signed-off-by: Kevin Hilman <khilman@linaro.org>
According to ePAPR spec,
this patch tidies up DT node name and related clock.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
SuperH lookups clock is using CLKDEV_CON/DEV/ICK_ID() macro
for a long term.
But in these days, the ICK clock is defined in random place.
This patch arranges it.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Currently all clkdev registration use "cpufreq-cpu0.0" as dev_id
for cpu clock which refers to virtual platform device. It needs to
be "cpu0" instead which is actual cpu0 device id.
This patch changes the dev_id from "cpufreq-cpu0.0" to "cpu0".
Reported-and-tested-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Cc: Shawn Guo <shawn.guo@linaro.org>
Cc: Magnus Damm <damm@opensource.se>
Signed-off-by: Sudeep KarkadaNagesha <sudeep.karkadanagesha@arm.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Instead of using the LED-specific TPU PWM driver, switch to the generic
TPU PWM driver with leds-pwm.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
According to the datasheet, it is not allowed to change div4 clock rates
if an earlier rate change operation is still in progress, as indicated by
a set kick bit.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
An earlier commit "ARM: shmobile: sh73a0: add support for adjusting CPU
frequency" intended to replace some clock operations only for the Z-clock,
instead it replaced them for all div4 clocks, since all div4 clocks share
the same copy of clock operations. Fix this by using a separate clock
operations structure for Z-clock.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
On SH73A0 the output of PLL0 is supplied to two dividers, feeding clock to
the CPU core and SGX. Lower CPU frequencies allow the use of lower supply
voltages and thus reduce power consumption.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Current clock-sh73a0 is using own implement
for each divX clocks.
This patch switches to use fixed ratio clock,
and was tesed on kzm9g board.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
DIV4_ZT* clocks are for debugging and trace bus clock.
It is not necessary to control it from Linux/Software.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add a TWD clock on sh73a0 for the smp_twd driver to properly update the
clock's frequency upon cpufreq events.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
To reconfigure clocks, controlled by FRQCRA and FRQCRB, a kick bit has to
be set and to make sure the setting has taken effect, it has to be read
back repeatedly until it is cleared by the hardware. This patch adds the
waiting part, that was missing until now.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Acked-by: Magnus Damm <damm@opensource.se
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Z and ZG clocks on sh73a0 have pll0 as their parent, not pll1.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This device also requires a voltage regulator which
should be defined in a board-specific maner. An example
dts snipped follows.
/ {
fixedregulator1v8: fixedregulator@0 {
compatible = "regulator-fixed";
regulator-name = "fixed-1.8V";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
};
&mmcif {
vmmc-supply = <&fixedregulator1v8>;
vqmmc-supply = <&fixedregulator1v8>;
};
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Allow a minimal setup of the sh73a0 SoC using a flattened device tree.
In particular, Configure the i2c controllers using a flattened device tree.
SCI serial controller and CMT clock source, whose drivers do not yet
support configuration using a flattened device tree, are still configured
using C code in order to allow booting of a board with this SoC.
*** Please note that the clock initialisation scheme used in
this patch does not currently work with SMP as there
is a yet to be resolved lock-up in workqueue initialisation.
CONFIG_SMP must be disabled when using this code. ***
Includes update from Thierry Reding to no longer use gic_handle_irq()
Cc: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
fix
div4_clks's bitmap of sh73a0 was wrong.
This patch is based on v2.0 datasheet.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
ARM is moving to stricter checks on readl/write functions,
so we need to use the correct types everywhere.
This patch is a bit ugly for shmobile, which is the only platform
that just uses integer literals all over the place, but I can't
see a better way to do this.
Acked-by: Simon Horman <horms@verge.net.au>
Cc: Magnus Damm <magnus.damm@gmail.com>
Cc: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: linux-sh@vger.kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* renesas-sh73a0:
ARM: shmobile: use common DMAEngine definitions on sh73a0
ARM: shmobile: sh73a0: add DMAEngine support for MPDMAC
ARM: shmobile: sh73a0: add USB clock support
sh_clk_mstp32_register is deprecated. This convert to sh_clk_mstp_register.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
Current shdmac can support MPDMAC (= sound DMA) on sh73a0.
This support reduce CPU load when sound was playback.
On v2.0 manual, MPDMAC MID/RID number were wrong.
This patch is using the number which seems correct.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
It is required from renesas_usbhs driver.
This patch is based on v2.0 manual.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
This patch is required from FSI sound driver
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Tested-by: Simon Horman <horms@verge.net.au>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
681e1b3eeb
(ARM: mach-shmobile: sh73a0 DMA Engine support for SY-DMAC)
adds SY-DMAC, but it is 218, not 318
This patch is based on v2.0 manual
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
Rename clk_init() to shmobile_clk_init() to avoid a potential
future name space collision with the common clock framework.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
* 'fbdev-next' of git://github.com/schandinat/linux-2.6: (175 commits)
module_param: make bool parameters really bool (drivers/video/i810)
Revert "atmel_lcdfb: Adjust HFP calculation so it matches the manual."
OMAPDSS: HDMI: Disable DDC internal pull up
OMAPDSS: HDMI: Move duplicate code from boardfile
OMAPDSS: add OrtusTech COM43H4M10XTC display support
OMAP: DSS2: Support for UMSH-8173MD TFT panel
ASoC: OMAP: HDMI: Move HDMI codec trigger function to generic HDMI driver
OMAPDSS: HDMI: Create function to enable HDMI audio
ASoC: OMAP: HDMI: Correct signature of ASoC functions
ASoC: OMAP: HDMI: Introduce driver data for audio codec
grvga: fix section mismatch warnings
video: s3c-fb: Don't keep device runtime active when open
video: s3c-fb: Hold runtime PM references when touching registers
video: s3c-fb: Take a runtime PM reference when unblanked
video: s3c-fb: Disable runtime PM in error paths from probe
video: s3c-fb: Use s3c_fb_enable() to enable the framebuffer
video: s3c-fb: Make runtime PM functional again
drivers/video: fsl-diu-fb: merge fsl_diu_alloc() into map_video_memory()
drivers/video: fsl-diu-fb: add default platform ops functions
drivers/video: fsl-diu-fb: remove broken reference count enabling the display
...
Current div6 clocks can specify their current parent clocks
from its register value if it is registered
by sh_clk_div6_reparent_register().
This patch modifies all div6 clocks into SH_CLK_DIV6_EXT().
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Keep the ZB clock enabled on sh73a0 to allow the BSC
to access external peripherals hooked up to CS signals.
This is needed to unbreak Ethernet support on sh73a0 boards
such as AG5EVM and Kota2 together with the following patch:
794d78f drivers: sh: late disabling of clocks V2
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch updates the Kota2 board support code to
use the recently merged TPU LED driver whenever
possible.
The sh73a0 SoC has 5 TPU hardware blocks each with
4 timer channels which in theory allows a total of
20 LEDs to be controlled by "leds-renesas-tpu"
driver instances. The Kota2 board has 4 LEDs connected
to GPIO pins that also come with TPU pin functions, so
this patch ties up these 4 LEDS and leaves the remaining
3 LEDS for the GPIO based LED driver.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
dsipck clock is controled by CLKDEV_ICK_ID() in clock-shxxx.
dsi0p_clk/dsi1p_clk naming is not needed.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>
Add SY-DMAC support via shdma.c to the sh73a0 SoC
including slave ids, platform data and clock bindings.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Add SDHI0 and SDHI1 support to the AG5EVM board
including platform data, pinmux configuration
and clock bindings.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Update the sh73a0 CPGA to support clocks for CEU
and MIPI-CSI. This includes MSTP bits for CSI and
CEU and div6 clkdev bindings for VCK1-3.
Fix the order of the MSTP32 entries in the clkdev
table while at it.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Add platform data for MIPI-DSI and LCDC on the AG5EVM
board. The sh73a0 clkdev bindings are also updated.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
PLL1 and PLL2 in the sh73a0 CPGA has a CFG bit that
must be taken into account to correctly calculate the
frequency.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Fix a typo for the sh73a0 CPGA code dealing with the IrDA
hardware block on the AG5EVM board.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Fix the M3 field offset for the FRQCRA register
in the sh73a0 CPGA. It should be 12, not 8.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
