56 lines
1.4 KiB
C
56 lines
1.4 KiB
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* Copyright 2015-2016 Freescale Semiconductor, Inc.
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* Copyright 2017-2018 NXP
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*/
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#ifndef __MACH_S32_CLK_H
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#define __MACH_S32_CLK_H
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#include <linux/spinlock.h>
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#include <linux/clk-provider.h>
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#define PNAME(x) \
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static const char *x[] __initconst
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void s32_check_clocks(struct clk *clks[], unsigned int count);
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struct clk *s32_obtain_fixed_clock(
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const char *name, unsigned long rate);
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static inline struct clk *s32_clk_fixed(const char *name, unsigned long rate)
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{
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return clk_register_fixed_rate(NULL, name, NULL, 0, rate);
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}
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static inline struct clk *s32_clk_divider(const char *name, const char *parent,
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void __iomem *reg, u8 shift, u8 width,
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spinlock_t *lock)
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{
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struct clk *tmp_clk = clk_register_divider(NULL, name, parent,
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CLK_SET_RATE_PARENT,
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reg, shift, width, 0, lock);
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return tmp_clk;
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}
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static inline struct clk *s32_clk_mux(const char *name, void __iomem *reg,
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u8 shift, u8 width, const char **parents,
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u8 num_parents, spinlock_t *lock)
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{
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return clk_register_mux(NULL, name, parents, num_parents,
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CLK_SET_RATE_NO_REPARENT, reg, shift,
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width, 0, lock);
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}
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static inline struct clk *s32_clk_fixed_factor(const char *name,
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const char *parent,
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unsigned int mult,
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unsigned int div)
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{
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return clk_register_fixed_factor(NULL, name, parent,
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CLK_SET_RATE_PARENT, mult, div);
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}
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#endif
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