Stefan-Gabriel Mirea 7392a4f58d LF-632 clk: s32v234: Fix "enetpll_dfs3" position in sdhc_sels ... According to the RM, MC_CGM_0_AC15_SC[SELCTL] needs to be 0b100 in order to select ENET PLL DFS 4 as the source for SDHC_CLK. Omitting such a position in the parents array will prevent clk_get_rate() (called from sdhci-esdhc-imx.c) from determining the frequency of ipg_clk_perclk. Fixes: fba4afe476 ("clk: s32v234: Initial enet clk support") Signed-off-by: Stefan-Gabriel Mirea <stefan-gabriel.mirea@nxp.com> Reviewed-by: Leonard Crestez <leonard.crestez@nxp.com> (cherry picked from commit 6f47d7ee76d533622f91533d80d7dc2e89583199)		2020-02-26 04:17:45 +08:00
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s32v234	LF-632 clk: s32v234: Fix "enetpll_dfs3" position in sdhc_sels	2020-02-26 04:17:45 +08:00
Kconfig	clk: Add clk support for S32V234	2019-11-25 16:28:53 +08:00
Makefile	clk: Add clk support for S32V234	2019-11-25 16:28:53 +08:00
clk-core.c	clk: Add clk support for S32V234	2019-11-25 16:28:53 +08:00
clk.h	clk: Add clk support for S32V234	2019-11-25 16:28:53 +08:00