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7 Commits (redonkable)

Author SHA1 Message Date
Stefan-Gabriel Mirea 7392a4f58d LF-632 clk: s32v234: Fix "enetpll_dfs3" position in sdhc_sels
According to the RM, MC_CGM_0_AC15_SC[SELCTL] needs to be 0b100 in order to
select ENET PLL DFS 4 as the source for SDHC_CLK. Omitting such a position
in the parents array will prevent clk_get_rate() (called from
sdhci-esdhc-imx.c) from determining the frequency of ipg_clk_perclk.

Fixes: fba4afe476 ("clk: s32v234: Initial enet clk support")
Signed-off-by: Stefan-Gabriel Mirea <stefan-gabriel.mirea@nxp.com>
Reviewed-by: Leonard Crestez <leonard.crestez@nxp.com>
(cherry picked from commit 6f47d7ee76d533622f91533d80d7dc2e89583199)
2020-02-26 04:17:45 +08:00
Chircu-Mare Bogdan-Petru 9ce8988c80 clk: s32v234: Enable FlexCAN clock
Enable the clocks needed for FlexCAN support on Treerunner.

Signed-off-by: Chircu-Mare Bogdan-Petru <Bogdan.Chircu@freescale.com>
Signed-off-by: Stoica Cosmin-Stefan <cosmin.stoica@nxp.com>
Signed-off-by: Larisa Grigore <Larisa.Grigore@nxp.com>
Signed-off-by: Stefan-Gabriel Mirea <stefan-gabriel.mirea@nxp.com>
Reviewed-by: Li Yang <leoyang.li@nxp.com>
Reviewed-by: Leonard Crestez <leonard.crestez@nxp.com>
2019-11-29 11:44:11 +02:00
Leonard Crestez fba4afe476 clk: s32v234: Initial enet clk support
Add ethernet clocks and dependencies (sys_pll, arm_pll)

Based on ALB v4.19.31_bsp23.0_rc2

Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
2019-11-25 16:28:55 +08:00
Leonard Crestez 318d69432b clk: s32v234: Add dfs clk
Port from ALB v4.19.31_bsp23.0_rc2

Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
2019-11-25 16:28:54 +08:00
Stoica Cosmin-Stefan 6cbe7edb1a clk: Enable SDHC clock for S32V234
Enable the clocks needed for uSDHC support on Treerunner.

Signed-off-by: Stoica Cosmin-Stefan <cosmin.stoica@nxp.com>
Signed-off-by: Larisa Grigore <Larisa.Grigore@nxp.com>
Signed-off-by: Stefan-Gabriel Mirea <stefan-gabriel.mirea@nxp.com>
2019-11-25 16:28:54 +08:00
Stoica Cosmin-Stefan 491a5c07c5 clk: Enable UART clock for S32V234
Enable the clocks needed for LINFlexD UART support on Treerunner and make
use of them in the LINFlexD driver.

Signed-off-by: Stoica Cosmin-Stefan <cosmin.stoica@nxp.com>
Signed-off-by: Adrian.Nitu <adrian.nitu@freescale.com>
Signed-off-by: Larisa Grigore <Larisa.Grigore@nxp.com>
Signed-off-by: Iustin Dumitrescu <Iustin.Dumitrescu@nxp.com>
Signed-off-by: Stefan-Gabriel Mirea <stefan-gabriel.mirea@nxp.com>
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
2019-11-25 16:28:53 +08:00
Stoica Cosmin-Stefan 457bcf4d5d clk: Add clk support for S32V234
Add clock framework for Treerunner (S32V234), based on code from the i.MX
3.10.17 codebase[1]. Add clock definitions that are used in the clocks
vector (tree). At this point, the only PLL enabled is PERIPH-PLL.

[1] https://source.codeaurora.org/external/imx/linux-imx/tree/?h=imx_3.10.17_1.0.0_ga_caf

Signed-off-by: Stoica Cosmin-Stefan <cosmin.stoica@nxp.com>
Signed-off-by: Larisa Grigore <Larisa.Grigore@nxp.com>
Signed-off-by: Stefan-Gabriel Mirea <stefan-gabriel.mirea@nxp.com>
2019-11-25 16:28:53 +08:00