7392a4f58d
According to the RM, MC_CGM_0_AC15_SC[SELCTL] needs to be 0b100 in order to
select ENET PLL DFS 4 as the source for SDHC_CLK. Omitting such a position
in the parents array will prevent clk_get_rate() (called from
sdhci-esdhc-imx.c) from determining the frequency of ipg_clk_perclk.
Fixes:
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.. | ||
Makefile | ||
clk-dfs.c | ||
clk-plldig.c | ||
clk.c | ||
clk.h | ||
dfs.h | ||
mc_cgm.h | ||
mc_me.h | ||
pll.h | ||
src.h |