![Rob Clark](/assets/img/avatar_default.png)
Add support for adreno 330. Not too much different, just a few differences in initial configuration plus setting OCMEM base. Userspace support is already in upstream mesa. Note that the existing DT code is simply using the bindings from downstream android kernel, to simplify porting of this driver to existing devices. These do not constitute any committed/stable DT ABI. The addition of proper DT bindings will be a subsequent patch, at which point (as best as possible) I will try to support either upstream bindings or what is found in downstream android kernel, so that existing device DT files can be used. Signed-off-by: Rob Clark <robdclark@gmail.com>
149 lines
3.5 KiB
C
149 lines
3.5 KiB
C
/*
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* Copyright (C) 2013 Red Hat
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* Author: Rob Clark <robdclark@gmail.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published by
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* the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include "msm_drv.h"
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#include "msm_mmu.h"
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struct msm_iommu {
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struct msm_mmu base;
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struct iommu_domain *domain;
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};
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#define to_msm_iommu(x) container_of(x, struct msm_iommu, base)
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static int msm_fault_handler(struct iommu_domain *iommu, struct device *dev,
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unsigned long iova, int flags, void *arg)
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{
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DBG("*** fault: iova=%08lx, flags=%d", iova, flags);
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return 0;
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}
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static int msm_iommu_attach(struct msm_mmu *mmu, const char **names, int cnt)
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{
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struct drm_device *dev = mmu->dev;
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struct msm_iommu *iommu = to_msm_iommu(mmu);
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int i, ret;
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for (i = 0; i < cnt; i++) {
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struct device *msm_iommu_get_ctx(const char *ctx_name);
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struct device *ctx = msm_iommu_get_ctx(names[i]);
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if (IS_ERR_OR_NULL(ctx))
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continue;
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ret = iommu_attach_device(iommu->domain, ctx);
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if (ret) {
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dev_warn(dev->dev, "could not attach iommu to %s", names[i]);
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return ret;
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}
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}
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return 0;
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}
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static int msm_iommu_map(struct msm_mmu *mmu, uint32_t iova,
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struct sg_table *sgt, unsigned len, int prot)
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{
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struct msm_iommu *iommu = to_msm_iommu(mmu);
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struct iommu_domain *domain = iommu->domain;
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struct scatterlist *sg;
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unsigned int da = iova;
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unsigned int i, j;
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int ret;
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if (!domain || !sgt)
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return -EINVAL;
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for_each_sg(sgt->sgl, sg, sgt->nents, i) {
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u32 pa = sg_phys(sg) - sg->offset;
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size_t bytes = sg->length + sg->offset;
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VERB("map[%d]: %08x %08x(%x)", i, iova, pa, bytes);
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ret = iommu_map(domain, da, pa, bytes, prot);
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if (ret)
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goto fail;
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da += bytes;
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}
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return 0;
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fail:
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da = iova;
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for_each_sg(sgt->sgl, sg, i, j) {
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size_t bytes = sg->length + sg->offset;
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iommu_unmap(domain, da, bytes);
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da += bytes;
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}
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return ret;
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}
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static int msm_iommu_unmap(struct msm_mmu *mmu, uint32_t iova,
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struct sg_table *sgt, unsigned len)
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{
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struct msm_iommu *iommu = to_msm_iommu(mmu);
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struct iommu_domain *domain = iommu->domain;
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struct scatterlist *sg;
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unsigned int da = iova;
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int i;
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for_each_sg(sgt->sgl, sg, sgt->nents, i) {
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size_t bytes = sg->length + sg->offset;
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size_t unmapped;
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unmapped = iommu_unmap(domain, da, bytes);
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if (unmapped < bytes)
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return unmapped;
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VERB("unmap[%d]: %08x(%x)", i, iova, bytes);
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BUG_ON(!IS_ALIGNED(bytes, PAGE_SIZE));
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da += bytes;
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}
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return 0;
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}
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static void msm_iommu_destroy(struct msm_mmu *mmu)
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{
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struct msm_iommu *iommu = to_msm_iommu(mmu);
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iommu_domain_free(iommu->domain);
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kfree(iommu);
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}
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static const struct msm_mmu_funcs funcs = {
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.attach = msm_iommu_attach,
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.map = msm_iommu_map,
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.unmap = msm_iommu_unmap,
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.destroy = msm_iommu_destroy,
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};
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struct msm_mmu *msm_iommu_new(struct drm_device *dev, struct iommu_domain *domain)
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{
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struct msm_iommu *iommu;
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iommu = kzalloc(sizeof(*iommu), GFP_KERNEL);
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if (!iommu)
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return ERR_PTR(-ENOMEM);
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iommu->domain = domain;
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msm_mmu_init(&iommu->base, dev, &funcs);
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iommu_set_fault_handler(domain, msm_fault_handler, dev);
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return &iommu->base;
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}
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