feaf7cf153
powerpc: Merge atomic.h and memory.h into powerpc Merged atomic.h into include/powerpc. Moved asm-style HMT_ defines from memory.h into ppc_asm.h, where there were already HMT_defines; moved c-style HMT_ defines to processor.h. Renamed memory.h to synch.h to better reflect its contents. Signed-off-by: Kumar Gala <kumar.gala@freescale.com> Signed-off-by: Becky Bruce <becky.bruce@freescale.com> Signed-off-by: Jon Loeliger <linuxppc@jdl.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
52 lines
1 KiB
C
52 lines
1 KiB
C
#ifndef _ASM_POWERPC_SYNCH_H
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#define _ASM_POWERPC_SYNCH_H
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#include <linux/config.h>
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#ifdef __powerpc64__
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#define __SUBARCH_HAS_LWSYNC
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#endif
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#ifdef __SUBARCH_HAS_LWSYNC
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# define LWSYNC lwsync
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#else
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# define LWSYNC sync
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#endif
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/*
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* Arguably the bitops and *xchg operations don't imply any memory barrier
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* or SMP ordering, but in fact a lot of drivers expect them to imply
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* both, since they do on x86 cpus.
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*/
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#ifdef CONFIG_SMP
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#define EIEIO_ON_SMP "eieio\n"
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#define ISYNC_ON_SMP "\n\tisync"
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#define SYNC_ON_SMP __stringify(LWSYNC) "\n"
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#else
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#define EIEIO_ON_SMP
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#define ISYNC_ON_SMP
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#define SYNC_ON_SMP
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#endif
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static inline void eieio(void)
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{
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__asm__ __volatile__ ("eieio" : : : "memory");
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}
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static inline void isync(void)
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{
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__asm__ __volatile__ ("isync" : : : "memory");
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}
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#ifdef CONFIG_SMP
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#define eieio_on_smp() eieio()
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#define isync_on_smp() isync()
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#else
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#define eieio_on_smp() __asm__ __volatile__("": : :"memory")
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#define isync_on_smp() __asm__ __volatile__("": : :"memory")
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#endif
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#endif /* _ASM_POWERPC_SYNCH_H */
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