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alistair23-linux/drivers/clk/socfpga
Dinh Nguyen 671e6c9c6b clk: stratix10: use do_div() for 64-bit calculation
[ Upstream commit cc26ed7be4 ]

do_div() macro to perform u64 division and guards against overflow if
the result is too large for the unsigned long return type.

Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Link: https://lkml.kernel.org/r/20200114160726.19771-1-dinguyen@kernel.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-10-01 13:17:33 +02:00
..
Makefile clk: socfpga: stratix10: add clock driver for Stratix10 platform 2018-04-06 10:12:35 -07:00
clk-gate-a10.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 201 2019-05-30 11:29:52 -07:00
clk-gate-s10.c clk: Remove io.h from clk-provider.h 2019-05-15 13:21:37 -07:00
clk-gate.c clk: socfpga: deindent code to proper indentation 2019-08-16 10:20:07 -07:00
clk-periph-a10.c clk: socfpga: Don't reference clk_init_data after registration 2019-08-16 10:20:07 -07:00
clk-periph-s10.c clk: socfpga: stratix10: fix rate caclulationg for cnt_clks 2019-08-14 09:23:21 -07:00
clk-periph.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157 2019-05-30 11:26:37 -07:00
clk-pll-a10.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 201 2019-05-30 11:29:52 -07:00
clk-pll-s10.c clk: stratix10: use do_div() for 64-bit calculation 2020-10-01 13:17:33 +02:00
clk-pll.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157 2019-05-30 11:26:37 -07:00
clk-s10.c clk: socfpga: stratix10: fix divider entry for the emac clocks 2019-06-25 14:39:51 -07:00
clk.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 13 2019-05-21 11:28:45 +02:00
clk.h treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 288 2019-06-05 17:36:37 +02:00
stratix10-clk.h clk: socfpga: stratix10: add clock driver for Stratix10 platform 2018-04-06 10:12:35 -07:00