2c799cef4d
This is needed to minimize io.h so the SoC specific io.h for ARMs can removed. Note that minimal driver changes for DSS and RNG are needed to include cpu.h for SoC detection macros. Cc: Tomi Valkeinen <tomi.valkeinen@ti.com> Cc: Matt Mackall <mpm@selenic.com> Cc: Herbert Xu <herbert@gondor.apana.org.au> Signed-off-by: Tony Lindgren <tony@atomide.com>
124 lines
3.3 KiB
C
124 lines
3.3 KiB
C
/*
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* gpmc-nand.c
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*
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* Copyright (C) 2009 Texas Instruments
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* Vimal Singh <vimalsingh@ti.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/kernel.h>
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#include <linux/platform_device.h>
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#include <linux/io.h>
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#include <linux/mtd/nand.h>
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#include <asm/mach/flash.h>
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#include <plat/cpu.h>
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#include <plat/nand.h>
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#include <plat/board.h>
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#include <plat/gpmc.h>
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static struct resource gpmc_nand_resource = {
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.flags = IORESOURCE_MEM,
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};
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static struct platform_device gpmc_nand_device = {
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.name = "omap2-nand",
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.id = 0,
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.num_resources = 1,
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.resource = &gpmc_nand_resource,
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};
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static int omap2_nand_gpmc_retime(struct omap_nand_platform_data *gpmc_nand_data)
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{
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struct gpmc_timings t;
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int err;
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if (!gpmc_nand_data->gpmc_t)
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return 0;
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memset(&t, 0, sizeof(t));
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t.sync_clk = gpmc_nand_data->gpmc_t->sync_clk;
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t.cs_on = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->cs_on);
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t.adv_on = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->adv_on);
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/* Read */
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t.adv_rd_off = gpmc_round_ns_to_ticks(
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gpmc_nand_data->gpmc_t->adv_rd_off);
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t.oe_on = t.adv_on;
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t.access = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->access);
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t.oe_off = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->oe_off);
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t.cs_rd_off = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->cs_rd_off);
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t.rd_cycle = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->rd_cycle);
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/* Write */
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t.adv_wr_off = gpmc_round_ns_to_ticks(
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gpmc_nand_data->gpmc_t->adv_wr_off);
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t.we_on = t.oe_on;
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if (cpu_is_omap34xx()) {
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t.wr_data_mux_bus = gpmc_round_ns_to_ticks(
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gpmc_nand_data->gpmc_t->wr_data_mux_bus);
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t.wr_access = gpmc_round_ns_to_ticks(
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gpmc_nand_data->gpmc_t->wr_access);
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}
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t.we_off = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->we_off);
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t.cs_wr_off = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->cs_wr_off);
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t.wr_cycle = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->wr_cycle);
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/* Configure GPMC */
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if (gpmc_nand_data->devsize == NAND_BUSWIDTH_16)
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gpmc_cs_configure(gpmc_nand_data->cs, GPMC_CONFIG_DEV_SIZE, 1);
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else
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gpmc_cs_configure(gpmc_nand_data->cs, GPMC_CONFIG_DEV_SIZE, 0);
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gpmc_cs_configure(gpmc_nand_data->cs,
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GPMC_CONFIG_DEV_TYPE, GPMC_DEVICETYPE_NAND);
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err = gpmc_cs_set_timings(gpmc_nand_data->cs, &t);
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if (err)
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return err;
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return 0;
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}
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int __init gpmc_nand_init(struct omap_nand_platform_data *gpmc_nand_data)
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{
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int err = 0;
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struct device *dev = &gpmc_nand_device.dev;
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gpmc_nand_device.dev.platform_data = gpmc_nand_data;
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err = gpmc_cs_request(gpmc_nand_data->cs, NAND_IO_SIZE,
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&gpmc_nand_data->phys_base);
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if (err < 0) {
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dev_err(dev, "Cannot request GPMC CS\n");
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return err;
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}
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/* Set timings in GPMC */
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err = omap2_nand_gpmc_retime(gpmc_nand_data);
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if (err < 0) {
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dev_err(dev, "Unable to set gpmc timings: %d\n", err);
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return err;
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}
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/* Enable RD PIN Monitoring Reg */
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if (gpmc_nand_data->dev_ready) {
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gpmc_cs_configure(gpmc_nand_data->cs, GPMC_CONFIG_RDY_BSY, 1);
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}
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err = platform_device_register(&gpmc_nand_device);
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if (err < 0) {
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dev_err(dev, "Unable to register NAND device\n");
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goto out_free_cs;
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}
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return 0;
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out_free_cs:
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gpmc_cs_free(gpmc_nand_data->cs);
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return err;
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}
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