Ard Biesheuvel 335ebe3035 lib/raid6: arm: optimize away a mask operation in NEON recovery routine ... The NEON recovery code was modeled after the x86 SIMD code, and for some reason, that code uses a 16 bit wide signed shift and a mask to perform what amounts to a 8 bit unsigned shift. So fold the ops together. Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>		2019-02-28 17:48:23 +00:00
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test	lib/raid6: check for assembler SSSE3 support	2018-12-20 08:53:23 -08:00
.gitignore	lib/raid6/altivec: Add vpermxor implementation for raid6 Q syndrome	2018-03-20 16:47:25 +11:00
algos.c	lib/raid6: add option to skip algo benchmarking	2018-12-20 08:53:23 -08:00
altivec.uc	lib/raid6: Build proper raid6test files on powerpc	2018-03-20 16:47:52 +11:00
avx2.c
avx512.c	lib/raid6: align AVX512 constants to 512 bits, not bytes	2017-08-25 10:21:47 -07:00
int.uc
Makefile	kbuild: remove redundant target cleaning on failure	2019-01-06 09:46:51 +09:00
mktables.c
mmx.c
neon.c
neon.uc	lib/raid6: use vdupq_n_u8 to avoid endianness warnings	2019-02-28 17:44:51 +00:00
recov.c
recov_avx2.c
recov_avx512.c
recov_neon.c	md/raid6: implement recovery using ARM NEON intrinsics	2017-08-09 18:52:07 +01:00
recov_neon_inner.c	lib/raid6: arm: optimize away a mask operation in NEON recovery routine	2019-02-28 17:48:23 +00:00
recov_s390xc.c	License cleanup: add SPDX GPL-2.0 license identifier to files with no license	2017-11-02 11:10:55 +01:00
recov_ssse3.c
s390vx.uc	RAID/s390: Remove VLA usage	2018-07-04 08:37:50 +02:00
sse1.c
sse2.c	treewide: Align function definition open/close braces	2018-03-26 11:13:09 +02:00
unroll.awk
vpermxor.uc	lib/raid6/altivec: Add vpermxor implementation for raid6 Q syndrome	2018-03-20 16:47:25 +11:00
x86.h