2005-04-16 16:20:36 -06:00
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/*
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* linux/arch/arm/mach-pxa/pxa27x.c
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*
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* Author: Nicolas Pitre
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* Created: Nov 05, 2002
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* Copyright: MontaVista Software Inc.
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*
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* Code specific to PXA27x aka Bulverde.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/pm.h>
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2005-10-29 12:07:23 -06:00
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#include <linux/platform_device.h>
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2005-04-16 16:20:36 -06:00
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#include <asm/hardware.h>
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#include <asm/irq.h>
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2007-06-21 21:14:09 -06:00
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#include <asm/arch/irqs.h>
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2005-04-16 16:20:36 -06:00
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#include <asm/arch/pxa-regs.h>
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2005-11-12 07:22:11 -07:00
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#include <asm/arch/ohci.h>
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2007-05-15 04:16:10 -06:00
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#include <asm/arch/pm.h>
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2007-06-21 22:40:17 -06:00
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#include <asm/arch/dma.h>
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2005-04-16 16:20:36 -06:00
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#include "generic.h"
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2007-05-15 08:39:36 -06:00
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#include "devices.h"
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2005-04-16 16:20:36 -06:00
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/* Crystal clock: 13MHz */
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#define BASE_CLK 13000000
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/*
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* Get the clock frequency as reflected by CCSR and the turbo flag.
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* We assume these values have been applied via a fcs.
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* If info is not 0 we also display the current settings.
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*/
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unsigned int get_clk_frequency_khz( int info)
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{
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unsigned long ccsr, clkcfg;
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unsigned int l, L, m, M, n2, N, S;
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int cccr_a, t, ht, b;
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ccsr = CCSR;
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cccr_a = CCCR & (1 << 25);
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/* Read clkcfg register: it has turbo, b, half-turbo (and f) */
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asm( "mrc\tp14, 0, %0, c6, c0, 0" : "=r" (clkcfg) );
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2006-02-01 12:25:59 -07:00
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t = clkcfg & (1 << 0);
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2005-04-16 16:20:36 -06:00
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ht = clkcfg & (1 << 2);
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b = clkcfg & (1 << 3);
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l = ccsr & 0x1f;
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n2 = (ccsr>>7) & 0xf;
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m = (l <= 10) ? 1 : (l <= 20) ? 2 : 4;
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L = l * BASE_CLK;
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N = (L * n2) / 2;
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M = (!cccr_a) ? (L/m) : ((b) ? L : (L/2));
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S = (b) ? L : (L/2);
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if (info) {
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printk( KERN_INFO "Run Mode clock: %d.%02dMHz (*%d)\n",
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L / 1000000, (L % 1000000) / 10000, l );
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printk( KERN_INFO "Turbo Mode clock: %d.%02dMHz (*%d.%d, %sactive)\n",
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N / 1000000, (N % 1000000)/10000, n2 / 2, (n2 % 2)*5,
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(t) ? "" : "in" );
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printk( KERN_INFO "Memory clock: %d.%02dMHz (/%d)\n",
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M / 1000000, (M % 1000000) / 10000, m );
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printk( KERN_INFO "System bus clock: %d.%02dMHz \n",
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S / 1000000, (S % 1000000) / 10000 );
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}
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return (t) ? (N/1000) : (L/1000);
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}
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/*
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* Return the current mem clock frequency in units of 10kHz as
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* reflected by CCCR[A], B, and L
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*/
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unsigned int get_memclk_frequency_10khz(void)
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{
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unsigned long ccsr, clkcfg;
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unsigned int l, L, m, M;
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int cccr_a, b;
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ccsr = CCSR;
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cccr_a = CCCR & (1 << 25);
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/* Read clkcfg register: it has turbo, b, half-turbo (and f) */
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asm( "mrc\tp14, 0, %0, c6, c0, 0" : "=r" (clkcfg) );
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b = clkcfg & (1 << 3);
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l = ccsr & 0x1f;
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m = (l <= 10) ? 1 : (l <= 20) ? 2 : 4;
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L = l * BASE_CLK;
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M = (!cccr_a) ? (L/m) : ((b) ? L : (L/2));
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return (M / 10000);
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}
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/*
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* Return the current LCD clock frequency in units of 10kHz as
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*/
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unsigned int get_lcdclk_frequency_10khz(void)
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{
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unsigned long ccsr;
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unsigned int l, L, k, K;
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ccsr = CCSR;
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l = ccsr & 0x1f;
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k = (l <= 7) ? 1 : (l <= 16) ? 2 : 4;
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L = l * BASE_CLK;
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K = L / k;
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return (K / 10000);
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}
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EXPORT_SYMBOL(get_clk_frequency_khz);
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EXPORT_SYMBOL(get_memclk_frequency_10khz);
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EXPORT_SYMBOL(get_lcdclk_frequency_10khz);
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2005-06-13 15:35:41 -06:00
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#ifdef CONFIG_PM
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2005-06-03 13:52:27 -06:00
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void pxa_cpu_pm_enter(suspend_state_t state)
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{
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extern void pxa_cpu_standby(void);
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extern void pxa_cpu_suspend(unsigned int);
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extern void pxa_cpu_resume(void);
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2005-07-01 04:27:05 -06:00
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if (state == PM_SUSPEND_STANDBY)
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2007-07-02 03:19:07 -06:00
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CKEN = (1 << CKEN_MEMC) | (1 << CKEN_OSTIMER) | (1 << CKEN_LCD) | (1 << CKEN_PWM0);
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else
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CKEN = (1 << CKEN_MEMC) | (1 << CKEN_OSTIMER);
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2005-06-03 13:52:27 -06:00
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/* ensure voltage-change sequencer not initiated, which hangs */
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PCFR &= ~PCFR_FVC;
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/* Clear edge-detect status register. */
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PEDR = 0xDF12FE1B;
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switch (state) {
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2005-07-01 04:27:05 -06:00
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case PM_SUSPEND_STANDBY:
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pxa_cpu_standby();
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break;
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2005-06-03 13:52:27 -06:00
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case PM_SUSPEND_MEM:
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/* set resume return address */
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PSPR = virt_to_phys(pxa_cpu_resume);
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2005-10-28 09:25:01 -06:00
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pxa_cpu_suspend(PWRMODE_SLEEP);
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2005-06-03 13:52:27 -06:00
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break;
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}
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}
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2005-04-16 16:20:36 -06:00
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2007-05-15 04:22:48 -06:00
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static int pxa27x_pm_valid(suspend_state_t state)
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{
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return state == PM_SUSPEND_MEM || state == PM_SUSPEND_STANDBY;
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}
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2007-05-15 04:16:10 -06:00
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static struct pm_ops pxa27x_pm_ops = {
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.enter = pxa_pm_enter,
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.valid = pxa27x_pm_valid,
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2007-05-15 04:16:10 -06:00
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};
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2005-06-13 15:35:41 -06:00
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#endif
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2005-04-16 16:20:36 -06:00
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/*
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* device registration specific to PXA27x.
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*/
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static u64 pxa27x_dmamask = 0xffffffffUL;
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static struct resource pxa27x_ohci_resources[] = {
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[0] = {
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.start = 0x4C000000,
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.end = 0x4C00ff6f,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = IRQ_USBH1,
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.end = IRQ_USBH1,
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.flags = IORESOURCE_IRQ,
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},
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};
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2007-05-15 03:39:49 -06:00
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static struct platform_device pxaohci_device = {
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.name = "pxa27x-ohci",
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.id = -1,
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.dev = {
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.dma_mask = &pxa27x_dmamask,
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.coherent_dma_mask = 0xffffffff,
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},
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.num_resources = ARRAY_SIZE(pxa27x_ohci_resources),
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.resource = pxa27x_ohci_resources,
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};
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2005-11-12 07:22:11 -07:00
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void __init pxa_set_ohci_info(struct pxaohci_platform_data *info)
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{
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pxaohci_device.dev.platform_data = info;
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2005-11-12 07:22:11 -07:00
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}
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2007-05-15 03:39:49 -06:00
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static struct resource i2c_power_resources[] = {
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{
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.start = 0x40f00180,
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.end = 0x40f001a3,
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.flags = IORESOURCE_MEM,
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}, {
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.start = IRQ_PWRI2C,
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.end = IRQ_PWRI2C,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device pxai2c_power_device = {
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.name = "pxa2xx-i2c",
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.id = 1,
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.resource = i2c_power_resources,
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.num_resources = ARRAY_SIZE(i2c_power_resources),
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};
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2005-04-16 16:20:36 -06:00
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static struct platform_device *devices[] __initdata = {
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&pxamci_device,
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&pxaudc_device,
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&pxafb_device,
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&ffuart_device,
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&btuart_device,
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&stuart_device,
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&pxai2c_device,
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&pxai2c_power_device,
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&pxai2s_device,
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&pxaficp_device,
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&pxartc_device,
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&pxaohci_device,
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2005-04-16 16:20:36 -06:00
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};
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2007-06-21 21:14:09 -06:00
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void __init pxa27x_init_irq(void)
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{
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pxa_init_irq_low();
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pxa_init_irq_high();
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pxa_init_irq_gpio(128);
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}
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2005-04-16 16:20:36 -06:00
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static int __init pxa27x_init(void)
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{
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2007-05-15 04:16:10 -06:00
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int ret = 0;
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if (cpu_is_pxa27x()) {
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2007-06-21 22:40:17 -06:00
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if ((ret = pxa_init_dma(32)))
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return ret;
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2007-05-15 04:16:10 -06:00
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#ifdef CONFIG_PM
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pm_set_ops(&pxa27x_pm_ops);
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#endif
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ret = platform_add_devices(devices, ARRAY_SIZE(devices));
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}
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return ret;
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2005-04-16 16:20:36 -06:00
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}
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subsys_initcall(pxa27x_init);
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