Merge branch 'sh/for-2.6.32' of git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6
* 'sh/for-2.6.32' of git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6: sh: Don't allocate smaller sized mappings on every iteration sh: Try PMB mapping based on physical address, not mapping size sh: Plug PMB alloc memory leak sh: Sprinkle __uses_jump_to_uncached sh: enable sleep state LEDs on Ecovec24 usb: r8a66597-udc unaligned fifo fix sh: mach-ecovec24: Document DS2 switch settings. sh: Build fix: export __movmem sh: Disable unaligned kernel access printks by default. sh: mach-ecovec24: modify 1st MTD area to read only sh: mach-ecovec24: Add TouchScreen support sh: magicpanelr2 and dreamcast can use the generic I/O base. sh: Don't enable interrupts in the page fault path sh: Set the default I/O port base to P2SEG. sh: Handle ioport_map() cases for >= P1SEG addresses.
This commit is contained in:
commit
1442138372
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@ -205,8 +205,6 @@ static void __init setup_port_multiplexing(void)
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static void __init mpr2_setup(char **cmdline_p)
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{
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__set_io_port_base(0xa0000000);
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/* set Pin Select Register A:
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* /PCC_CD1, /PCC_CD2, PCC_BVD1, PCC_BVD2,
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* /IOIS16, IRQ4, IRQ5, USB1d_SUSPEND
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@ -42,8 +42,6 @@ static void __init dreamcast_setup(char **cmdline_p)
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/* Acknowledge any previous events */
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/* XXX */
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__set_io_port_base(0xa0000000);
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/* Assign all virtual IRQs to the System ASIC int. handler */
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for (i = HW_EVENT_IRQ_BASE; i < HW_EVENT_IRQ_MAX; i++)
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set_irq_chip_and_handler(i, &systemasic_int,
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@ -18,6 +18,7 @@
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#include <linux/delay.h>
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#include <linux/usb/r8a66597.h>
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#include <linux/i2c.h>
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#include <linux/i2c/tsc2007.h>
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#include <linux/input.h>
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#include <video/sh_mobile_lcdc.h>
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#include <media/sh_mobile_ceu.h>
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@ -38,6 +39,20 @@
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* 0x1800_0000 MFI 16bit
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*/
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/* SWITCH
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*------------------------------
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* DS2[1] = FlashROM write protect ON : write protect
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* OFF : No write protect
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* DS2[2] = RMII / TS, SCIF ON : RMII
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* OFF : TS, SCIF3
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* DS2[3] = Camera / Video ON : Camera
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* OFF : NTSC/PAL (IN)
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* DS2[5] = NTSC_OUT Clock ON : On board OSC
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* OFF : SH7724 DV_CLK
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* DS2[6-7] = MMC / SD ON-OFF : SD
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* OFF-ON : MMC
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*/
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/* Heartbeat */
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static unsigned char led_pos[] = { 0, 1, 2, 3 };
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static struct heartbeat_data heartbeat_data = {
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@ -70,7 +85,7 @@ static struct mtd_partition nor_flash_partitions[] = {
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.name = "boot loader",
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.offset = 0,
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.size = (5 * 1024 * 1024),
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.mask_flags = MTD_CAP_ROM,
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.mask_flags = MTD_WRITEABLE, /* force read-only */
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}, {
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.name = "free-area",
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.offset = MTDPART_OFS_APPEND,
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@ -376,6 +391,43 @@ static struct platform_device keysc_device = {
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},
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};
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/* TouchScreen */
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#define IRQ0 32
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static int ts_get_pendown_state(void)
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{
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int val = 0;
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gpio_free(GPIO_FN_INTC_IRQ0);
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gpio_request(GPIO_PTZ0, NULL);
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gpio_direction_input(GPIO_PTZ0);
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val = gpio_get_value(GPIO_PTZ0);
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gpio_free(GPIO_PTZ0);
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gpio_request(GPIO_FN_INTC_IRQ0, NULL);
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return val ? 0 : 1;
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}
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static int ts_init(void)
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{
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gpio_request(GPIO_FN_INTC_IRQ0, NULL);
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return 0;
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}
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struct tsc2007_platform_data tsc2007_info = {
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.model = 2007,
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.x_plate_ohms = 180,
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.get_pendown_state = ts_get_pendown_state,
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.init_platform_hw = ts_init,
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};
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static struct i2c_board_info ts_i2c_clients = {
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I2C_BOARD_INFO("tsc2007", 0x48),
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.type = "tsc2007",
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.platform_data = &tsc2007_info,
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.irq = IRQ0,
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};
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static struct platform_device *ecovec_devices[] __initdata = {
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&heartbeat_device,
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&nor_flash_device,
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@ -460,6 +512,11 @@ static void __init sh_eth_init(void)
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#define IODRIVEA 0xA405018A
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static int __init arch_setup(void)
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{
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/* enable STATUS0, STATUS2 and PDSTATUS */
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gpio_request(GPIO_FN_STATUS0, NULL);
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gpio_request(GPIO_FN_STATUS2, NULL);
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gpio_request(GPIO_FN_PDSTATUS, NULL);
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/* enable SCIFA0 */
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gpio_request(GPIO_FN_SCIF0_TXD, NULL);
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gpio_request(GPIO_FN_SCIF0_RXD, NULL);
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@ -590,6 +647,10 @@ static int __init arch_setup(void)
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*/
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gpio_request(GPIO_PTF4, NULL);
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gpio_direction_output(GPIO_PTF4, 1);
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/* enable TouchScreen */
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i2c_register_board_info(0, &ts_i2c_clients, 1);
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set_irq_type(IRQ0, IRQ_TYPE_LEVEL_LOW);
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}
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/* enable CEU0 */
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@ -152,8 +152,6 @@ call_do_page_fault:
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mov.l 1f, r0
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mov.l @r0, r6
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sti
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mov.l 3f, r0
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mov.l 4f, r1
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mov r15, r4
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@ -147,6 +147,9 @@ void generic_outsl(unsigned long port, const void *src, unsigned long count)
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void __iomem *generic_ioport_map(unsigned long addr, unsigned int size)
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{
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if (PXSEG(addr) >= P1SEG)
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return (void __iomem *)addr;
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return (void __iomem *)(addr + generic_io_base);
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}
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@ -14,6 +14,7 @@
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#include <linux/string.h>
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#include <asm/machvec.h>
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#include <asm/sections.h>
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#include <asm/addrspace.h>
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#include <asm/setup.h>
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#include <asm/io.h>
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#include <asm/irq.h>
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@ -133,4 +134,6 @@ void __init sh_mv_setup(void)
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if (!sh_mv.mv_nr_irqs)
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sh_mv.mv_nr_irqs = NR_IRQS;
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__set_io_port_base(P2SEG);
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}
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@ -84,6 +84,7 @@ DECLARE_EXPORT(__movstrSI60);
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DECLARE_EXPORT(__movstr_i4_even);
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DECLARE_EXPORT(__movstr_i4_odd);
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DECLARE_EXPORT(__movstrSI12_i4);
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DECLARE_EXPORT(__movmem);
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DECLARE_EXPORT(__movmem_i4_even);
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DECLARE_EXPORT(__movmem_i4_odd);
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DECLARE_EXPORT(__movmemSI12_i4);
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@ -54,8 +54,8 @@ static unsigned long se_multi;
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/* bitfield: 1: warn 2: fixup 4: signal -> combinations 2|4 && 1|2|4 are not
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valid! */
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static int se_usermode = 3;
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/* 0: no warning 1: print a warning message */
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static int se_kernmode_warn = 1;
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/* 0: no warning 1: print a warning message, disabled by default */
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static int se_kernmode_warn;
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#ifdef CONFIG_PROC_FS
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static const char *se_usermode_action[] = {
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@ -43,7 +43,7 @@ static void (*__flush_dcache_segment_fn)(unsigned long, unsigned long) =
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* Called from kernel/module.c:sys_init_module and routine for a.out format,
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* signal handler code and kprobes code
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*/
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static void sh4_flush_icache_range(void *args)
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static void __uses_jump_to_uncached sh4_flush_icache_range(void *args)
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{
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struct flusher_data *data = args;
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unsigned long start, end;
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@ -78,7 +78,7 @@ static void sh7705_flush_icache_range(void *args)
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/*
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* Writeback&Invalidate the D-cache of the page
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*/
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static void __flush_dcache_page(unsigned long phys)
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static void __uses_jump_to_uncached __flush_dcache_page(unsigned long phys)
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{
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unsigned long ways, waysize, addrstart;
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unsigned long flags;
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@ -144,7 +144,7 @@ static void sh7705_flush_dcache_page(void *arg)
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__flush_dcache_page(PHYSADDR(page_address(page)));
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}
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static void sh7705_flush_cache_all(void *args)
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static void __uses_jump_to_uncached sh7705_flush_cache_all(void *args)
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{
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unsigned long flags;
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@ -83,7 +83,7 @@ void __iomem *__ioremap(unsigned long phys_addr, unsigned long size,
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*
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* PMB entries are all pre-faulted.
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*/
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if (unlikely(size >= 0x1000000)) {
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if (unlikely(phys_addr >= P1SEG)) {
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unsigned long mapped = pmb_remap(addr, phys_addr, size, flags);
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if (likely(mapped)) {
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@ -33,6 +33,8 @@
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#define NR_PMB_ENTRIES 16
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static void __pmb_unmap(struct pmb_entry *);
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static struct kmem_cache *pmb_cache;
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static unsigned long pmb_map;
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@ -218,9 +220,10 @@ static struct {
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long pmb_remap(unsigned long vaddr, unsigned long phys,
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unsigned long size, unsigned long flags)
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{
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struct pmb_entry *pmbp;
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struct pmb_entry *pmbp, *pmbe;
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unsigned long wanted;
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int pmb_flags, i;
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long err;
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/* Convert typical pgprot value to the PMB equivalent */
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if (flags & _PAGE_CACHABLE) {
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again:
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for (i = 0; i < ARRAY_SIZE(pmb_sizes); i++) {
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struct pmb_entry *pmbe;
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int ret;
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if (size < pmb_sizes[i].size)
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continue;
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pmbe = pmb_alloc(vaddr, phys, pmb_flags | pmb_sizes[i].flag);
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if (IS_ERR(pmbe))
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return PTR_ERR(pmbe);
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if (IS_ERR(pmbe)) {
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err = PTR_ERR(pmbe);
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goto out;
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}
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ret = set_pmb_entry(pmbe);
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if (ret != 0) {
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pmb_free(pmbe);
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return -EBUSY;
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err = -EBUSY;
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goto out;
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}
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phys += pmb_sizes[i].size;
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@ -264,12 +269,25 @@ again:
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pmbp->link = pmbe;
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pmbp = pmbe;
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/*
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* Instead of trying smaller sizes on every iteration
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* (even if we succeed in allocating space), try using
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* pmb_sizes[i].size again.
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*/
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i--;
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}
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if (size >= 0x1000000)
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goto again;
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return wanted - size;
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out:
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if (pmbp)
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__pmb_unmap(pmbp);
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return err;
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}
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void pmb_unmap(unsigned long addr)
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@ -283,12 +301,19 @@ void pmb_unmap(unsigned long addr)
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if (unlikely(!pmbe))
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return;
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__pmb_unmap(pmbe);
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}
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static void __pmb_unmap(struct pmb_entry *pmbe)
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{
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WARN_ON(!test_bit(pmbe->entry, &pmb_map));
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do {
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struct pmb_entry *pmblink = pmbe;
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clear_pmb_entry(pmbe);
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if (pmbe->entry != PMB_NO_ENTRY)
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clear_pmb_entry(pmbe);
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pmbe = pmblink->link;
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pmb_free(pmblink);
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@ -131,31 +131,48 @@ static inline u16 r8a66597_read(struct r8a66597 *r8a66597, unsigned long offset)
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}
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static inline void r8a66597_read_fifo(struct r8a66597 *r8a66597,
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unsigned long offset, u16 *buf,
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unsigned long offset,
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unsigned char *buf,
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int len)
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{
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unsigned long fifoaddr = r8a66597->reg + offset;
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unsigned int data;
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int i;
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if (r8a66597->pdata->on_chip) {
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unsigned long fifoaddr = r8a66597->reg + offset;
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unsigned long count;
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union {
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unsigned long dword;
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unsigned char byte[4];
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} data;
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unsigned char *pb;
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int i;
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/* 32-bit accesses for on_chip controllers */
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count = len / 4;
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insl(fifoaddr, buf, count);
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/* aligned buf case */
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if (len >= 4 && !((unsigned long)buf & 0x03)) {
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insl(fifoaddr, buf, len / 4);
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buf += len & ~0x03;
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len &= 0x03;
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}
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if (len & 0x00000003) {
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data.dword = inl(fifoaddr);
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pb = (unsigned char *)buf + count * 4;
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for (i = 0; i < (len & 0x00000003); i++)
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pb[i] = data.byte[i];
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/* unaligned buf case */
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for (i = 0; i < len; i++) {
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if (!(i & 0x03))
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data = inl(fifoaddr);
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buf[i] = (data >> ((i & 0x03) * 8)) & 0xff;
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}
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} else {
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len = (len + 1) / 2;
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insw(r8a66597->reg + offset, buf, len);
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/* 16-bit accesses for external controllers */
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/* aligned buf case */
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if (len >= 2 && !((unsigned long)buf & 0x01)) {
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insw(fifoaddr, buf, len / 2);
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buf += len & ~0x01;
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len &= 0x01;
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}
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/* unaligned buf case */
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for (i = 0; i < len; i++) {
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if (!(i & 0x01))
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data = inw(fifoaddr);
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buf[i] = (data >> ((i & 0x01) * 8)) & 0xff;
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}
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}
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}
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|
@ -166,38 +183,40 @@ static inline void r8a66597_write(struct r8a66597 *r8a66597, u16 val,
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}
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static inline void r8a66597_write_fifo(struct r8a66597 *r8a66597,
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unsigned long offset, u16 *buf,
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unsigned long offset,
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unsigned char *buf,
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int len)
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{
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unsigned long fifoaddr = r8a66597->reg + offset;
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int adj = 0;
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int i;
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if (r8a66597->pdata->on_chip) {
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unsigned long count;
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unsigned char *pb;
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int i;
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count = len / 4;
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outsl(fifoaddr, buf, count);
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if (len & 0x00000003) {
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pb = (unsigned char *)buf + count * 4;
|
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for (i = 0; i < (len & 0x00000003); i++) {
|
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if (r8a66597_read(r8a66597, CFIFOSEL) & BIGEND)
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outb(pb[i], fifoaddr + i);
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else
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outb(pb[i], fifoaddr + 3 - i);
|
||||
}
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/* 32-bit access only if buf is 32-bit aligned */
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if (len >= 4 && !((unsigned long)buf & 0x03)) {
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outsl(fifoaddr, buf, len / 4);
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buf += len & ~0x03;
|
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len &= 0x03;
|
||||
}
|
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} else {
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int odd = len & 0x0001;
|
||||
|
||||
len = len / 2;
|
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outsw(fifoaddr, buf, len);
|
||||
if (unlikely(odd)) {
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buf = &buf[len];
|
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outb((unsigned char)*buf, fifoaddr);
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||||
/* 16-bit access only if buf is 16-bit aligned */
|
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if (len >= 2 && !((unsigned long)buf & 0x01)) {
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outsw(fifoaddr, buf, len / 2);
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buf += len & ~0x01;
|
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len &= 0x01;
|
||||
}
|
||||
}
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|
||||
/* adjust fifo address in the little endian case */
|
||||
if (!(r8a66597_read(r8a66597, CFIFOSEL) & BIGEND)) {
|
||||
if (r8a66597->pdata->on_chip)
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||||
adj = 0x03; /* 32-bit wide */
|
||||
else
|
||||
adj = 0x01; /* 16-bit wide */
|
||||
}
|
||||
|
||||
for (i = 0; i < len; i++)
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||||
outb(buf[i], fifoaddr + adj - (i & adj));
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||||
}
|
||||
|
||||
static inline void r8a66597_mdfy(struct r8a66597 *r8a66597,
|
||||
|
|
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