Merge branch 'gpio-reserved-ranges' into devel
This commit is contained in:
commit
89b0b4e2d3
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@ -151,9 +151,9 @@ in a lot of designs, some using all 32 bits, some using 18 and some using
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first 18 GPIOs, at local offset 0 .. 17, are in use.
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If these GPIOs do not happen to be the first N GPIOs at offset 0...N-1, an
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additional bitmask is needed to specify which GPIOs are actually in use,
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and which are dummies. The bindings for this case has not yet been
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specified, but should be specified if/when such hardware appears.
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additional set of tuples is needed to specify which GPIOs are unusable, with
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the gpio-reserved-ranges binding. This property indicates the start and size
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of the GPIOs that can't be used.
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Optionally, a GPIO controller may have a "gpio-line-names" property. This is
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an array of strings defining the names of the GPIO lines going out of the
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@ -178,6 +178,7 @@ gpio-controller@00000000 {
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gpio-controller;
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#gpio-cells = <2>;
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ngpios = <18>;
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gpio-reserved-ranges = <0 4>, <12 2>;
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gpio-line-names = "MMC-CD", "MMC-WP", "VDD eth", "RST eth", "LED R",
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"LED G", "LED B", "Col A", "Col B", "Col C", "Col D",
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"Row A", "Row B", "Row C", "Row D", "NMI button",
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@ -511,6 +511,28 @@ void of_mm_gpiochip_remove(struct of_mm_gpio_chip *mm_gc)
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}
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EXPORT_SYMBOL(of_mm_gpiochip_remove);
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static void of_gpiochip_init_valid_mask(struct gpio_chip *chip)
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{
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int len, i;
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u32 start, count;
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struct device_node *np = chip->of_node;
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len = of_property_count_u32_elems(np, "gpio-reserved-ranges");
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if (len < 0 || len % 2 != 0)
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return;
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for (i = 0; i < len; i += 2) {
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of_property_read_u32_index(np, "gpio-reserved-ranges",
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i, &start);
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of_property_read_u32_index(np, "gpio-reserved-ranges",
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i + 1, &count);
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if (start >= chip->ngpio || start + count >= chip->ngpio)
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continue;
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bitmap_clear(chip->valid_mask, start, count);
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}
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};
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#ifdef CONFIG_PINCTRL
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static int of_gpiochip_add_pin_range(struct gpio_chip *chip)
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{
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@ -615,6 +637,8 @@ int of_gpiochip_add(struct gpio_chip *chip)
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if (chip->of_gpio_n_cells > MAX_PHANDLE_ARGS)
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return -EINVAL;
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of_gpiochip_init_valid_mask(chip);
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status = of_gpiochip_add_pin_range(chip);
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if (status)
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return status;
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@ -337,6 +337,57 @@ static int gpiochip_set_desc_names(struct gpio_chip *gc)
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return 0;
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}
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static unsigned long *gpiochip_allocate_mask(struct gpio_chip *chip)
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{
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unsigned long *p;
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p = kmalloc_array(BITS_TO_LONGS(chip->ngpio), sizeof(*p), GFP_KERNEL);
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if (!p)
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return NULL;
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/* Assume by default all GPIOs are valid */
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bitmap_fill(p, chip->ngpio);
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return p;
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}
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static int gpiochip_init_valid_mask(struct gpio_chip *gpiochip)
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{
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#ifdef CONFIG_OF_GPIO
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int size;
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struct device_node *np = gpiochip->of_node;
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size = of_property_count_u32_elems(np, "gpio-reserved-ranges");
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if (size > 0 && size % 2 == 0)
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gpiochip->need_valid_mask = true;
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#endif
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if (!gpiochip->need_valid_mask)
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return 0;
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gpiochip->valid_mask = gpiochip_allocate_mask(gpiochip);
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if (!gpiochip->valid_mask)
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return -ENOMEM;
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return 0;
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}
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static void gpiochip_free_valid_mask(struct gpio_chip *gpiochip)
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{
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kfree(gpiochip->valid_mask);
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gpiochip->valid_mask = NULL;
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}
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bool gpiochip_line_is_valid(const struct gpio_chip *gpiochip,
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unsigned int offset)
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{
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/* No mask means all valid */
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if (likely(!gpiochip->valid_mask))
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return true;
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return test_bit(offset, gpiochip->valid_mask);
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}
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EXPORT_SYMBOL_GPL(gpiochip_line_is_valid);
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/*
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* GPIO line handle management
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*/
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@ -1261,6 +1312,10 @@ int gpiochip_add_data_with_key(struct gpio_chip *chip, void *data,
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if (status)
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goto err_remove_from_list;
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status = gpiochip_init_valid_mask(chip);
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if (status)
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goto err_remove_irqchip_mask;
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status = gpiochip_add_irqchip(chip, lock_key, request_key);
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if (status)
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goto err_remove_chip;
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@ -1290,6 +1345,8 @@ err_remove_chip:
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acpi_gpiochip_remove(chip);
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gpiochip_free_hogs(chip);
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of_gpiochip_remove(chip);
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gpiochip_free_valid_mask(chip);
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err_remove_irqchip_mask:
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gpiochip_irqchip_free_valid_mask(chip);
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err_remove_from_list:
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spin_lock_irqsave(&gpio_lock, flags);
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@ -1346,6 +1403,7 @@ void gpiochip_remove(struct gpio_chip *chip)
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acpi_gpiochip_remove(chip);
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gpiochip_remove_pin_ranges(chip);
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of_gpiochip_remove(chip);
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gpiochip_free_valid_mask(chip);
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/*
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* We accept no more calls into the driver from this point, so
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* NULL the driver data pointer
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@ -1506,14 +1564,10 @@ static int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gpiochip)
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if (!gpiochip->irq.need_valid_mask)
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return 0;
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gpiochip->irq.valid_mask = kcalloc(BITS_TO_LONGS(gpiochip->ngpio),
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sizeof(long), GFP_KERNEL);
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gpiochip->irq.valid_mask = gpiochip_allocate_mask(gpiochip);
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if (!gpiochip->irq.valid_mask)
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return -ENOMEM;
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/* Assume by default all GPIOs are valid */
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bitmap_fill(gpiochip->irq.valid_mask, gpiochip->ngpio);
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return 0;
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}
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@ -1526,6 +1580,8 @@ static void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gpiochip)
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bool gpiochip_irqchip_irq_valid(const struct gpio_chip *gpiochip,
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unsigned int offset)
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{
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if (!gpiochip_line_is_valid(gpiochip, offset))
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return false;
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/* No mask means all valid */
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if (likely(!gpiochip->irq.valid_mask))
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return true;
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@ -105,6 +105,14 @@ static const struct pinctrl_ops msm_pinctrl_ops = {
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.dt_free_map = pinctrl_utils_free_map,
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};
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static int msm_pinmux_request(struct pinctrl_dev *pctldev, unsigned offset)
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{
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struct msm_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
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struct gpio_chip *chip = &pctrl->chip;
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return gpiochip_line_is_valid(chip, offset) ? 0 : -EINVAL;
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}
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static int msm_get_functions_count(struct pinctrl_dev *pctldev)
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{
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struct msm_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
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@ -166,6 +174,7 @@ static int msm_pinmux_set_mux(struct pinctrl_dev *pctldev,
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}
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static const struct pinmux_ops msm_pinmux_ops = {
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.request = msm_pinmux_request,
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.get_functions_count = msm_get_functions_count,
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.get_function_name = msm_get_function_name,
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.get_function_groups = msm_get_function_groups,
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@ -506,6 +515,9 @@ static void msm_gpio_dbg_show_one(struct seq_file *s,
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"pull up"
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};
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if (!gpiochip_line_is_valid(chip, offset))
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return;
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g = &pctrl->soc->groups[offset];
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ctl_reg = readl(pctrl->regs + g->ctl_reg);
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seq_printf(s, " %-8s: %-3s %d", g->name, is_out ? "out" : "in", func);
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seq_printf(s, " %dmA", msm_regval_to_drive(drive));
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seq_printf(s, " %s", pulls[pull]);
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seq_puts(s, "\n");
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}
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static void msm_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip)
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@ -524,10 +537,8 @@ static void msm_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip)
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unsigned gpio = chip->base;
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unsigned i;
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for (i = 0; i < chip->ngpio; i++, gpio++) {
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for (i = 0; i < chip->ngpio; i++, gpio++)
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msm_gpio_dbg_show_one(s, NULL, chip, i, gpio);
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seq_puts(s, "\n");
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}
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}
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#else
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chained_irq_exit(chip, desc);
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}
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static int msm_gpio_init_valid_mask(struct gpio_chip *chip,
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struct msm_pinctrl *pctrl)
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{
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int ret;
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unsigned int len, i;
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unsigned int max_gpios = pctrl->soc->ngpios;
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u16 *tmp;
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/* The number of GPIOs in the ACPI tables */
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len = ret = device_property_read_u16_array(pctrl->dev, "gpios", NULL, 0);
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if (ret < 0)
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return 0;
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if (ret > max_gpios)
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return -EINVAL;
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tmp = kmalloc_array(len, sizeof(*tmp), GFP_KERNEL);
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if (!tmp)
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return -ENOMEM;
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ret = device_property_read_u16_array(pctrl->dev, "gpios", tmp, len);
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if (ret < 0) {
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dev_err(pctrl->dev, "could not read list of GPIOs\n");
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goto out;
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}
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bitmap_zero(chip->valid_mask, max_gpios);
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for (i = 0; i < len; i++)
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set_bit(tmp[i], chip->valid_mask);
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out:
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kfree(tmp);
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return ret;
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}
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static bool msm_gpio_needs_valid_mask(struct msm_pinctrl *pctrl)
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{
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return device_property_read_u16_array(pctrl->dev, "gpios", NULL, 0) > 0;
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}
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static int msm_gpio_init(struct msm_pinctrl *pctrl)
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{
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struct gpio_chip *chip;
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@ -824,6 +875,7 @@ static int msm_gpio_init(struct msm_pinctrl *pctrl)
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chip->parent = pctrl->dev;
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chip->owner = THIS_MODULE;
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chip->of_node = pctrl->dev->of_node;
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chip->need_valid_mask = msm_gpio_needs_valid_mask(pctrl);
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ret = gpiochip_add_data(&pctrl->chip, pctrl);
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if (ret) {
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@ -831,6 +883,13 @@ static int msm_gpio_init(struct msm_pinctrl *pctrl)
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return ret;
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}
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ret = msm_gpio_init_valid_mask(chip, pctrl);
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if (ret) {
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dev_err(pctrl->dev, "Failed to setup irq valid bits\n");
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gpiochip_remove(&pctrl->chip);
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return ret;
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}
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ret = gpiochip_add_pin_range(&pctrl->chip, dev_name(pctrl->dev), 0, 0, chip->ngpio);
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if (ret) {
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dev_err(pctrl->dev, "Failed to add pin range\n");
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@ -288,6 +288,21 @@ struct gpio_chip {
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struct gpio_irq_chip irq;
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#endif
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/**
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* @need_valid_mask:
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*
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* If set core allocates @valid_mask with all bits set to one.
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*/
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bool need_valid_mask;
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/**
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* @valid_mask:
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*
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* If not %NULL holds bitmask of GPIOs which are valid to be used
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* from the chip.
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*/
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unsigned long *valid_mask;
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#if defined(CONFIG_OF_GPIO)
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/*
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* If CONFIG_OF is enabled, then all GPIO controllers described in the
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@ -384,6 +399,7 @@ bool gpiochip_line_is_open_source(struct gpio_chip *chip, unsigned int offset);
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/* Sleep persistence inquiry for drivers */
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bool gpiochip_line_is_persistent(struct gpio_chip *chip, unsigned int offset);
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bool gpiochip_line_is_valid(const struct gpio_chip *chip, unsigned int offset);
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/* get driver data */
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void *gpiochip_get_data(struct gpio_chip *chip);
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