[TG3]: PCI command adjustment
This patch changes the way the driver works with the PCI command register. It adjusts the access size from dwords to words. This patch is done both as a PCI configuration space cleanup and as preparatory work for PCI error recovery. Signed-off-by: Matt Carlson <mcarlson@broadcom.com> Signed-off-by: Michael Chan <mchan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -5029,10 +5029,7 @@ static int tg3_poll_fw(struct tg3 *tp)
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/* Save PCI command register before chip reset */
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static void tg3_save_pci_state(struct tg3 *tp)
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{
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u32 val;
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pci_read_config_dword(tp->pdev, TG3PCI_COMMAND, &val);
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tp->pci_cmd = val;
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pci_read_config_word(tp->pdev, PCI_COMMAND, &tp->pci_cmd);
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}
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/* Restore PCI state after chip reset */
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@ -5055,7 +5052,7 @@ static void tg3_restore_pci_state(struct tg3 *tp)
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PCISTATE_ALLOW_APE_SHMEM_WR;
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pci_write_config_dword(tp->pdev, TG3PCI_PCISTATE, val);
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pci_write_config_dword(tp->pdev, TG3PCI_COMMAND, tp->pci_cmd);
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pci_write_config_word(tp->pdev, PCI_COMMAND, tp->pci_cmd);
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if (!(tp->tg3_flags2 & TG3_FLG2_PCI_EXPRESS)) {
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pci_write_config_byte(tp->pdev, PCI_CACHE_LINE_SIZE,
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@ -2421,7 +2421,7 @@ struct tg3 {
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#define PHY_REV_BCM5411_X0 0x1 /* Found on Netgear GA302T */
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u32 led_ctrl;
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u32 pci_cmd;
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u16 pci_cmd;
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char board_part_number[24];
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#define TG3_VER_SIZE 32
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