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ARM: dts: armada-370: Fixup pcie DT warnings 

PCIe has a ranges property, so the unit name should contain an address.
Take the opportunity to use the node label instead of the full name.

Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
zero-colors
Gregory CLEMENT 2016-11-05 19:20:09 +01:00
parent 007d05d898
commit 8d977093bf
10 changed files with 124 additions and 122 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

37
arch/arm/boot/dts/armada-370-db.dts
View File

@ -170,24 +170,6 @@
};
};
};
pcie-controller {
status = "okay";
/*
* The two PCIe units are accessible through
* both standard PCIe slots and mini-PCIe
* slots on the board.
*/
pcie@1,0 {
/* Port 0, Lane 0 */
status = "okay";
};
pcie@2,0 {
/* Port 1, Lane 0 */
status = "okay";
};
};
};
sound {
@ -248,6 +230,25 @@
compatible = "linux,spdif-dir";
};
};
&pciec {
status = "okay";
/*
* The two PCIe units are accessible through
* both standard PCIe slots and mini-PCIe
* slots on the board.
*/
pcie@1,0 {
/* Port 0, Lane 0 */
status = "okay";
};
pcie@2,0 {
/* Port 1, Lane 0 */
status = "okay";
};
};
&mdio {
pinctrl-0 = <&mdio_pins>;
pinctrl-names = "default";

28
arch/arm/boot/dts/armada-370-dlink-dns327l.dts
View File

@ -72,20 +72,6 @@
MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000
MBUS_ID(0x09, 0x01) 0 0xf1100000 0x10000>;
pcie-controller {
status = "okay";
pcie@1,0 {
/* Port 0, Lane 0 */
status = "okay";
};
pcie@2,0 {
/* Port 1, Lane 0 */
status = "okay";
};
};
internal-regs {
sata@a0000 {
nr-ports = <2>;
@ -262,6 +248,20 @@
};
};
&pciec {
status = "okay";
pcie@1,0 {
/* Port 0, Lane 0 */
status = "okay";
};
pcie@2,0 {
/* Port 1, Lane 0 */
status = "okay";
};
};
&pinctrl {
sata_l_white_pin: sata-l-white-pin {
marvell,pins = "mpp57";

32
arch/arm/boot/dts/armada-370-mirabox.dts
View File

@ -64,22 +64,6 @@
MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000
MBUS_ID(0x09, 0x01) 0 0xf1100000 0x10000>;
pcie-controller {
status = "okay";
/* Internal mini-PCIe connector */
pcie@1,0 {
/* Port 0, Lane 0 */
status = "okay";
};
/* Connected on the PCB to a USB 3.0 XHCI controller */
pcie@2,0 {
/* Port 1, Lane 0 */
status = "okay";
};
};
internal-regs {
serial@12000 {
status = "okay";
@ -186,6 +170,22 @@
};
};
&pciec {
status = "okay";
/* Internal mini-PCIe connector */
pcie@1,0 {
/* Port 0, Lane 0 */
status = "okay";
};
/* Connected on the PCB to a USB 3.0 XHCI controller */
pcie@2,0 {
/* Port 1, Lane 0 */
status = "okay";
};
};
&mdio {
pinctrl-0 = <&mdio_pins>;
pinctrl-names = "default";

32
arch/arm/boot/dts/armada-370-netgear-rn102.dts
View File

@ -66,22 +66,6 @@
MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000
MBUS_ID(0x09, 0x01) 0 0xf1100000 0x10000>;
pcie-controller {
status = "okay";
/* Connected to Marvell 88SE9170 SATA controller */
pcie@1,0 {
/* Port 0, Lane 0 */
status = "okay";
};
/* Connected to FL1009 USB 3.0 controller */
pcie@2,0 {
/* Port 1, Lane 0 */
status = "okay";
};
};
internal-regs {
/* RTC is provided by Intersil ISL12057 I2C RTC chip */
@ -252,6 +236,22 @@
};
};
&pciec {
status = "okay";
/* Connected to Marvell 88SE9170 SATA controller */
pcie@1,0 {
/* Port 0, Lane 0 */
status = "okay";
};
/* Connected to FL1009 USB 3.0 controller */
pcie@2,0 {
/* Port 1, Lane 0 */
status = "okay";
};
};
&mdio {
pinctrl-0 = <&mdio_pins>;
pinctrl-names = "default";

32
arch/arm/boot/dts/armada-370-netgear-rn104.dts
View File

@ -66,22 +66,6 @@
MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000
MBUS_ID(0x09, 0x01) 0 0xf1100000 0x10000>;
pcie-controller {
status = "okay";
/* Connected to FL1009 USB 3.0 controller */
pcie@1,0 {
/* Port 0, Lane 0 */
status = "okay";
};
/* Connected to Marvell 88SE9215 SATA controller */
pcie@2,0 {
/* Port 1, Lane 0 */
status = "okay";
};
};
internal-regs {
/* RTC is provided by Intersil ISL12057 I2C RTC chip */
@ -270,6 +254,22 @@
};
};
&pciec {
status = "okay";
/* Connected to FL1009 USB 3.0 controller */
pcie@1,0 {
/* Port 0, Lane 0 */
status = "okay";
};
/* Connected to Marvell 88SE9215 SATA controller */
pcie@2,0 {
/* Port 1, Lane 0 */
status = "okay";
};
};
&mdio {
pinctrl-0 = <&mdio_pins>;
pinctrl-names = "default";

32
arch/arm/boot/dts/armada-370-rd.dts
View File

@ -77,22 +77,6 @@
MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000
MBUS_ID(0x09, 0x01) 0 0xf1100000 0x10000>;
pcie-controller {
status = "okay";
/* Internal mini-PCIe connector */
pcie@1,0 {
/* Port 0, Lane 0 */
status = "okay";
};
/* Internal mini-PCIe connector */
pcie@2,0 {
/* Port 1, Lane 0 */
status = "okay";
};
};
internal-regs {
serial@12000 {
status = "okay";
@ -229,6 +213,22 @@
};
};
&pciec {
status = "okay";
/* Internal mini-PCIe connector */
pcie@1,0 {
/* Port 0, Lane 0 */
status = "okay";
};
/* Internal mini-PCIe connector */
pcie@2,0 {
/* Port 1, Lane 0 */
status = "okay";
};
};
&mdio {
pinctrl-0 = <&mdio_pins>;
pinctrl-names = "default";

14
arch/arm/boot/dts/armada-370-seagate-nas-4bay.dts
View File

@ -28,13 +28,6 @@
compatible = "seagate,dart-4", "marvell,armada370", "marvell,armada-370-xp";
soc {
pcie-controller {
/* SATA AHCI controller 88SE9170 */
pcie@1,0 {
status = "okay";
};
};
internal-regs {
ethernet@74000 {
status = "okay";
@ -126,6 +119,13 @@
};
};
&pciec {
/* SATA AHCI controller 88SE9170 */
pcie@1,0 {
status = "okay";
};
};
&mdio {
phy1: ethernet-phy@1 {
reg = <1>;

19
arch/arm/boot/dts/armada-370-seagate-nas-xbay.dtsi
View File

@ -32,15 +32,6 @@
ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000>;
pcie-controller {
status = "okay";
/* USB 3.0 bridge ASM1042A */
pcie@2,0 {
status = "okay";
};
};
internal-regs {
serial@12000 {
status = "okay";
@ -199,6 +190,16 @@
};
};
&pciec {
status = "okay";
/* USB 3.0 bridge ASM1042A */
pcie@2,0 {
status = "okay";
};
};
&mdio {
pinctrl-0 = <&mdio_pins>;
pinctrl-names = "default";

18
arch/arm/boot/dts/armada-370-seagate-personal-cloud.dtsi
View File

@ -33,15 +33,6 @@
ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000>;
pcie-controller {
status = "okay";
/* USB 3.0 Bridge ASM1042A */
pcie@1,0 {
status = "okay";
};
};
internal-regs {
coherency-fabric@20200 {
broken-idle;
@ -134,6 +125,15 @@
};
};
&pciec {
status = "okay";
/* USB 3.0 Bridge ASM1042A */
pcie@1,0 {
status = "okay";
};
};
&mdio {
pinctrl-0 = <&mdio_pins>;
pinctrl-names = "default";

2
arch/arm/boot/dts/armada-370.dtsi
View File

@ -70,7 +70,7 @@
reg = <MBUS_ID(0x01, 0xe0) 0 0x100000>;
};
pciec: pcie-controller {
pciec: pcie-controller@82000000 {
compatible = "marvell,armada-370-pcie";
status = "disabled";
device_type = "pci";