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MGS-4073 [#ccc] Set GPU AHB CLK to 400M 

Set GPU AHB CLK to 400M to meet design requirement.

Date: 11th Jul, 2018
Signed-off-by: Ella Feng <ella.feng@nxp.com>
pull/10/head
Chenyan Feng 2018-07-12 01:15:03 +08:00 committed by Jason Liu
parent a57859f811
commit 921aafde16
1 changed files with 2 additions and 2 deletions
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4
arch/arm64/boot/dts/freescale/fsl-imx8mm.dtsi
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@ -1091,9 +1091,9 @@
"gpu2d_clk", "gpu2d_axi_clk",
"gpu2d_ahb_clk";
assigned-clocks = <&clk IMX8MM_CLK_GPU3D_SRC>, <&clk IMX8MM_CLK_GPU2D_SRC>, <&clk IMX8MM_CLK_GPU_AXI_SRC>, <&clk IMX8MM_CLK_GPU_AHB_SRC>,<&clk IMX8MM_GPU_PLL_OUT>;
assigned-clocks = <&clk IMX8MM_CLK_GPU3D_SRC>, <&clk IMX8MM_CLK_GPU2D_SRC>, <&clk IMX8MM_CLK_GPU_AXI_SRC>, <&clk IMX8MM_CLK_GPU_AHB_SRC>,<&clk IMX8MM_GPU_PLL_OUT>, <&clk IMX8MM_CLK_GPU_AHB_DIV>;
assigned-clock-parents = <&clk IMX8MM_GPU_PLL_OUT>,<&clk IMX8MM_GPU_PLL_OUT>, <&clk IMX8MM_SYS_PLL1_800M>, <&clk IMX8MM_SYS_PLL1_800M>;
assigned-clock-rates = <0>, <0>, <0>,<0>,<1000000000>;
assigned-clock-rates = <0>, <0>, <0>,<0>,<1000000000>, <400000000>;
power-domains = <&gpu_mix_pd>;