powerpc/booke64: Use SPRG7 for VDSO
Previously SPRG3 was marked for use by both VDSO and critical
interrupts (though critical interrupts were not fully implemented).
In commit 8b64a9dfb0
("powerpc/booke64:
Use SPRG0/3 scratch for bolted TLB miss & crit int"), Mihai Caraman
made an attempt to resolve this conflict by restoring the VDSO value
early in the critical interrupt, but this has some issues:
- It's incompatible with EXCEPTION_COMMON which restores r13 from the
by-then-overwritten scratch (this cost me some debugging time).
- It forces critical exceptions to be a special case handled
differently from even machine check and debug level exceptions.
- It didn't occur to me that it was possible to make this work at all
(by doing a final "ld r13, PACA_EXCRIT+EX_R13(r13)") until after
I made (most of) this patch. :-)
It might be worth investigating using a load rather than SPRG on return
from all exceptions (except TLB misses where the scratch never leaves
the SPRG) -- it could save a few cycles. Until then, let's stick with
SPRG for all exceptions.
Since we cannot use SPRG4-7 for scratch without corrupting the state of
a KVM guest, move VDSO to SPRG7 on book3e. Since neither SPRG4-7 nor
critical interrupts exist on book3s, SPRG3 is still used for VDSO
there.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Cc: Mihai Caraman <mihai.caraman@freescale.com>
Cc: Anton Blanchard <anton@samba.org>
Cc: Paul Mackerras <paulus@samba.org>
Cc: kvm-ppc@vger.kernel.org
This commit is contained in:
parent
82d86de25b
commit
9d378dfac8
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@ -46,9 +46,8 @@
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#define EX_CR (1 * 8)
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#define EX_R10 (2 * 8)
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#define EX_R11 (3 * 8)
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#define EX_R13 (4 * 8)
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#define EX_R14 (5 * 8)
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#define EX_R15 (6 * 8)
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#define EX_R14 (4 * 8)
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#define EX_R15 (5 * 8)
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/*
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* The TLB miss exception uses different slots.
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@ -36,19 +36,12 @@
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* *(r8 + GPR11) = saved r11
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*
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* 64-bit host
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* Expected inputs (GEN/GDBELL/DBG/MC exception types):
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* Expected inputs (GEN/GDBELL/DBG/CRIT/MC exception types):
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* r10 = saved CR
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* r13 = PACA_POINTER
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* *(r13 + PACA_EX##type + EX_R10) = saved r10
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* *(r13 + PACA_EX##type + EX_R11) = saved r11
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* SPRN_SPRG_##type##_SCRATCH = saved r13
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*
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* Expected inputs (CRIT exception type):
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* r10 = saved CR
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* r13 = PACA_POINTER
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* *(r13 + PACA_EX##type + EX_R10) = saved r10
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* *(r13 + PACA_EX##type + EX_R11) = saved r11
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* *(r13 + PACA_EX##type + EX_R13) = saved r13
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*
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* Expected inputs (TLB exception type):
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* r10 = saved CR
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@ -146,7 +146,7 @@ struct paca_struct {
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u8 io_sync; /* writel() needs spin_unlock sync */
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u8 irq_work_pending; /* IRQ_WORK interrupt while soft-disable */
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u8 nap_state_lost; /* NV GPR values lost in power7_idle */
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u64 sprg3; /* Saved user-visible sprg */
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u64 sprg_vdso; /* Saved user-visible sprg */
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#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
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u64 tm_scratch; /* TM scratch area for reclaim */
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#endif
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@ -577,9 +577,13 @@
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#define SPRN_SPRG3 0x113 /* Special Purpose Register General 3 */
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#define SPRN_USPRG3 0x103 /* SPRG3 userspace read */
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#define SPRN_SPRG4 0x114 /* Special Purpose Register General 4 */
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#define SPRN_USPRG4 0x104 /* SPRG4 userspace read */
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#define SPRN_SPRG5 0x115 /* Special Purpose Register General 5 */
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#define SPRN_USPRG5 0x105 /* SPRG5 userspace read */
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#define SPRN_SPRG6 0x116 /* Special Purpose Register General 6 */
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#define SPRN_USPRG6 0x106 /* SPRG6 userspace read */
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#define SPRN_SPRG7 0x117 /* Special Purpose Register General 7 */
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#define SPRN_USPRG7 0x107 /* SPRG7 userspace read */
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#define SPRN_SRR0 0x01A /* Save/Restore Register 0 */
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#define SPRN_SRR1 0x01B /* Save/Restore Register 1 */
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#define SRR1_ISI_NOPT 0x40000000 /* ISI: Not found in hash */
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@ -879,11 +883,10 @@
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* 64-bit embedded
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* - SPRG0 generic exception scratch
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* - SPRG2 TLB exception stack
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* - SPRG3 critical exception scratch and
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* CPU and NUMA node for VDSO getcpu (user visible)
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* - SPRG3 critical exception scratch (user visible, sorry!)
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* - SPRG4 unused (user visible)
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* - SPRG6 TLB miss scratch (user visible, sorry !)
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* - SPRG7 critical exception scratch
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* - SPRG7 CPU and NUMA node for VDSO getcpu (user visible)
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* - SPRG8 machine check exception scratch
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* - SPRG9 debug exception scratch
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*
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@ -940,6 +943,8 @@
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#define SPRN_SPRG_SCRATCH0 SPRN_SPRG2
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#define SPRN_SPRG_HPACA SPRN_HSPRG0
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#define SPRN_SPRG_HSCRATCH0 SPRN_HSPRG1
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#define SPRN_SPRG_VDSO_READ SPRN_USPRG3
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#define SPRN_SPRG_VDSO_WRITE SPRN_SPRG3
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#define GET_PACA(rX) \
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BEGIN_FTR_SECTION_NESTED(66); \
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@ -983,6 +988,8 @@
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#define SPRN_SPRG_TLB_SCRATCH SPRN_SPRG6
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#define SPRN_SPRG_GEN_SCRATCH SPRN_SPRG0
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#define SPRN_SPRG_GDBELL_SCRATCH SPRN_SPRG_GEN_SCRATCH
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#define SPRN_SPRG_VDSO_READ SPRN_USPRG7
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#define SPRN_SPRG_VDSO_WRITE SPRN_SPRG7
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#define SET_PACA(rX) mtspr SPRN_SPRG_PACA,rX
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#define GET_PACA(rX) mfspr rX,SPRN_SPRG_PACA
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@ -253,7 +253,7 @@ int main(void)
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DEFINE(PACA_SYSTEM_TIME, offsetof(struct paca_struct, system_time));
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DEFINE(PACA_TRAP_SAVE, offsetof(struct paca_struct, trap_save));
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DEFINE(PACA_NAPSTATELOST, offsetof(struct paca_struct, nap_state_lost));
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DEFINE(PACA_SPRG3, offsetof(struct paca_struct, sprg3));
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DEFINE(PACA_SPRG_VDSO, offsetof(struct paca_struct, sprg_vdso));
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#endif /* CONFIG_PPC64 */
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/* RTAS */
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@ -55,7 +55,6 @@
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mfspr r13,SPRN_SPRG_PACA; /* get PACA */ \
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std r10,PACA_EX##type+EX_R10(r13); \
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std r11,PACA_EX##type+EX_R11(r13); \
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PROLOG_STORE_RESTORE_SCRATCH_##type; \
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mfcr r10; /* save CR */ \
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mfspr r11,SPRN_##type##_SRR1;/* what are we coming from */ \
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DO_KVM intnum,SPRN_##type##_SRR1; /* KVM hook */ \
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@ -116,20 +115,6 @@
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#define GDBELL_EXCEPTION_PROLOG(n, intnum, addition) \
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EXCEPTION_PROLOG(n, intnum, GDBELL, addition##_GDBELL(n))
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/*
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* Store user-visible scratch in PACA exception slots and restore proper value
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*/
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#define PROLOG_STORE_RESTORE_SCRATCH_GEN
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#define PROLOG_STORE_RESTORE_SCRATCH_GDBELL
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#define PROLOG_STORE_RESTORE_SCRATCH_DBG
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#define PROLOG_STORE_RESTORE_SCRATCH_MC
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#define PROLOG_STORE_RESTORE_SCRATCH_CRIT \
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mfspr r10,SPRN_SPRG_CRIT_SCRATCH; /* get r13 */ \
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std r10,PACA_EXCRIT+EX_R13(r13); \
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ld r11,PACA_SPRG3(r13); \
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mtspr SPRN_SPRG_CRIT_SCRATCH,r11;
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/* Variants of the "addition" argument for the prolog
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*/
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#define PROLOG_ADDITION_NONE_GEN(n)
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mtcr r10
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ld r10,PACA_EXCRIT+EX_R10(r13) /* restore registers */
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ld r11,PACA_EXCRIT+EX_R11(r13)
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ld r13,PACA_EXCRIT+EX_R13(r13)
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mfspr r13,SPRN_SPRG_CRIT_SCRATCH
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rfci
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/* Normal debug exception */
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/* Now we mash up things to make it look like we are coming on a
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* normal exception
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*/
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ld r15,PACA_EXCRIT+EX_R13(r13)
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mfspr r15,SPRN_SPRG_CRIT_SCRATCH
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mtspr SPRN_SPRG_GEN_SCRATCH,r15
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mfspr r14,SPRN_DBSR
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EXCEPTION_COMMON(0xd00, PACA_EXCRIT, INTS_DISABLE)
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@ -715,8 +715,8 @@ int vdso_getcpu_init(void)
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unsigned long cpu, node, val;
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/*
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* SPRG3 contains the CPU in the bottom 16 bits and the NUMA node in
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* the next 16 bits. The VDSO uses this to implement getcpu().
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* SPRG_VDSO contains the CPU in the bottom 16 bits and the NUMA node
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* in the next 16 bits. The VDSO uses this to implement getcpu().
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*/
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cpu = get_cpu();
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WARN_ON_ONCE(cpu > 0xffff);
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WARN_ON_ONCE(node > 0xffff);
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val = (cpu & 0xfff) | ((node & 0xffff) << 16);
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mtspr(SPRN_SPRG3, val);
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get_paca()->sprg3 = val;
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mtspr(SPRN_SPRG_VDSO_WRITE, val);
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get_paca()->sprg_vdso = val;
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put_cpu();
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@ -29,7 +29,7 @@
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*/
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V_FUNCTION_BEGIN(__kernel_getcpu)
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.cfi_startproc
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mfspr r5,SPRN_USPRG3
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mfspr r5,SPRN_SPRG_VDSO_READ
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cmpdi cr0,r3,0
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cmpdi cr1,r4,0
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clrlwi r6,r5,16
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@ -29,7 +29,7 @@
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*/
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V_FUNCTION_BEGIN(__kernel_getcpu)
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.cfi_startproc
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mfspr r5,SPRN_USPRG3
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mfspr r5,SPRN_SPRG_VDSO_READ
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cmpdi cr0,r3,0
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cmpdi cr1,r4,0
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clrlwi r6,r5,16
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@ -75,8 +75,8 @@ BEGIN_FTR_SECTION
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END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_207S)
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/* Restore SPRG3 */
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ld r3,PACA_SPRG3(r13)
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mtspr SPRN_SPRG3,r3
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ld r3,PACA_SPRG_VDSO(r13)
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mtspr SPRN_SPRG_VDSO_WRITE,r3
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/* Reload the host's PMU registers */
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ld r3, PACALPPACAPTR(r13) /* is the host using the PMU? */
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@ -153,8 +153,8 @@ kvm_start_lightweight:
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* Reload kernel SPRG3 value.
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* No need to save guest value as usermode can't modify SPRG3.
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*/
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ld r3, PACA_SPRG3(r13)
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mtspr SPRN_SPRG3, r3
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ld r3, PACA_SPRG_VDSO(r13)
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mtspr SPRN_SPRG_VDSO_WRITE, r3
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#endif /* CONFIG_PPC_BOOK3S_64 */
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/* R7 = vcpu */
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@ -229,11 +229,7 @@
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stw r10, VCPU_CR(r4)
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PPC_STL r11, VCPU_GPR(R4)(r4)
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PPC_STL r5, VCPU_GPR(R5)(r4)
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.if \type == EX_CRIT
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PPC_LL r5, (\paca_ex + EX_R13)(r13)
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.else
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mfspr r5, \scratch
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.endif
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PPC_STL r6, VCPU_GPR(R6)(r4)
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PPC_STL r8, VCPU_GPR(R8)(r4)
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PPC_STL r9, VCPU_GPR(R9)(r4)
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@ -435,10 +431,16 @@ _GLOBAL(kvmppc_resume_host)
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PPC_STL r5, VCPU_LR(r4)
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mfspr r7, SPRN_SPRG5
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stw r3, VCPU_VRSAVE(r4)
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#ifdef CONFIG_64BIT
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PPC_LL r3, PACA_SPRG_VDSO(r13)
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#endif
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PPC_STD(r6, VCPU_SHARED_SPRG4, r11)
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mfspr r8, SPRN_SPRG6
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PPC_STD(r7, VCPU_SHARED_SPRG5, r11)
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mfspr r9, SPRN_SPRG7
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#ifdef CONFIG_64BIT
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mtspr SPRN_SPRG_VDSO_WRITE, r3
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#endif
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PPC_STD(r8, VCPU_SHARED_SPRG6, r11)
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mfxer r3
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PPC_STD(r9, VCPU_SHARED_SPRG7, r11)
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