amd64_edac: Fix K8 chip select reporting
This basically reverts603adaf6b3
("amd64_edac: fix K8 chip select reporting") because it was a clumsy workaround for DIMM sizes reporting on K8 which got superceded by a much more correct one with41d8bfaba7
("amd64_edac: Improve DRAM address mapping") without removing the prior one. Remove it now finally. Reported-by: Josh Hunt <johunt@akamai.com> Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
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@ -1596,14 +1596,11 @@ static void f1x_map_sysaddr_to_csrow(struct mem_ctl_info *mci, u64 sys_addr,
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*/
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*/
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static void amd64_debug_display_dimm_sizes(struct amd64_pvt *pvt, u8 ctrl)
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static void amd64_debug_display_dimm_sizes(struct amd64_pvt *pvt, u8 ctrl)
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{
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{
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int dimm, size0, size1, factor = 0;
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int dimm, size0, size1;
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u32 *dcsb = ctrl ? pvt->csels[1].csbases : pvt->csels[0].csbases;
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u32 *dcsb = ctrl ? pvt->csels[1].csbases : pvt->csels[0].csbases;
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u32 dbam = ctrl ? pvt->dbam1 : pvt->dbam0;
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u32 dbam = ctrl ? pvt->dbam1 : pvt->dbam0;
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if (boot_cpu_data.x86 == 0xf) {
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if (boot_cpu_data.x86 == 0xf) {
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if (pvt->dclr0 & WIDTH_128)
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factor = 1;
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/* K8 families < revF not supported yet */
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/* K8 families < revF not supported yet */
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if (pvt->ext_model < K8_REV_F)
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if (pvt->ext_model < K8_REV_F)
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return;
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return;
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@ -1634,8 +1631,8 @@ static void amd64_debug_display_dimm_sizes(struct amd64_pvt *pvt, u8 ctrl)
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DBAM_DIMM(dimm, dbam));
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DBAM_DIMM(dimm, dbam));
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amd64_info(EDAC_MC ": %d: %5dMB %d: %5dMB\n",
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amd64_info(EDAC_MC ": %d: %5dMB %d: %5dMB\n",
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dimm * 2, size0 << factor,
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dimm * 2, size0,
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dimm * 2 + 1, size1 << factor);
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dimm * 2 + 1, size1);
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}
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}
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}
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}
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