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MLK-19153-1 ARM: dts: update new "fsl,tx-d-cal" property

Using new "fsl,tx-d-cal" for dts, and update document accordingly.

Acked-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
pull/10/head
Peter Chen 2018-08-08 09:02:33 +08:00 committed by Jason Liu
parent e723b8f2c3
commit c3c54434d6
7 changed files with 12 additions and 15 deletions

View File

@ -23,9 +23,6 @@ Optional properties:
that terminates the DP output signal. Default: 45
- fsl,tx-d-cal: Integer [79-119]. Current trimming value (as a percentage) of
the 17.78mA TX reference current. Default: 100
- tx-d-cal: Try to adjust this value to improve signal quality, and pass
USB Certification, the value is from 0x0 to 0xf, and the register offset
is 0x10 (USBPHY_TX).
Example:
usbphy1: usbphy@020c9000 {
@ -33,5 +30,5 @@ usbphy1: usbphy@020c9000 {
reg = <0x020c9000 0x1000>;
interrupts = <0 44 0x04>;
fsl,anatop = <&anatop>;
tx-d-cal = <0x5>;
fsl,tx-d-cal = <106>;
};

View File

@ -568,11 +568,11 @@
};
&usbphy1 {
tx-d-cal = <0x5>;
fsl,tx-d-cal = <106>;
};
&usbphy2 {
tx-d-cal = <0x5>;
fsl,tx-d-cal = <106>;
};
&usdhc2 {

View File

@ -1090,11 +1090,11 @@
};
&usbphy1 {
tx-d-cal = <0x5>;
fsl,tx-d-cal = <106>;
};
&usbphy2 {
tx-d-cal = <0x5>;
fsl,tx-d-cal = <106>;
};
&usdhc2 {

View File

@ -933,11 +933,11 @@
};
&usbphy1 {
tx-d-cal = <0x5>;
fsl,tx-d-cal = <106>;
};
&usbphy2 {
tx-d-cal = <0x5>;
fsl,tx-d-cal = <106>;
};
&usdhc1 {

View File

@ -83,9 +83,9 @@
};
&usbphy1 {
tx-d-cal = <0x5>;
fsl,tx-d-cal = <106>;
};
&usbphy2 {
tx-d-cal = <0x5>;
fsl,tx-d-cal = <106>;
};

View File

@ -723,11 +723,11 @@
};
&usbphy1 {
tx-d-cal = <0x5>;
fsl,tx-d-cal = <106>;
};
&usbphy2 {
tx-d-cal = <0x5>;
fsl,tx-d-cal = <106>;
};
&usdhc1 {

View File

@ -537,7 +537,7 @@
};
&usbphy1 {
tx-d-cal = <0xc>;
fsl,tx-d-cal = <88>;
};
&usdhc0 {