powerpc: Repair device bindings documentation
Commitd0fc2eaaf4
"powerpc/fsl: Refactor device bindings" split out a number of device bindings from booting-without-of.txt into separate files. Having them all in one file was a frequent source of merge conflicts. However, in the next merge,49997d7515
, there was another conflict. Some of the bindings removed from booting-without-of.txt were mistakenly added back in and the copies in dts-bindings were kept as well. This patch re-removes "Freescale Display Interface" and "Freescale on board FPGA" and fixes the table of contents. Signed-off-by: Trent Piepho <tpiepho@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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@ -41,25 +41,14 @@ Table of Contents
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VI - System-on-a-chip devices and nodes
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VI - System-on-a-chip devices and nodes
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1) Defining child nodes of an SOC
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1) Defining child nodes of an SOC
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2) Representing devices without a current OF specification
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2) Representing devices without a current OF specification
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a) MDIO IO device
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a) PHY nodes
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b) Gianfar-compatible ethernet nodes
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b) Interrupt controllers
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c) PHY nodes
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c) CFI or JEDEC memory-mapped NOR flash
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d) Interrupt controllers
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d) 4xx/Axon EMAC ethernet nodes
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e) I2C
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e) Xilinx IP cores
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f) Freescale SOC USB controllers
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f) USB EHCI controllers
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g) Freescale SOC SEC Security Engines
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g) MDIO on GPIOs
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h) Board Control and Status (BCSR)
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h) SPI busses
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i) Freescale QUICC Engine module (QE)
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j) CFI or JEDEC memory-mapped NOR flash
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k) Global Utilities Block
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l) Freescale Communications Processor Module
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m) Chipselect/Local Bus
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n) 4xx/Axon EMAC ethernet nodes
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o) Xilinx IP cores
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p) Freescale Synchronous Serial Interface
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q) USB EHCI controllers
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r) MDIO on GPIOs
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s) SPI busses
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VII - Marvell Discovery mv64[345]6x System Controller chips
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VII - Marvell Discovery mv64[345]6x System Controller chips
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1) The /system-controller node
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1) The /system-controller node
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@ -1830,41 +1819,7 @@ platforms are moved over to use the flattened-device-tree model.
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big-endian;
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big-endian;
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};
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};
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r) Freescale Display Interface Unit
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g) MDIO on GPIOs
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The Freescale DIU is a LCD controller, with proper hardware, it can also
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drive DVI monitors.
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Required properties:
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- compatible : should be "fsl-diu".
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- reg : should contain at least address and length of the DIU register
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set.
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- Interrupts : one DIU interrupt should be describe here.
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Example (MPC8610HPCD)
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display@2c000 {
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compatible = "fsl,diu";
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reg = <0x2c000 100>;
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interrupts = <72 2>;
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interrupt-parent = <&mpic>;
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};
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s) Freescale on board FPGA
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This is the memory-mapped registers for on board FPGA.
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Required properities:
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- compatible : should be "fsl,fpga-pixis".
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- reg : should contain the address and the lenght of the FPPGA register
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set.
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Example (MPC8610HPCD)
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board-control@e8000000 {
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compatible = "fsl,fpga-pixis";
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reg = <0xe8000000 32>;
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};
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r) MDIO on GPIOs
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Currently defined compatibles:
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Currently defined compatibles:
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- virtual,gpio-mdio
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- virtual,gpio-mdio
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@ -1884,7 +1839,7 @@ platforms are moved over to use the flattened-device-tree model.
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&qe_pio_c 6>;
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&qe_pio_c 6>;
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};
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};
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s) SPI (Serial Peripheral Interface) busses
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h) SPI (Serial Peripheral Interface) busses
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SPI busses can be described with a node for the SPI master device
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SPI busses can be described with a node for the SPI master device
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and a set of child nodes for each SPI slave on the bus. For this
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and a set of child nodes for each SPI slave on the bus. For this
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