The POWER_SUPPLY_PROP_CURRENT_MAX is used to set max current draw on CHGIN,
and the new POWER_SUPPLY_PROP_CURRENT_MAX2 (added to power-supply core for
this purpose) is used to set max current draw on WCIN.
In order for the MAX77818 driver to be able to set the max current separately
for the two VBUS lines, a new property was added (POWER_SUPPLY_PROP_CURRENT_MAX2),
enabling POWER_SUPPLY_PROP_CURRENT_MAX to configure USB1 max current draw and
POWER_SUPPLY_PROP_CURRENT_MAX2 to configure USB2 max current respectively.
The max77818-charger driver is used to set updated max current on given
interface, flipping the FGCC bit appropriately to enable charger device config
temporarily.
- Remove duplicate code for reading and writing vcom voltage
- Don't interrupt resume command if vcom not set
- Add sysfs attribute for setting vcom runtime (HACK)
- Make regulator microvolts return microvolts (was millivolts)
- Remove i2c based PGOOD usage to simplify code
- Reduce timeout value to 100ms
- Add mutex locking for enable/disable, so they don't confuse each other
- Register GPIO before regulator, to avoid race
In order to reduce the overhead as much as possible in the wait loop, the
PGOOD GPIO is used if given in devicetree. If not, the wait loop reads the
FAULT FLAG register to obtain the PGOOD status.
In order to make sure that all the rails are valid from the EPD PMIC when
sending new frames to the EPD, a wait loop has been introduced in the
regulator enable op waiting max 500 ms for PWR GOOD signal from EPD PMIC
before returning from the enable op.
The lcdif driver can then check the return code from the regulator_enable
call and if good, all the EPD power rails are ready.
This reverts commit 95f5a6b816857ad5b607a1be25cb41ce7c4ff4b2.
Caused a two second delay before the touch screen would
work after using the pen. Disturbed the gestures.
When going into LPSR sleep, the power is taken from the GPIO bank used for the
charge state GPIOs.
When returning from LPSR sleep, the GPIO pinctrl state has to be re-initialized
in order to enable the internal pull-up.
As the GPIOs are used as inputs and no other initialization is done during the
initial probe/init of the driver, no further action is required.
Add support for recognizing all expected read back charger_mode values.
Remove unwanted side-effect causing charger_mode to be written when
unrecognized value is read back.
When reading back charger_mode and the batery is (nearly) full,
the read back charger_mode from the charger device is not necessarily the same
as the written value due to internal states being triggered by current state
if charge. A mode 0x05 (Charger) written might yield a read back value of 0x04,
which is ok when the capacity is 100% but still an indication that the charger_mode
is set to "Charger".
Also when writing mode 0x00 (Off), the read back value might yield 0x01..0x03,
which has to be accepted as "Off".
Add post_fgcc_change_delay_us module parameter with default value
100000 us.
Move delay into FGCC enable/disable function.
Add delay both after FGCC enable and disable.
Differentiate SNVS button click time for LPSR sleep
and power on:
Power off -> On - 500ms
LPSR Sleep -> Wake-up - 50ms
Turn off GPIO wake-up hack when not in LPSR sleep
This reverts commit cc7fffa6e20c6b90568f745c51e6f33e0b91c694.
Code is moved to pm-imx7.
We want to have 500ms ON_TIME for power on, and
50ms ON_TIME from LPSR sleep
This reverts commit a5410575ebbde14b55f66af5782779f31e14efe7.
Caused some partial updates, and touch didn't work for a couple of
seconds after boot when waiting for firmware update.
As the dpacc and dqacc registers change over time, these are skipped in addition
to other learned values to prevent them from being overwritten on every boot.
Unlock and re-lock of extra config registers were separated into common
functions to be used both in initial write_custom_params and new verify/write
routine.
Verification of the RelaxCfg register was also added to the new verify/write routine.
- Set 'verify' as the default config-update mode
- Add flag in max77818_of_property (is_learned_value) in order to prevent config
values given in DT as initial values that is expected to change from being
reset when device reboots and params are synced to curent DT.
The power_supply get_property handler is protected by a flag indicating
when the config init/update thread is complete, but this flag was not
synchronized.
In addition to this, the flag is now cleared before the driver is registered
as a power_supply device to properly tell the power_supply initiation to wait.
Add module parameter enabling complete FG config rewrite from DT or
only custom params update from DT depending on what is required.
The driver may be given either "max77818_battery.config_update=complete" or
"max77818_battery.config_update=partial" respectively through the kernel commandline
from u-boot.
Versioning scheme may then be implemented outside of the kernel if required,
and which update to apply to a given device will then be chosen by update scripts.
It adds a separate dts/dtb for wifi calibration, which works with BCMDHD
wifi driver instead of BRCMFMAC. Comparing to mainstream zero-sugar.dts,
it adds 'wifi-host' property for SDIO slot and deletes bcrmf child node
from there, as the node is only required by BRCMFMAC driver.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
To make the change history clear, let's copy zero-sugar_defconfig as
zero-sugar-wifi-cal_defconfig with zero change first, and make necessary
changes on top of it later.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
As the first step of syncing up with mainstream dts and defconfig, let's
remove the outdated versions and add updated ones back later.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
It operates on GPIO DIGITIZER_PWR_EN via regulator API to turn off
VDD_3V3_DIGITIZER for 'mem' sleep. While at it, let's call pinctrl
functions and wacom_setup_device() for 'mem' sleep only, as they are not
required for 'standby' sleep.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
To get GPIO1/2 LPSR wakeup work, we have commit 57673afb8d27 ("zero-sugar:
init SNVS for LPSR GPIO wakeup") in U-Boot to set bit 7 of SNVS register
0x48. Unfortunately, it brings us a side effect, that is setting TOP
(Turn off System Power) bit of SNVS LPCR register results in an immeidate
reset instead of poweroff. To work around the issue, let's clear the bit
right before setting TOP bit for powering system off.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
In order to read the current GPIO state regardless of the current controller
mode, and thus regardless of whether the GPIO irq is enabled, a direct
read of the raw GPIO state is done directly from the sysfs attribute_show
method.
Required synchronization was added to the access method to prevent race
if the attribute is read at the same time the irq handler is running.
Steinar Bakkemo