Pinctrl support of a device tree property "pinctrl-assert-gpios"
under client device node to select function at a board level pin
multiplexer. The pin route is controlled by a GPIO or i2c/spi expander
GPIO.
For i2c/spi expander GPIO, it may be loaded after client device that
set "pinctrl-assert-gpios" property in devicetree. Then the client device's
pin function doesn't work.
So it should add defer probe check for the GPIO pin.
Acked-by: Leonard Crestez <leonard.crestez@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
MIPI DSI panel also has a touch, this patch add the touch
support for fsl-imx8mm-evk board.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
(cherry picked from commit 8246c3148e07eeda05b5b375819c06bde0a80824)
After supporting DISPMIX power domain, the LCDIF runtime
resume callback always write '0' to 'LCDIF_CTRL' register
which will clear previous pixel format related setting.
So the previous condition by comparing format change for
setting pixel format during plane atomic update is not
true anymore.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit 5f84c69799456f28fd8182fd156e9067921e9a4e)
According to a lot of tests, for long packet send, the packet
payload transfer done interrupt will be triggered no later than
the packet header transfer done interrupt. So, to make sure the
long packet has been send to the peripheral completely, wait
'ph_tx_done' interrupt instead of 'pl_tx_done' for long packet
transfer. Otherwise it may cause subsequent packet transfer
failed sometimes.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit 69a5f44025c6ecb2fee16c1650a81198b501f284)
Add runtime PM status check during runtime suspend and resume
to avoid unnecessary jobs if it is already in that state which
can avoid possible kernel warnings of clock disable/unprepare
mismatch during system suspend if it is alreay in runtime
suspended state.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit 6f95c6fdc0de2fd4fe1d835c164f5e3cfb23e17d)
Implement the suspend()/resume() callbacks to support system
power management functions for SEC DSIM.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit db3e9faa0278af6de5aaac008478123d0ebecb73)
After the DISPMIX power domain enabled, all the related registers
will drop their values once runtime pm suspend called. So in the
pm runtime resume process, the SEC DSIM de-reset and some init jobs
need to be done, and these jobs are no longer necessary to be done
during probe bind anymore.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit 7a7f17f5fb66135629ef20a2b4780dfef2f0f0ce)
Implement the suspend()/resume() callbacks to support system
power management functions for LCDIF.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit 7e00487012753cb370eab4ff5c05f76f7361297f)
After the DISPMIX power domain enabled, all the related registers
will drop their values once runtime pm suspend called. So in the
pm runtime resume process, the LCDIF de-reset and some init jobs
need to be done, and these jobs are no longer necessary to be done
during probe stage anymore.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit f83aaaecaeb54d8b1231be2cb7175ce58682dae7)
The devices in the device tree are registered in the
top-down order. But when system suspend entered, the
device tree is walked in a bottom-up order to suspend
devices. So change the display device nodes register
order to be:
LCDIF -> SEC DSIM -> Display Subsystem
Since in display subystem, it will disable the whole
display pipeline. So this should be first suspended
before LCDIF and SEC DSIM. And besides, the SEC DSIM
is better to be suspended before LCDIF which is the
same with the sequence for display pipeline disables.
And when system resume entered, the devices resume
sequence is:
LCDIF -> SEC DSIM -> Display Subsystem
Which is a top-down order and is the correct sequence
for display devices resume.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit 4ce74783e6a50898a433372f5968175b20d4ef0c)
Add a new property 'video-mode' binding for panel rm67191
which is used to specify a video data transfer mode.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit 9dba8643d7b9c73a2b20ef517c79bb799f5ade3d)
Change the maximum height limitation to 1920 to support
'1080x1920' resolution mode. It is a temporary work
around and will be improved later.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit 44d0209e97e0c574af30dd7a7d7e059d4ddf996d)
Try to get the 'video-mode' property from dtb to guide
the required video mode configuration. The possible video
modes are:
0. Burst mode
1. Non-burst mode with sync event
2. Non-burst mode with sync pulse
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit e920436e2174d72eac28f0fb09f1fcdc68add9d9)
Create a new dts 'fsl-imx8mm-evk-rm67191.dts' to support panel
'RM67191' display which is attached to DSIM controller directly.
So the corresponding panel device node is defined as the child
of 'mipi_dsi' node under the DRM DSI framework. Since the
'adv_bridge' and 'RM67191' should be enabled exclusively, so
disable 'adv_bridge' when enable 'RM67191'.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit ae1d6107c2caa6af50e3fdd512218d5348d6e00c)
Add a different '#address-cells' and '#size-cells' properties
definition for incoming possible panel child node.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit ccaa041b96a3124521f02c1e3d223890e659433b)
This patch adds mipi panel enable/disable during the dsim
bridge enable/disable procedure and implements required
callbacks and helper functions for dsi panel peripheral
support.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit 4ef0a4e4ba0faca91e5b556fd13483aafdb64519)
The current timeout values for 'BTA' and 'LPRX' in register
'DSIM_TIMEOUT' is not long enough for some dsi peripherals,
so increase them long enough for all current peripherals to
avoid timeout errors generation in some cases.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit 8e2b86b317382635e74002a5b2a466804247e61a)
The macro 'CONFIG_NON_CONTINUOUS_CLOCK_LANE' has been misspelt
to 'CONFIG_NON_CONTINOUS_CLOCK_LANE'. So correct it.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit 24a05825b7299fc2f60768468fafbbc9a33804ad)
All the DSIM fifo pointers should be better to be put into the
initialized state before enabling DSIM to transfer commands or
data.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit 1c1624e48c83623a538f4af862367e6b3cbf8d67)
According to the DSIM specification, the 'DSIM_FIFOCTRL'
register addr offset should be '0x4c' instead of '0x48'.
So correct it.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit 31850816f3aea109aff6c4bbcb44221e7d74afb5)
When the attached dsi device does not use all the data lanes
to transfer data, data lanes stop state check should only
check the lanes used precisely, since unused lanes state is
not guaranteed to be in some stable state.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit 6787ee8505ab16bf7bba38c721da0bfa87e9de0e)
When a dsi device who is neither a bridge nor a panel requests
to be attached to the host, refuse this request directly.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit 2e80acc8a611327fcc77d2e73515bc062cdc4233)
During the mode set procedure, some dsi client device may detach
itself first and then attach it again according to the target
display mode parameters. In this case, the dsi client device
should be allowed to be re-attached again. So this is also true
for panel device.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit f586625dd1a665c58b976405c7980b7414554481)
When the dsi device is detached, the dsi parameters saved when
the dsi device is attached should be cleaned to avoid to be
misused. And besides, add some sanity check along with this
cleanup.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit a02c30a0ed8acc4a136d2281431fa4b07d66b933)
Obviously, according to the drm_bridge_attach()'s definition,
the passing arguments of its function call should be corrected
here.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Sync operating frequencies for A72 as per latest 8QM datasheet.
Signed-off-by: Teo Hall <teo.hall@nxp.com>
(cherry picked from commit 1f9b64ca93014852e42d8e34766f003c361e829b)
MU is shared between rpmsg driver and the multi-core
power management on i.MX6SX and i.MX7D, the RIE3 is
enabled by MU driver, but when rpmsg is probed, it
will call MU_Init and RIE3 will be clear and cause
multi-core power management never work, so do NOT
clear RIEn during MU initialization for i.MX6SX and
i.MX7D.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
only add the padding pages for user pageable memory,
Revert "MGS-4022 [#imx-1070] fix kernel panic with opencl test_buffers"
This reverts commit 9253786bcfd2fa17132c5057a18eb75b10ea3336.
Signed-off-by: Xianzhong <xianzhong.li@nxp.com>
With the commit c5592424ba05 ("MLK-18368-2: ASoC: fsl: support
hdmi rx in machine driver"), hdmi-out/hdmi-in need to specified
in dts.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
The DCSS RM states that the maximum upscale ratio is 1:8. However, DCSS
HW team suggested some time back that upscale ratios of 1:16 could be
achieved with DCSS scaler, though these ratios were not validated.
Unfortunately there are corner cases, when the upscale ratio nears
1:16, that fail. At the recommendation of DCSS designers, we revert the
maximum ratio to 1:8 until further notice.
Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
(cherry picked from commit bafb5a9481c289951872923d4bbbbcf24a8910b5)
Add SAI1 PDM pin definitions for imx8mm SoC.
Signed-off-by: Adrian Alonso <adrian.alonso@nxp.com>
(cherry picked from commit 1ada53b6b48dc6e7360b75403bd0796b4bf52cf9)
Correct the power domain device node on i.MX8MM. the older one is
removed, add the updated one for it.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
(cherry picked from commit 8a88ee0404665edc11bee2e692235239f5faa21a)
Set default colorspace value in v4l2_ioctl_try_fmt()
Signed-off-by: Zhou Peng <eagle.zhou@nxp.com>
(cherry picked from commit 52221438736a3ede393ba1682eadc292d3a73977)
fix read buffer fence node for hw copy,
add cpu cache line check for write buffer,
invalidate cache after pipeline complete,
flush head and tail pages for user memory.
fix 630a849f3a4087a98b0425c261f474d178150307
"MGS-3255-39 [#ccc] fix opencl cache issue"
Signed-off-by: Xianzhong <xianzhong.li@nxp.com>
the user memory will add the padding pages to meet hardware alignment,
need set non-contiguous flag to avoid contigous mapping in GPU MMU.
Signed-off-by: Xianzhong <xianzhong.li@nxp.com>
Add x/y coordinate diagonal rotation support, user can use this feature
by add "synaptics,diagonal-rotation" in dts.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
(cherry picked from commit 10c98865e5d1f0b7938523c793165e72add39f10)
According to RM, usdhc 100MHz pad setting need to set SRE(slew rate
field) to 0x01(Medium Frequency Slew Rate 100MHz), usdhc 200MHz pad
setting need to set SRE to 0x11(Max Frequency Slew Rate 200MHz).
Without this patch, eMMC HS400 will meet timeout/crc error when the
temperature is over 80 degree celsius.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
(cherry picked from commit bda547bad6f8fc2de3355625da243d4fd513f15a)
No need to enable IMX7D_NAND_USDHC_BUS_ROOT_CLK during the imx7d clock
driver init, so remove it from the clks_init_on[].
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
(cherry picked from commit d63d8a2d501ddc93a3406111134242090a713c4a)
No need to enable IMX8MQ_CLK_NAND_USDHC_BUS_CG during the imx8mq clock driver
init, so remove it from the clks_init_on[].
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
(cherry picked from commit 6c90e1bfc38eab27921d26b1218993e5cd52a425)
No need to enable IMX8MM_CLK_NAND_USDHC_BUS_CG during the imx8mm clock driver
init, so remove it from the clks_init_on[].
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
(cherry picked from commit 7a8f9c1917dec30fc37b6b8ea74461e80ecdbc30)
According to RM, usdhc 100MHz pad setting need to set SRE(slew rate
field) to 0x01(Medium Frequency Slew Rate 100MHz), usdhc 200MHz pad
setting need to set SRE to 0x11(Max Frequency Slew Rate 200MHz).
Without this patch, eMMC HS400 will meet timeout/crc error when the
temperature is over 80 degree celsius.
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
(cherry picked from commit fb0ca42366246e7a731cc3e4cd7123d8d6334c9a)
Conflicts:
arch/arm64/boot/dts/freescale/fsl-imx8mq-evk.dts
No need to enable IMX8MQ_CLK_AUDIO_AHB_DIV during imx8mq clock
driver init, so remove it from the clks_init_on[].
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
(cherry picked from commit b13900ec3296f579f54581483858cc053d2bbff3)
Andy Duan