Bank0/Bank1 are not in ECC mode, so no need to check.
Each bank contains 8 words, so we check (phy_index > 15).
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Add ULP1 OTP support.
No timing required for ULP1 OTP.
The CTRL_ADDR is 8 bits width.
When finished access to OTP, gate the power to OTP memory to save power.
Fix store, when invalid args, not return 0, but return the error values.
To ULP, fuse only support being programmed once, so add a check before
program.
Test log:
root@imx6qdlsolo:/sys/fsl_otp# cat HW_OCOTP_GP84
0x0
root@imx6qdlsolo:/sys/fsl_otp# echo 1 > HW_OCOTP_GP84
root@imx6qdlsolo:/sys/fsl_otp# cat HW_OCOTP_GP84
0x1
root@imx6qdlsolo:/sys/fsl_otp# echo 1 > HW_OCOTP_GP84
-sh: echo: write error: Operation not permitted
root@imx6qdlsolo:/sys/fsl_otp# echo fg > HW_OCOTP_GP84
-sh: echo: write error: Invalid argument
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Support i.MX6SLL OTP.
There are 4 works in bank7/bank8.
When read, use address offset.
When prog, use bank/index, note that bank7/bank8 we treat
them a single bank when prog.
Tested GP41 and GP31 read/write on eng sample chip.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
(cherry picked from commit f8698b66fcbec7409b738a4c5b05ba87f0342cf8)
This is porting of fsl_otp driver from imx_3.14.y to imx_4.1.y.
This patch mainly from the following:
commit:292eff6d2c9064ecf15ed457140c1d743c2ead67
"ENGR00269945: char: add fsl_otp deivce driver"
This is a porting of fsl_otp driver from 3.0.35 kernel to 3.10. It
cleans up the driver a little bit and adds device tree probe support.
shawn.guo: cherry-pick commit 850237dccde7 from imx_3.10.y.
commit:057a50039fac872fd19fe6c129a94face4231ae8
"MLK-10979-4 imx: ocotp add i.MX7D support and fix hole"
1. Add i.MX7D support
2. Fix hole addressing.
There is a hole in shadow registers address map of size 0x100
between bank 5 and bank 6 on iMX6QP, iMX6DQ, iMX6SDL, iMX6SX and
iMX6UL. Bank 5 ends at 0x6F0 and Bank 6 starts at 0x800. When reading
the fuses, should account for this hole in address space.
Similar hole exists between bank 14 and bank 15 of size 0x80 on
iMX6QP, iMX6DQ, iMX6SDL and iMX6SX.
Note: iMX6SL has only 0-7 banks and there is no hole.
Note: iMX6UL doesn't have this one.
When reading, the hole need to be considered to calculated the physical
address offset.
When writing, since only word index for i.MX6 and bank
index for i.MX7, there is no need to take the hole into consideration,
still use the bank/word index from fuse map.
3. Add i.MX6SL i.MX6UL fuse map table.
4. Tested read/write on mx6ul-14x14-ddr3-arm2 and mx7d-12x12-lpddr3-arm2 board.
Tested read on mx6sxsabresd board.
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Peng Fan