Add NXP PTN5150 Type-C CC logic chip, this chip supplies CC flip
function automatically, and the driver will notify extcon
consumer (USB controller driver) attach and detach events.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
This dts is dedicated for USB3 Type-C port, the Type-C CC logic
chip PTN5150 is conflict with other peripherals which use
i2c1 pins (I2C1_SDA/I2C1_SCL) from GTP blocks.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
At imx8qxp arm2 board, the USB3 controller is at one Type-C port, and
the CC logic at this Type-C port is controlled by PTN5150. Enable
USB3 Type-C port at this commit.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
Enhance the power domain driver for i.mx8mq. We may need to make sure
clock is enabled for some power domain. And also when a power domain
is down, the external supply for this power domain need to be turn off
to save power.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
Add i.MX8MQ support and Fix read.
When offset is not 4 bytes aligned, directly shift righty by 2 bits
will cause reading out wrong data. Since imx ocotp only supports
4 bytes reading once, we need handle offset is not 4 bytes aligned
and enlarge the bytes to 4 bytes aligned. After finished reading,
copy the needed data from buffer to caller and free buffer.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Add imx-scu-ocotp driver to support i.MX8QM/QXP.
The usage, add an entry in ocotp node, such as the test_1 entry:
ocotp: ocotp {
#address-cells = <1>;
#size-cells = <1>;
compatible = "fsl,imx8qm-ocotp", "syscon";
test_1: test_1@40 {
reg = <0x41 0x8>;
bits = <4 40>;
};
};
Then in your device node, add this:
node: node {
.....
nvmem-cells = <&test_1>;
nvmem-cell-names = "test_1";
};
Then in your driver, using the following piece code:
+#include <linux/nvmem-consumer.h>
struct nvmem_cell *cell;
u8 *val;
size_t len;
int i;
cell = devm_nvmem_cell_get(&pdev->dev, "test_1");
if (IS_ERR(cell)) {
if (PTR_ERR(cell) == -EPROBE_DEFER)
return -EPROBE_DEFER;
}
val = nvmem_cell_read(cell, &len);
The val points the contents that you need.
After shutdown or driver remove, use this:
devm_nvmem_cell_put(&pdev->dev, cell);
Note: we not reuse the imx-ocotp driver, because mix scu api with
legacy code will cost many maintenance efforts. When we have common
api support, we could merge the two.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
As time goes on, the cfifo buffer is close to be
exausted. And since the cfifo is a ring buffer,
so at this moment, the cfifo needs to be wrapped
to the buffer beginning. In this driver, the fifo
wrapping condition is that the free size to buffer
end is less than the commit size. And before the
buffer wrapping, the 'ctxld_wq' workqueue needs to
be flushed to make sure all the previous commited
jobs to be finished. Besides, this commit uses the
spinlock in the 'cqueue' workqueue to replace the
'wlock'.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
This patch adds LVDS to HDMI it6263 bridge(s) support on the i.MX8qxp MEK
platform. Since the platform supports up to two it6263 bridge(s) via
daughter cards plugged into mini-SAS connectors, this patch introduces
several DT sources so that users may choose relevant DT blob to use
single or dual it6263 display.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
There is cable detection failure issue on i.MX8qxp MEK platform at boot
time when we use single LVDS to HDMI display. The workaround is to read
the cable detection status for even more times. Based on experiments, it
looks reading for 90 times works.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
A low pulse whose width is at least 40ms on pin SYSRSTN
may reset the bridge, according to the chip maker.
This patch adds gpio reset support for the bridge.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Add a workaround to make the fifo commit operation to be
synchronous, since for now, there is no interface which
can be called by user space to do synchronization.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Add 'blank' parameter to 'dtg_channel_timing_config' interface
to set or clear the channel display window according to the
blank state.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Remove the possible 'dcss_blank' calls in 'dcss_set_par',
since the context loader can change the DCSS sub-modules
configuration on the fly.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Do the following improvements about 'dcss_blank':
1. move DPR trigger on config from 'dcss_blank' to
'dcss_dpr_config'.
2. move SCALER trigger on config from 'dcss_blank'
to 'dcss_scaler_config'.
3. remove duplicate code in 'dcss_blank'.
4. save the blank state for each channel in 'dcss_blank'.
All the above improvements focus on making fb blank/unblank
logic more simple and more clear.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Do the following improvements about DTG config:
1. move db and sb loading position config from
'dcss_dtg_config' to 'dcss_dtg_start'.
2. Only one DTG trigger config is required which
is put in 'dcss_dtg_start'.
3. move 'dcss_dtg_config' call from 'dcss_blank'
to 'dcss_set_par'.
4. add default background color configs for both
graph and video layers in 'dcss_dtg_start'.
5. remove channel enable and disable function in
'dcss_channel_blank'.
All the above improvements focus on making dtg config
logic more simple and more clear.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
The SUBSAM module is used to generate the output timings
to display monitor. So use display mode to config SUBSAM
is more suitable and can reduce coupling degree between
SUBSAM config and graphic layer initialization.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Move the 'dcss_dtg_start' calling to probe stage which
can service the fifo commits generated in probe stage
in time.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
For the first frame timings generated by DTG, the display mode
is better to be used to configure this timings which can reduce
the coupling degree between first frame dtg config and the graphic
layer initialization process.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
For now, all the DCSS register configuration should be put
in the high priority single buffer by default in context
loader. So improve the high and low priority data counts
calculation and setting.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
In dcss_set_par(), it will config the parameters related
with DEC400D/DTRC, DPR, SCALER, HDR10 and etc. So commit
all the registers configuration at the end of this function
to avoid mixing with later configurations which may cause
duplicating settings in one commit.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
The kernel direct mapping for cfifo buffer is cacheable which
requires cache flush and is easier to bring in strange issue.
So use coherent dma mapping for cfifo buffer access. But the
kfifo dma sgl interface using the direct mapping to get the
phyiscal page via dma mapping virtual addr. So record fifo 'in'
for each commit which is used for context loader sb and db addr
configurations.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
set WFE (WFE_A on imx7d, and WFE_B on imx6ull/imx6sll) input address to
framebuffer start address, and set left/top coordinate since the framebuffer is
the original source of WFE (i.e., not from PXP output) when bypass legacy mode.
The patch also limits the condition to bypass legacy mode when not use
EPDC_FLAG_USE_ALT_BUFFER.
Signed-off-by: Robby Cai <robby.cai@nxp.com>
(cherry picked from commit 7f19940705902623166777c675f5e10c9e7fc477)
In order to make sure that get the regulator correctly.
Check the return value of devm_regulator_get().
Return value directly if it is '-EPROBE_DEFER'
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
In DMA EEOP mode idle flag can trigger DMA major loop stop. The idle
flag should be cleared by HW. So others cannot clear idle flag in the
mode enabled.
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Reviewed-by: Pandy Gao <pandy.gao@nxp.com>
Add operations to reset control block registers in resume functions,
otherwise system will crash
Signed-off-by: Zhou Peng-B04994 <eagle.zhou@nxp.com>
Reviewed-by: Bai Ping <ping.bai@nxp.com>
Add timeout check for hdmi FW alive function to avoid
kernel booting hang for that board without HDMI FW.
CDN_API_General_Test_Echo_Ext_blocking is the first
function that calling mailbox.
Add timeout to the function to avoid kernel booting hang
for that board without HDMI ROM patch.
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
The intention of currently implemented primary SAI power-on/off
on BE startup/shutdown was to make sure the primary SAI is
powered-on when the playback is started on the secondary SAI.
However in a such scenario the primary SAI is powered-on when
the primary SAI output is recorded.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@freescale.com>
In order to leverage the power domain clocks rate store/restore
functionality all clocks used by device must be specified
within the device specific power domain.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@freescale.com>
Because of a typo the resources allocated in imx8_attach_dev were not
correctly released by imx8_detach_dev.
Fixes: a0fb334819bb ("MLK16147-2 soc:imx Add support to save/restore clock rates")
Signed-off-by: Mihai Serban <mihai.serban@nxp.com>
Reviewed-by: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@nxp.com>
There is cable detection failure issue on i.MX8qxp arm2 platform
at boot time when we avoid imx-drm deferral probe entirely(i2c
bus driver probe needs to be before the it6263 driver probe).
The workaround is to read the cable detection status multiple
times. Based on experiments, it looks reading for 40 times works.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Peter Chen