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Eric W. Biederman dff5406432 mn10300/misalignment: Use SIGSEGV SEGV_MAPERR to report a failed user copy 
commit 6ac1dc736b upstream.

Setting si_code to 0 is the same a setting si_code to SI_USER which is definitely
not correct.  With si_code set to SI_USER si_pid and si_uid will be copied to
userspace instead of si_addr.  Which is very wrong.

So fix this by using a sensible si_code (SEGV_MAPERR) for this failure.

Fixes: b920de1b77 ("mn10300: add the MN10300/AM33 architecture to the kernel")
Cc: David Howells <dhowells@redhat.com>
Cc: Masakazu Urade <urade.masakazu@jp.panasonic.com>
Cc: Koichi Yasutake <yasutake.koichi@jp.panasonic.com>
Signed-off-by: "Eric W. Biederman" <ebiederm@xmission.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 		2018-02-16 20:23:11 +01:00
..
Kconfig.cache License cleanup: add SPDX GPL-2.0 license identifier to files with no license 2017-11-02 11:10:55 +01:00
Makefile License cleanup: add SPDX GPL-2.0 license identifier to files with no license 2017-11-02 11:10:55 +01:00
cache-dbg-flush-by-reg.S MN10300: Fix one of the kernel debugger cacheflush variants 2011-06-07 19:03:52 -07:00
cache-dbg-flush-by-tag.S MN10300: Create general kernel debugger cache flushing 2011-03-18 16:54:30 +00:00
cache-dbg-inv-by-reg.S MN10300: Create general kernel debugger cache flushing 2011-03-18 16:54:30 +00:00
cache-dbg-inv-by-tag.S MN10300: Create general kernel debugger cache flushing 2011-03-18 16:54:30 +00:00
cache-dbg-inv.S MN10300: Create general kernel debugger cache flushing 2011-03-18 16:54:30 +00:00
cache-disabled.c MN10300: Handle missing sys_cacheflush() when caching disabled 2010-09-28 18:01:14 -07:00
cache-flush-by-reg.S MN10300: AM34: Add cacheflushing by using the AM34 purge registers 2010-10-27 17:28:45 +01:00
cache-flush-by-tag.S MN10300: Create general kernel debugger cache flushing 2011-03-18 16:54:30 +00:00
cache-flush-icache.c MN10300: Cache: Implement SMP global cache flushing 2010-10-27 17:28:47 +01:00
cache-inv-by-reg.S MN10300: Create general kernel debugger cache flushing 2011-03-18 16:54:30 +00:00
cache-inv-by-tag.S MN10300: Create general kernel debugger cache flushing 2011-03-18 16:54:30 +00:00
cache-inv-icache.c MN10300: The SMP_ICACHE_INV_FLUSH_RANGE IPI command does not exist 2011-03-14 14:45:29 +00:00
cache-smp-flush.c MN10300: Cache: Implement SMP global cache flushing 2010-10-27 17:28:47 +01:00
cache-smp-inv.c MN10300: Cache: Implement SMP global cache flushing 2010-10-27 17:28:47 +01:00
cache-smp.c Replace <asm/uaccess.h> with <linux/uaccess.h> globally 2016-12-24 11:46:01 -08:00
cache-smp.h MN10300: Cache: Implement SMP global cache flushing 2010-10-27 17:28:47 +01:00
cache.c Replace <asm/uaccess.h> with <linux/uaccess.h> globally 2016-12-24 11:46:01 -08:00
cache.inc MN10300: The icache invalidate functions should disable the icache first 2011-03-18 16:54:29 +00:00
dma-alloc.c treewide: Constify most dma_map_ops structures 2017-01-24 12:23:35 -05:00
extable.c mn10300: migrate exception table users off module.h and onto extable.h 2017-01-24 12:41:46 -05:00
fault.c mm: do not pass mm_struct into handle_mm_fault 2016-07-26 16:19:19 -07:00
init.c Replace <asm/uaccess.h> with <linux/uaccess.h> globally 2016-12-24 11:46:01 -08:00
misalignment.c mn10300/misalignment: Use SIGSEGV SEGV_MAPERR to report a failed user copy 2018-02-16 20:23:11 +01:00
mmu-context.c MN10300: Make the use of PIDR to mark TLB entries controllable 2010-10-27 17:28:49 +01:00
pgtable.c tree wide: get rid of __GFP_REPEAT for order-0 allocations part I 2016-06-24 17:23:52 -07:00
tlb-mn10300.S MN10300: Use the [ID]PTEL2 registers rather than [ID]PTEL for TLB control 2010-10-27 17:28:50 +01:00
tlb-smp.c sched/headers: Prepare to remove the <linux/mm_types.h> dependency from <linux/sched.h> 2017-03-02 08:42:37 +01:00