Masahiro Yamada a967ab0f73 clk: uniphier: fix DAPLL2 clock rate of Pro5 ... [ Upstream commit 67affb78a4 ] The parent of DAPLL2 should be DAPLL1. Fix the clock connection. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Sasha Levin <alexander.levin@verizon.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>		2017-12-14 09:53:12 +01:00
..
Kconfig	…
Makefile	License cleanup: add SPDX GPL-2.0 license identifier to files with no license	2017-11-02 11:10:55 +01:00
clk-uniphier-core.c	clk: uniphier: add PXs3 clock data	2017-08-31 18:34:35 -07:00
clk-uniphier-cpugear.c	clk: uniphier: remove unneeded #include <linux/delay.h>	2017-01-09 16:27:28 -08:00
clk-uniphier-fixed-factor.c	…
clk-uniphier-fixed-rate.c	…
clk-uniphier-gate.c	…
clk-uniphier-mio.c	clk: uniphier: remove sLD3 SoC support	2017-08-03 15:38:14 -07:00
clk-uniphier-mux.c	clk: uniphier: fix type of variable passed to regmap_read()	2016-10-17 15:20:52 -07:00
clk-uniphier-peri.c	clk: uniphier: add clock data for UniPhier SoCs	2016-09-16 16:31:38 -07:00
clk-uniphier-sys.c	clk: uniphier: fix DAPLL2 clock rate of Pro5	2017-12-14 09:53:12 +01:00
clk-uniphier.h	clk: uniphier: add PXs3 clock data	2017-08-31 18:34:35 -07:00