276 lines
6.8 KiB
C
276 lines
6.8 KiB
C
/*
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* Copyright (C) 2017-2018 NXP
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/clk.h>
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#include <linux/cpu.h>
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#include <linux/cpufreq.h>
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#include <linux/cpu_cooling.h>
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#include <linux/err.h>
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#include <linux/module.h>
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#include <linux/slab.h>
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#include <linux/of.h>
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#include <linux/pm_opp.h>
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#include <linux/platform_device.h>
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#include <linux/regulator/consumer.h>
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#include <linux/suspend.h>
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#define DC_VOLTAGE_MIN 900000
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#define DC_VOLTAGE_MAX 1000000
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static struct device *cpu_dev;
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static bool free_opp;
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static struct cpufreq_frequency_table *freq_table;
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static unsigned int transition_latency;
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static struct clk *a53_clk;
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static struct clk *arm_a53_src_clk;
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static struct clk *arm_pll_clk;
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static struct clk *arm_pll_out_clk;
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static struct clk *sys1_pll_800m_clk;
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struct thermal_cooling_device *cdev;
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static struct regulator *dc_reg;
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static struct regulator *arm_reg;
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static int imx8mq_set_target(struct cpufreq_policy *policy, unsigned int index)
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{
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struct dev_pm_opp *opp;
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unsigned long freq_hz, volt;
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unsigned int old_freq, new_freq;
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int ret;
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new_freq = freq_table[index].frequency;
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freq_hz = new_freq * 1000;
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old_freq = policy->cur;
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opp = dev_pm_opp_find_freq_ceil(cpu_dev, &freq_hz);
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if (IS_ERR(opp)) {
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dev_err(cpu_dev, "failed to find OPP for %ld\n", freq_hz);
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return PTR_ERR(opp);
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}
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volt = dev_pm_opp_get_voltage(opp);
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dev_pm_opp_put(opp);
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dev_dbg(cpu_dev, "%u MHz --> %u MHz\n",
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old_freq / 1000, new_freq / 1000);
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if (new_freq == policy->max) {
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if (!IS_ERR(dc_reg)) {
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ret = regulator_set_voltage_tol(dc_reg, DC_VOLTAGE_MAX, 0);
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if (ret) {
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dev_err(cpu_dev, "failed to scale dc_reg up: %d\n", ret);
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return ret;
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}
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}
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}
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if (new_freq > old_freq) {
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if (!IS_ERR(arm_reg)) {
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ret = regulator_set_voltage_tol(arm_reg, volt, 0);
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if (ret) {
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dev_err(cpu_dev, "failed to scale arm_reg up: %d\n", ret);
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return ret;
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}
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}
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}
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clk_set_parent(arm_a53_src_clk, sys1_pll_800m_clk);
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clk_set_rate(arm_pll_clk, new_freq * 1000);
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clk_set_parent(arm_a53_src_clk, arm_pll_out_clk);
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if (old_freq == policy->max) {
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if (!IS_ERR(dc_reg)) {
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ret = regulator_set_voltage_tol(dc_reg, DC_VOLTAGE_MIN, 0);
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if (ret) {
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dev_err(cpu_dev, "failed to scale dc_reg down: %d\n", ret);
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return ret;
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}
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}
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}
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if (new_freq < old_freq) {
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if (!IS_ERR(arm_reg)) {
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ret = regulator_set_voltage_tol(arm_reg, volt, 0);
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if (ret) {
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dev_err(cpu_dev, "failed to scale arm_reg down: %d\n", ret);
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return ret;
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}
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}
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}
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/* Ensure the arm clock divider is what we expect */
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ret = clk_set_rate(a53_clk, new_freq * 1000);
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if (ret)
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dev_err(cpu_dev, "failed to set clock rate: %d\n", ret);
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return ret;
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}
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static void imx8mq_cpufreq_ready(struct cpufreq_policy *policy)
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{
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struct device_node *np = of_get_cpu_node(policy->cpu, NULL);
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if (of_find_property(np, "#cooling-cells", NULL)) {
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cdev = of_cpufreq_cooling_register(np, policy);
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if (IS_ERR(cdev) && PTR_ERR(cdev) != -ENOSYS) {
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pr_err("cpu%d is not running as cooling device: %ld\n",
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policy->cpu, PTR_ERR(cdev));
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cdev = NULL;
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}
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}
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of_node_put(np);
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}
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static int imx8mq_cpufreq_init(struct cpufreq_policy *policy)
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{
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int ret;
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policy->clk = a53_clk;
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policy->cur = clk_get_rate(a53_clk) / 1000;
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ret = cpufreq_generic_init(policy, freq_table, transition_latency);
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if (ret) {
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dev_err(cpu_dev, "imx8mq cpufreq init failed!\n");
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return ret;
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}
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policy->suspend_freq = policy->max;
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return 0;
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}
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static struct cpufreq_driver imx8mq_cpufreq_driver = {
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.flags = CPUFREQ_NEED_INITIAL_FREQ_CHECK,
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.verify = cpufreq_generic_frequency_table_verify,
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.target_index = imx8mq_set_target,
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.get = cpufreq_generic_get,
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.init = imx8mq_cpufreq_init,
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.name = "imx8mq-cpufreq",
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.ready = imx8mq_cpufreq_ready,
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.attr = cpufreq_generic_attr,
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#ifdef CONFIG_PM
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.suspend = cpufreq_generic_suspend,
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#endif
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};
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static int imx8mq_cpufreq_probe(struct platform_device *pdev)
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{
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struct device_node *np;
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int ret, num;
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cpu_dev = get_cpu_device(0);
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if (!cpu_dev) {
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pr_err("failed to get cpu0 device\n");
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return -ENODEV;
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}
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np = of_node_get(cpu_dev->of_node);
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if (!np) {
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dev_err(cpu_dev, "failed to find cpu0 node\n");
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return -ENOENT;
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}
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a53_clk = clk_get(cpu_dev, "a53");
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arm_a53_src_clk = clk_get(cpu_dev, "arm_a53_src");
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arm_pll_clk = clk_get(cpu_dev, "arm_pll");
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arm_pll_out_clk = clk_get(cpu_dev, "arm_pll_out");
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sys1_pll_800m_clk = clk_get(cpu_dev, "sys1_pll_800m");
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if (IS_ERR(a53_clk) || IS_ERR(arm_a53_src_clk)
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|| IS_ERR(arm_pll_out_clk) || IS_ERR(arm_pll_clk)
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|| IS_ERR(sys1_pll_800m_clk)) {
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dev_err(cpu_dev, "failed to get clocks\n");
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ret = -ENOENT;
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goto put_clk;
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}
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dc_reg = regulator_get_optional(cpu_dev, "dc");
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arm_reg = regulator_get_optional(cpu_dev, "arm");
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/*
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* We expect an OPP table supplied by platform.
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* Just, incase the platform did not supply the OPP
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* table, it will try to get it.
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*/
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num = dev_pm_opp_get_opp_count(cpu_dev);
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if (num < 0) {
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ret = dev_pm_opp_of_add_table(cpu_dev);
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if (ret < 0) {
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dev_err(cpu_dev, "failed to init OPP table: %d\n", ret);
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goto put_clk;
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}
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}
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ret = dev_pm_opp_init_cpufreq_table(cpu_dev, &freq_table);
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if (ret) {
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dev_err(cpu_dev, "failed to init cpufreq table: %d\n", ret);
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goto out_free_opp;
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}
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if (of_property_read_u32(np, "clock-latency", &transition_latency))
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transition_latency = CPUFREQ_ETERNAL;
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ret = cpufreq_register_driver(&imx8mq_cpufreq_driver);
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if (ret) {
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dev_err(cpu_dev, "failed register driver: %d\n", ret);
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goto free_freq_table;
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}
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of_node_put(np);
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dev_info(cpu_dev, "registered imx8mq-cpufreq\n");
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return 0;
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free_freq_table:
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dev_pm_opp_free_cpufreq_table(cpu_dev, &freq_table);
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out_free_opp:
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dev_pm_opp_of_remove_table(cpu_dev);
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put_clk:
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if (!IS_ERR(a53_clk))
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clk_put(a53_clk);
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if (!IS_ERR(arm_a53_src_clk))
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clk_put(arm_a53_src_clk);
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if (!IS_ERR(arm_pll_clk))
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clk_put(arm_pll_clk);
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if (!IS_ERR(arm_pll_out_clk))
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clk_put(arm_pll_out_clk);
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if (!IS_ERR(sys1_pll_800m_clk))
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clk_put(sys1_pll_800m_clk);
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of_node_put(np);
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return ret;
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}
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static int imx8mq_cpufreq_remove(struct platform_device *pdev)
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{
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cpufreq_cooling_unregister(cdev);
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cpufreq_unregister_driver(&imx8mq_cpufreq_driver);
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dev_pm_opp_free_cpufreq_table(cpu_dev, &freq_table);
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if (free_opp)
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dev_pm_opp_of_remove_table(cpu_dev);
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clk_put(a53_clk);
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clk_put(arm_a53_src_clk);
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clk_put(arm_pll_clk);
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clk_put(arm_pll_out_clk);
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clk_put(sys1_pll_800m_clk);
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return 0;
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}
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static struct platform_driver imx8mq_cpufreq_platdrv = {
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.driver = {
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.name = "imx8mq-cpufreq",
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},
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.probe = imx8mq_cpufreq_probe,
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.remove = imx8mq_cpufreq_remove,
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};
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module_platform_driver(imx8mq_cpufreq_platdrv);
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MODULE_AUTHOR("Anson Huang <Anson.Huang@nxp.com>");
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MODULE_DESCRIPTION("Freescale i.MX8MQ cpufreq driver");
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MODULE_LICENSE("GPL");
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