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Shawn Guo 5d996d429f ARM: dts: zero-sugar: add back 200mhz pinctrl state for SDIO
Probably because of some issue we see on early version hardware, 200mhz
pinctrl state for SDIO was disabled.  Although the following access
failure is seen with DDR50 mode, both SDR50 and SDR104 mode works pretty
good on recent rM2 device.

 [  122.957669] brcmfmac: brcmf_sdiod_regrw_helper: failed to read data F1@0x08000, err: -84
 [  122.965816] brcmfmac: brcmf_chip_recognition: chip backplane type 15 is not supported
 [  122.973674] brcmfmac: brcmf_sdio_probe_attach: brcmf_chip_attach failed!
 [  122.980381] brcmfmac: brcmf_sdio_probe: brcmf_sdio_probe_attach failed
 [  122.987089] brcmfmac: brcmf_ops_sdio_probe: F2 error, probe failed -19...

Add back 200mhz pinctrl state, so that AP5256 can work at SDR104 mode
and provide a much better WIFI throughput.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2021-04-20 14:48:59 +08:00
..
alpha
arc
arm ARM: dts: zero-sugar: add back 200mhz pinctrl state for SDIO 2021-04-20 14:48:59 +08:00
arm64 MLK-20674 ARM64: dts: imx8mq: enable uart2 clock and disable caam 2019-01-03 19:04:52 +08:00
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