redonkable
/
remarkable-uboot
1
0
Fork 0
Code Releases Activity

ARM64: zynqmp: Use i2c cadence DM driver 

Use i2c cadence DM driver for all zynqmp targets except ZCU102
because I2C muxes and PCA953x are not supported in the tree yet.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
utp
Michal Simek 2016-04-13 08:49:03 +02:00
parent fdec2d21ef
commit 58ed7f6693
8 changed files with 12 additions and 9 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
configs/xilinx_zynqmp_ep_defconfig
View File

@ -2,6 +2,7 @@ CONFIG_ARM=y
CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_ep"
CONFIG_ARCH_ZYNQMP=y
CONFIG_SYS_MALLOC_F_LEN=0x4000
CONFIG_DM_I2C=y
CONFIG_DM_GPIO=y
CONFIG_ZYNQMP_USB=y
CONFIG_SYS_TEXT_BASE=0x8000000
@ -17,6 +18,7 @@ CONFIG_SYS_PROMPT="ZynqMP> "
# CONFIG_CMD_ENV_EXISTS is not set
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_I2C=y
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPIO=y
# CONFIG_CMD_ITEST is not set
@ -29,6 +31,7 @@ CONFIG_CMD_TIME=y
CONFIG_CMD_TIMER=y
CONFIG_OF_EMBED=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SYS_I2C_CADENCE=y
CONFIG_DM_MMC=y
CONFIG_ZYNQ_SDHCI=y
CONFIG_NAND_ARASAN=y

3
configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig
View File

@ -1,6 +1,7 @@
CONFIG_ARM=y
CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_zc1751_xm015_dc1"
CONFIG_ARCH_ZYNQMP=y
CONFIG_DM_I2C=y
CONFIG_DM_GPIO=y
CONFIG_ZYNQMP_USB=y
CONFIG_SYS_TEXT_BASE=0x8000000
@ -11,6 +12,7 @@ CONFIG_SYS_PROMPT="ZynqMP> "
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_MEMTEST=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_I2C=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_DHCP=y
@ -19,6 +21,7 @@ CONFIG_CMD_TIME=y
CONFIG_CMD_TIMER=y
CONFIG_OF_EMBED=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SYS_I2C_CADENCE=y
CONFIG_DM_MMC=y
CONFIG_ZYNQ_SDHCI=y
CONFIG_SPI_FLASH=y

3
configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig
View File

@ -1,6 +1,7 @@
CONFIG_ARM=y
CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_zc1751_xm016_dc2"
CONFIG_ARCH_ZYNQMP=y
CONFIG_DM_I2C=y
CONFIG_DM_GPIO=y
CONFIG_ZYNQMP_USB=y
CONFIG_SYS_TEXT_BASE=0x8000000
@ -11,6 +12,7 @@ CONFIG_SYS_PROMPT="ZynqMP> "
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_MEMTEST=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_I2C=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_DHCP=y
@ -19,6 +21,7 @@ CONFIG_CMD_TIME=y
CONFIG_CMD_TIMER=y
CONFIG_OF_EMBED=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SYS_I2C_CADENCE=y
CONFIG_DM_MMC=y
CONFIG_NAND_ARASAN=y
CONFIG_SPI_FLASH=y

3
configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig
View File

@ -1,6 +1,7 @@
CONFIG_ARM=y
CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_zc1751_xm019_dc5"
CONFIG_ARCH_ZYNQMP=y
CONFIG_DM_I2C=y
CONFIG_DM_GPIO=y
CONFIG_SYS_TEXT_BASE=0x8000000
CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zc1751-xm019-dc5"
@ -10,12 +11,14 @@ CONFIG_SYS_PROMPT="ZynqMP> "
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_MEMTEST=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_I2C=y
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_PING=y
CONFIG_CMD_TIME=y
CONFIG_CMD_TIMER=y
CONFIG_OF_EMBED=y
CONFIG_SYS_I2C_CADENCE=y
CONFIG_DM_MMC=y
CONFIG_ZYNQ_SDHCI=y
CONFIG_DM_ETH=y

2
include/configs/xilinx_zynqmp_ep.h
View File

@ -15,8 +15,6 @@
#define CONFIG_ZYNQ_SDHCI_MAX_FREQ 52000000
#define CONFIG_ZYNQ_SDHCI_MIN_FREQ (CONFIG_ZYNQ_SDHCI_MAX_FREQ << 9)
#define CONFIG_ZYNQ_I2C0
#define CONFIG_SYS_I2C_ZYNQ
#define CONFIG_ZYNQ_EEPROM
#define CONFIG_AHCI
#define CONFIG_ZYNQMP_XHCI_LIST {ZYNQMP_USB0_XHCI_BASEADDR, \

2
include/configs/xilinx_zynqmp_zc1751_xm015_dc1.h
View File

@ -12,8 +12,6 @@
#define CONFIG_ZYNQ_SDHCI0
#define CONFIG_ZYNQ_SDHCI1
#define CONFIG_ZYNQ_I2C1
#define CONFIG_SYS_I2C_ZYNQ
#define CONFIG_AHCI
#define CONFIG_ZYNQMP_XHCI_LIST {ZYNQMP_USB0_XHCI_BASEADDR}

2
include/configs/xilinx_zynqmp_zc1751_xm016_dc2.h
View File

@ -10,8 +10,6 @@
#ifndef __CONFIG_ZYNQMP_ZC1751_XM016_DC2_H
#define __CONFIG_ZYNQMP_ZC1751_XM016_DC2_H
#define CONFIG_ZYNQ_I2C0
#define CONFIG_SYS_I2C_ZYNQ
#define CONFIG_ZYNQMP_XHCI_LIST {ZYNQMP_USB1_XHCI_BASEADDR}
#define CONFIG_IDENT_STRING " Xilinx ZynqMP ZC1751 xm016 dc2"

3
include/configs/xilinx_zynqmp_zc1751_xm019_dc5.h
View File

@ -12,9 +12,6 @@
#define __CONFIG_ZYNQMP_ZC1751_XM019_DC5_H
#define CONFIG_ZYNQ_SDHCI0
#define CONFIG_ZYNQ_I2C0
#define CONFIG_ZYNQ_I2C1
#define CONFIG_SYS_I2C_ZYNQ
#define CONFIG_IDENT_STRING " Xilinx ZynqMP ZC1751 xm019 dc5"