fpga: xilinx: virtex2: Fix macro indentation

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No functional changes.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

utp

Michal Simek 2014-07-16 10:47:43 +02:00

parent 6a6acd12ad

commit a3607365f7

1 changed files with 4 additions and 4 deletions

Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL

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