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26829 Commits (38687ae67664d0f7ee907a2053d4a0663744b7b4)

Author SHA1 Message Date
Simon Glass 38687ae676 dm: Update documentation to include CONFIG_DM... options
Add documentation for the various driver model options that are now
available.

Signed-off-by: Simon Glass <sjg@chromium.org>
2014-11-21 08:14:27 +01:00
Simon Glass f8fff9dac9 dm: arm: spl: Make driver model linker lists available
The linker lists feature is useful in SPL as it holds the driver model
platform data. So don't throw away the lists.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@ti.com>
2014-11-21 08:14:11 +01:00
Simon Glass 0521f98427 dm: tegra: Add platform data for the GPIO driver
Add platform data for the GPIO driver. It doesn't need to contain anything
since the GPIO driver will actually use information from the CONFIGs for
now. This merely serves to ensure that the GPIO driver is bound.

Signed-off-by: Simon Glass <sjg@chromium.org>
2014-11-21 08:14:07 +01:00
Simon Glass bc0b28427a dm: tegra: Add platform data for the SPL uart
Since we currently don't have device tree available in SPL, add platform
data so the uart works.

Signed-off-by: Simon Glass <sjg@chromium.org>
2014-11-21 08:14:02 +01:00
Simon Glass a94f468fa2 dm: Disable dm_warn() in SPL
Since this function can use up quite a bit of space for its strings, disable
it by default in SPL. Use CONFIG_DM_WARN to re-enable it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@ti.com>
2014-11-21 08:13:17 +01:00
Simon Glass 236f2bd302 dm: Allow stdio registration to be dropped
Provide a CONFIG_DM_STDIO option to enable registering a serial device
with the stdio library. This is seldom useful in SPL, so disable it by
default when building for SPL.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@ti.com>
2014-11-21 08:13:14 +01:00
Simon Glass 3ac435d33a dm: Allow device removal features to be dropped
For SPL we don't expect to need to remove a device. Save some code space
by dropping this feature. The board config can define
CONFIG_DM_DEVICE_REMOVE if this is in fact needed.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@ti.com>
2014-11-21 08:13:02 +01:00
Simon Glass 1151651831 dm: spl: Allow driver model to be used
When enabled, set up driver model for SPL. This allows SPL to use the same
drivers as the main U-Boot.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Tom Rini <trini@ti.com>
2014-11-21 08:12:55 +01:00
Simon Glass fb4f5e7c91 dm: spl: Make simple malloc() available when enabled
Set up the simple malloc() implementation when requested, in preference to
the full malloc().

Signed-off-by: Simon Glass <sjg@chromium.org>
2014-11-21 08:12:52 +01:00
Simon Glass ba19599b44 dm: arm: spl: Allow simple malloc() in SPL
For SPL it is sometimes useful to have a simple malloc() just to permit
driver model to work, in the cases where the full malloc() is not made
available by the board config.

Signed-off-by: Simon Glass <sjg@chromium.org>
2014-11-21 08:12:39 +01:00
Simon Glass c9356be307 dm: Split the simple malloc() implementation into its own file
The simple malloc() implementation is used when memory is tight. It provides
a simple buffer with an incrementing pointer.

At present the implementation is inside dlmalloc. Move it into its own file
so that it is easier to find.

Rather than using relocation as a signal that the full malloc() is
available, add a special GD_FLG_FULL_MALLOC_INIT flag. This signals that the
simple malloc() should no longer be used.

In some cases, such as SPL, even the code space used by the full malloc() is
wasteful. Add a CONFIG_SYS_MALLOC_SIMPLE option to provide only the simple
malloc. In this case the full malloc is not available at all. It saves about
1KB of code space and about 0.5KB of data on Thumb 2.

Acked-by: Tom Rini <trini@ti.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
2014-11-21 08:12:28 +01:00
Simon Glass 9dacbb2772 dm: tegra: Avoid using arch-specific memcpy() in SPL
The faster functions are not actually available in SPL and the code size
likely isn't worth it. Use the normal memcpy() in SPL.

Signed-off-by: Simon Glass <sjg@chromium.org>
2014-11-21 08:11:13 +01:00
Simon Glass ad1b81c880 dm: serial: Support changing the baud rate
Implement this feature in the uclass so that the baudrate can be changed
with 'setenv baudrate <rate>'.

Signed-off-by: Simon Glass <sjg@chromium.org>
2014-11-21 08:10:16 +01:00
Simon Glass e87e0e79ed dm: at91: Add myself as maintainer for snapper9260
The old maintainer has left, so take this over.

Signed-off-by: Simon Glass <sjg@chromium.org>
2014-11-21 08:10:13 +01:00
Simon Glass 1a1927f3a3 dm: at91: Convert snapper9260 to use driver model
Convert this at91sam9260-based board to use driver model. This should serve
as an example for other similar boards. Serial and GPIO are supported so
far.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Andreas Bießmann <andreas.devel@googlemail.com>
2014-11-21 08:10:03 +01:00
Simon Glass 0f65f48b64 dm: at91: Add driver model support for the serial driver
Add driver model support while retaining the existing legacy code. This
allows the driver to support boards that have converted to driver model
as well as those that have not.

Signed-off-by: Simon Glass <sjg@chromium.org>
2014-11-21 08:09:58 +01:00
Simon Glass 62137fc0ab dm: at91: Refactor serial driver slightly for driver model
Before adding driver model support, split out a few of the functions so
that they can be used by the driver model code.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Andreas Bießmann <andreas.devel@googlemail.com>
2014-11-21 08:09:55 +01:00
Simon Glass 12fe7f7c2a dm: at91: Add platform data for GPIO on at91sam9260-based boards
These boards all have the same GPIO arrangement, so add some common platform
data that can be used by all boards. Remove the configs which are no longer
required.

Signed-off-by: Simon Glass <sjg@chromium.org>
2014-11-21 08:09:36 +01:00
Simon Glass 918354b18e dm: at91: Add driver model support for atmel GPIO driver
Modify this driver to support driver model, with platform data required to
determine the GPIOs that it controls.

Signed-off-by: Simon Glass <sjg@chromium.org>
2014-11-21 08:08:19 +01:00
Simon Glass cd052cd935 dm: at91: Move snapper9260 to generic baord
This works correctly, so switch it over before the deadline.

Signed-off-by: Simon Glass <sjg@chromium.org>
2014-11-21 08:08:16 +01:00
Simon Glass 5e8a749c28 dm: at91: Correct text base for snapper9260
The value should be 0x21f00000. Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2014-11-21 08:08:07 +01:00
Tom Rini 4d70b34d7f Merge branch 'master' of git://git.denx.de/u-boot-ubi 2014-11-19 23:18:29 -05:00
Tom Rini c44d3cd1c4 Merge branch 'master' of git://git.denx.de/u-boot-i2c 2014-11-19 23:18:19 -05:00
Tom Rini f10834e166 Merge branch 'master' of git://git.denx.de/u-boot-mpc5xxx 2014-11-19 23:17:13 -05:00
Stefan Roese 5fc3494fdb powerpc: mpc52xx: Clear GD in the main U-Boot stage for SPL usage
When an MPC5200 based board is used with SPL support, the main
U-Boot needs to clear the GD (global data) struct again.

Otherwise the generic board init code in board_init_f (when
CONFIG_SYS_GENERIC_BOARD is defined) will not initialize all
GD variables correctly. Resulting in a hangup on the a4m2k
board.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
2014-11-19 13:08:14 +01:00
Stefan Roese c07e8da1a4 powerpc: mpc52xx: a3m071/a4m2k: Convert to generic board
a3m071 and a4m2k share one config header. So adding the generic board defines
in this one file is enough to convert both boards.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
2014-11-19 13:07:54 +01:00
Stefan Roese 746a36a107 powerpc: mpc52xx: a4m072: Convert to generic board
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
2014-11-19 13:07:21 +01:00
Dirk Eibach 50dcf89d90 mpc83xx: Add gdsys hrcon board
The gdsys hrcon board is based on a Freescale MPC8308 SOC.
It boots from NOR-Flash, kernel and rootfs are stored on
SD-Card.

On board peripherals include:
- 1x GbE (optional)
- Lattice ECP3 FPGA connected via eLBC and PCIe

Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
2014-11-19 08:48:42 +01:00
Dirk Eibach a8cb9d0b17 board: iocon: Fix uninitialized access
Wolfgang Denk found this issue using cppcheck:
(error) Uninitialized variable: fpga_features

Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
2014-11-19 08:48:41 +01:00
Dirk Eibach 8272baa964 board: iocon: Fix fpga index in print_fpga_info()
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
2014-11-19 08:48:41 +01:00
Dirk Eibach a61762d294 board: dlvision-10g: Compile fix
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
2014-11-19 08:48:41 +01:00
Dirk Eibach f1cdde2833 common: Fix cmd_fpgad addressing
Addressing was completely broken for cmd_fpgad.

Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
2014-11-19 08:48:41 +01:00
Dirk Eibach f3c89d9228 mtd: Handle 29LV800BT
The device id makes u-boot think that this chip needs
cfi_reverse_geometry(), which is not the case.
Add it to jedec_flash, so it is handled properly.

Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
2014-11-19 08:48:41 +01:00
Dirk Eibach f9af10dda8 board: dlvision: Reduce memory footprint
Tune dlvision configuration similar to other gdsys boards to reduce memory
footprint.

Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
2014-11-19 08:48:41 +01:00
Andrew Ruder d1cfeee916 ubi: enable error reporting in initialization
The UBI layer will disable much of its error reporting when it is
compiled into the linux kernel to avoid stopping boot.  We want this
error reporting in U-Boot since we don't initialize the UBI layer until
it is used and want the error reporting.

We force this by telling the UBI layer we are building as a module.

Signed-off-by: Andrew Ruder <andrew.ruder@elecsyscorp.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Kyungmin Park <kmpark@infradead.org>
2014-11-19 07:54:40 +01:00
Heiko Schocher 65e5cb54d0 mtd, cfi, ubi: add missing writebufsize initialization
ff94bc40af "mtd, ubi, ubifs: resync with Linux-3.14"
introduced the writebufsize field in struct mtd_info, which
is not initialized in the cfi_flash driver, which leads in
not working ubi on cfi flashes. Fix it

Signed-off-by: Heiko Schocher <hs@denx.de>
Reported-by: Andrew Ruder <andrew.ruder@elecsyscorp.com>
Acked-by: Stefan Roese <sr@denx.de>
Acked-by: Andrew Ruder <andrew.ruder@elecsyscorp.com>
2014-11-19 07:54:04 +01:00
Bo Shen f196044dfd ARM: atmel: add sama5d4 xplained ultra board support
The code for this board supports following features:
  - Boot media support: NAND flash/SD card/SPI flash
  - Support LCD display (optional, disabled by default)
  - Support ethernet
  - Support USB mass storage

Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2014-11-17 08:47:18 -05:00
Bo Shen 927b901b47 ARM: atmel: add sama5d4ek board support
The code for this board supports following features:
  - Boot media support: NAND flash/SD card/SPI flash
  - Support LCD display
  - Support ethernet
  - Support USB mass storage

Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2014-11-17 08:47:18 -05:00
Bo Shen cabf61ce4b net: macb: enable GMAC IP without GE feature support
The User Register in GMAC IP is used to select interface type.
When with GE feature, it is used to select interface between
RGMII and GMII. If without GE feature, it is used to select
interface between MII and RMII.

Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2014-11-17 08:47:18 -05:00
Josh Wu 7df4486d04 mtd: atmel_nand: runtime to build gf table for pmecc
As in SAMA5D4 SoC, the gf table in ROM code can not be seen.
So, when we try to use PMECC, we need to build it when do
initialization.
Add a macro NO_GALOIS_TABLE_IN_ROM in soc header file. If it
is defined we will build gf table runtime.

The PMECC use the BCH algorithm, so based on the build_gf_tables()
function in lib/bch.c, we can build the Galois Field lookup table.

Signed-off-by: Josh Wu <josh.wu@atmel.com>
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2014-11-17 08:47:18 -05:00
Heiko Schocher 5b15fd980b arm, spl, at91: add spl support for the corvus board
replaces the at91bootstrap code with SPL code.
make the spl image with:
./tools/mkimage -T atmelimage -d spl/u-boot-spl.bin spl/boot.bin

this writes the length of the spl image into the 6th
execption vector. This is needed from the ROM bootloader.

Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Bo Shen <voice.shen@atmel.com>
Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2014-11-17 08:47:18 -05:00
Heiko Schocher 237e3793fb arm, at91, spl: add spl support for the taurus board
replaces the at91bootstrap code with SPL code.

make the spl image with:
./tools/mkimage -T atmelimage -d spl/u-boot-spl.bin spl/boot.bin

this writes the length of the spl image into the 6th
execption vector. This is needed from the ROM bootloader.

Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2014-11-17 08:47:17 -05:00
Heiko Schocher 5abc00d020 arm, spl, at91: add at91sam9260 and at91sam9g45 spl support
add support for using spl code on at91sam9260 and at91sam9g45
based boards.

Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Bo Shen <voice.shen@atmel.com>
Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
[adopt Bo's change in spl.c]
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2014-11-17 08:47:17 -05:00
Heiko Schocher 667af36905 spl, mtd, nand, atmel_nand: invert device ready pin logic
device ready pin is signalling that the device is ready on state 1
not on 0. Simmiliar as it is in drivers/mtd/nand/nand_spl_simple.c

Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
Reviewed-by: Bo Shen <voice.shen@atmel.com>
Acked-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2014-11-17 08:47:17 -05:00
Heiko Schocher 4dfd360589 spl, nand, atmel_nand: add erase one block function
erase one nand block in spl code. keep it simple, as size matters
This is used on the upcoming taurus spl support.

Signed-off-by: Heiko Schocher <hs@denx.de>
Acked-by: Scott Wood <scottwood@freescale.com>
Reviewed-by: Bo Shen <voice.shen@atmel.com>
Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2014-11-17 08:47:17 -05:00
Heiko Schocher c1ec406282 mtd: atmel_nand: add missing include
using this driver in SPL code with CONFIG_SPL_NAND_ECC
configured leads in an compileerror. Fix this.

Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
Reviewed-by: Bo Shen <voice.shen@atmel.com>
[fix subject]
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2014-11-17 08:47:17 -05:00
Heiko Schocher 0c3117b1f7 spl, nand: add option to boot raw u-boot.bin image only
enable to boot only a raw u-boot.bin image from nand with the
CONFIG_SPL_NAND_RAW_ONLY define. This option saves space on
boards where spl space is low.

Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
Reviewed-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2014-11-17 08:47:17 -05:00
Heiko Schocher bd1bb3c6a7 arm, at91: add missing ddr2 cr register MPDDRC_CR_EBISHARE define
Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2014-11-17 08:47:16 -05:00
Heiko Schocher 7dd5891061 arm, at91: compile mpddrc ram init code also for AT91SAM9M10G45
- compile mpddrc ram init code also for AT91SAM9M10G45
  based boards.
- in CONFIG_SAMA5D3 case, look for the ATMEL_MPDDRC_CR_DECOD_INTERLEAVED
  in the cr configuration

Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
Reviewed-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2014-11-17 08:47:16 -05:00
Heiko Schocher 341f548ee9 arm, at91, mpddrc: fix typo in ddr2_init()
use the configure value for computing the ba_off value
not the value from the cr register. This leaded in a
wrong ram configuration on the upcoming corvus spl board
support.

Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2014-11-17 08:47:16 -05:00