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34909 Commits (5b8031ccb4ed6e84457d883198d77efc307085dc)

Author SHA1 Message Date
Stephen Warren 08eee2718a test/fs: error case fixes/enhancements
- Use "mkdir -p" to avoid errors when intermediate directories are
  missing.
- Fall back to "dd" when "fallocate" fails. For example, fallocate isn't
  supported on ext4.
- Add error checking for test image generation. Without this, the test
  simply plows on spewing all kinds of errors which are hard to
  immediately root-cause.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2016-01-13 21:05:21 -05:00
Tom Rini 2a1a29c5e7 omap4_panda: Convert to config_distro_bootcmd.h
Based on the am335x_evm conversion, switch to config_distro_bootcmd for
mmc and pxe.  Tested with Fedora 23.

Signed-off-by: Tom Rini <trini@konsulko.com>
2016-01-13 21:05:21 -05:00
Tom Rini 5f64dac403 ti_armv7_common.h: Add CONFIG_CMD_EXT4_WRITE
Given that with config_distro_defaults.h we always have ext4 read
support, add in write support.

Signed-off-by: Tom Rini <trini@konsulko.com>
2016-01-13 21:05:20 -05:00
Tom Rini 7205442e62 am335x_evm.h: unsed CONFIG_BOOTDELAY
Now that ti_armv7_common.h uses config_distro_defaults.h we don't need
to include it again and then undef CONFIG_BOOTDELAY

Signed-off-by: Tom Rini <trini@konsulko.com>
2016-01-13 21:05:20 -05:00
Tom Rini 495c3a1e22 ext4_common.c: Clean up failure cases in alloc_triple_indirect_block
As noted by Coverity, when we have an error in
alloc_triple_indirect_block we will leak ti_pbuff_start_addr as it's not
being freed.  Further inspection here shows that we could also leak
ti_cbuff_start_addr in one corner case so free that as well.

Reported-by: Coverity (CID 131205, 131206)
Signed-off-by: Tom Rini <trini@konsulko.com>
2016-01-13 21:05:20 -05:00
Stephen Warren 02585eb3b5 ums: support multiple LUNs at once
Extend the ums command to accept a list of block devices. Each of these
will be exported as a separate LUN. An example use-case would be:

ums 0 mmc 0,0.1,0.2

... which would export LUNs for eMMC 0's user data, boot0, and boot1 HW
partitions. This is useful since it allows the host access to everything
on the eMMC without having to somehow stop the ums command from executing
and restart it with different parameters.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2016-01-13 21:05:19 -05:00
Stephen Warren 873cc1d777 mmc: store hwpart in the block device
This will allow us to have multiple block device structs each referring
to the same eMMC device, yet different HW partitions.

For now, there is still a single block device per eMMC device. As before,
this block device always accesses whichever HW partition was most recently
selected. Clients wishing to make use of multiple block devices referring
to different HW partitions can simply take a copy of this block device
once it points at the correct HW partition, and use each one as they wish.
This feature will be used by the next patch.

In the future, perhaps get_device() could be enhanced to return a
dynamically allocated block device struct, to avoid the client needing to
copy it in order to maintain multiple block devices. However, this would
require all users to be updated to free those block device structs at some
point, which is rather a large change.

Most callers of mmc_switch_part() wish to permanently switch the default
MMC block device's HW partition. Enhance mmc_switch_part() so that it does
this. This removes the need for callers to do this. However,
common/env_mmc.c needs to save and restore the current HW partition. Make
it do this more explicitly.

Replace use of mmc_switch_part() with mmc_select_hwpart() in order to
remove duplicate code that skips the call if that HW partition is already
selected.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2016-01-13 21:05:19 -05:00
Stephen Warren 7c4213f6a5 block: pass block dev not num to read/write/erase()
This will allow the implementation to make use of data in the block_dev
structure beyond the base device number. This will be useful so that eMMC
block devices can encompass the HW partition ID rather than treating this
out-of-band. Equally, the existence of the priv field is crying out for
this patch to exist.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2016-01-13 21:05:18 -05:00
Albert ARIBAUD adc421e4ce arm: move gd handling outside of C code
As of gcc 5.2.1 for Thumb-1, it is not possible any
more to assign gd from C code, as gd is mapped to r9,
and r9 may now be saved in the prolog sequence, and
restored in the epilog sequence, of any C functions.

Therefore arch_setup_gd(), which is supposed to set
r9, may actually have no effect, causing U-Boot to
use a bad address to access GD.

Fix this by never calling arch_setup_gd() for ARM,
and instead setting r9 in arch/arm/lib/crt0.S, to
the value returned by board_init_f_alloc_reserve().

Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
Reviewed-by: Simon Glass <sjg@chromium.org>
2016-01-13 21:05:18 -05:00
Albert ARIBAUD ecc306639e Fix board init code to respect the C runtime environment
board_init_f_mem() alters the C runtime environment's
stack it is actually already using. This is not a valid
behaviour within a C runtime environment.

Split board_init_f_mem into C functions which do not alter
their own stack and always behave properly with respect to
their C runtime environment.

Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
Acked-by: Thomas Chou <thomas@wytron.com.tw>
2016-01-13 21:05:17 -05:00
Tom Rini 20d08f59fa Merge branch 'master' of git://www.denx.de/git/u-boot-microblaze 2016-01-13 21:05:17 -05:00
Tom Rini 774da4b9aa Merge git://git.denx.de/u-boot-net 2016-01-13 21:05:16 -05:00
Tom Rini 48ad68deb8 hash.c: Conditionally compile hash_command, static hash_show
The function hash_show is now only called by hash_command, so mark it as
static (and drop from hash.h).  We only call hash_command when any of
CONFIG_CMD_CRC32, CONFIG_CMD_SHA1SUM or CONFIG_CMD_HASH are set.  Since
hash.c is linked in unconditionally we must take extra care with
functions that bring in read-only strings as these will not be
discarded.

Signed-off-by: Tom Rini <trini@konsulko.com>
2016-01-13 21:05:08 -05:00
Stefan Monnier d29892ba85 part_dos.c: Don't wrap to negative after 2G sectors
In order to support large IDE disks we need to make certain types be
lbaint_t now.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Stefan Monnier <monnier@iro.umontreal.ca>
2016-01-13 16:33:20 -05:00
Masahiro Yamada 20e072f374 image: check "bootm_low" and "bootm_size" if "initrd_high" is missing
To boot Linux, we should prevent Initramdisk and FDT from going too
high.

Currently, boot_relocate_fdt() checks "fdt_high" environment first,
and then falls back to getenv_bootm_mapsize() + getenv_bootm_low()
if "fdt_high" is missing.

On the other hand, boot_ramdisk_high() only checks "initrd_high" to
get the address limit for the Initramdisk.  We also want to let this
case fall back to getenv_bootm_mapsize() + getenv_bootm_low().

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-01-13 09:54:46 -05:00
Mugunthan V N 69b41388ba dm: core: Add a new api to get indexed device address
Add new api to get device address based on index.

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Acked-by: Jagan Teki <jteki@openedev.com>
[Rebased on master]
Signed-off-by: Jagan Teki <jteki@openedev.com>
2016-01-13 18:54:22 +05:30
Jagan Teki 425846ed8f power: pmic.h: Drop include <spi.h>
include/power/pmic.h never used any generic spi code
from include/spi.h, but this has been added in below commit.
"dm: pmic: add implementation of driver model pmic uclass"
(sha1: 4d9057e82b)

Adding functionalities in include/spi.h will trigger a build
issue as this been added used in include/power/pmic.h

Build issue on trats2 with adding BIT macro on spi.h:
----------------------------------------------------
  CC      lib/asm-offsets.s
In file included from include/power/pmic.h:15:0,
                 from include/power/max77686_pmic.h:11,
                 from include/configs/trats2.h:212,
                 from include/config.h:5,
                 from include/common.h:18,
                 from lib/asm-offsets.c:15:
include/spi.h: In function 'spi_w8r8':
include/spi.h:327:2: warning: implicit declaration of function 'BIT' [-Wimplicit-function-declaration]

Cc: Simon Glass <sjg@chromium.org>
Cc: Przemyslaw Marczak <p.marczak@samsung.com>
Reported-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Simon Glass <sjg@chromium.org>
2016-01-13 18:47:28 +05:30
Mugunthan V N e101af014b defconfig: am437x_sk_evm: enable spi driver model
enable spi driver model for am437x_sk_evm as ti_qspi supports
driver model

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
2016-01-13 18:47:28 +05:30
Mugunthan V N 4fb01c4435 arm: dts: am4372: add qspi register maps for memory map
Add qspi memory map address to device tree.

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jteki@openedev.com>
2016-01-13 18:47:28 +05:30
Mugunthan V N 49f85b671a am43xx_evm: qspi: do not define DM_SPI and DM_SPI_FLASH for spl
Since OMAP's spl doesn't support DM currently, do not define
DM_SPI and DM_SPI_FLASH for spl build.

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
2016-01-13 18:47:28 +05:30
Mugunthan V N 7c69ad6b46 defconfig: dra74_evm: enable spi driver model
enable spi driver model for dra74_evm as ti_qspi supports
driver model

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
2016-01-13 18:47:28 +05:30
Mugunthan V N 36de4bed10 defconfig: dra72_evm: enable spi driver model
enable mmc driver model for dra72_evm as ti_qspi supports
driver model

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
2016-01-13 18:47:28 +05:30
Mugunthan V N 1f19d504cc arm: dts: dra72-evm: add spi-flash comaptible for flash
In U-Boot most flashes uses "spi-flash" as compatible to bind the
device to flash driver, so adding "spi-flash" compatible to
m25p80 node.

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
2016-01-13 18:47:28 +05:30
Mugunthan V N f7276c8615 arm: dts: dra7-evm: add spi-flash comaptible for flash
In U-Boot most flashes uses "spi-flash" as compatible to bind the
device to flash driver, so adding "spi-flash" compatible to
m25p80 node.

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
2016-01-13 18:47:28 +05:30
Mugunthan V N 4416ddba5b arm: dts: am437x-gp-evm: add spi-flash comaptible for flash
In U-Boot most flashes uses "spi-flash" as compatible to bind the
device to flash driver, so adding "spi-flash" compatible to
m25p80 node.

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
2016-01-13 18:47:27 +05:30
Mugunthan V N 830aba2cac arm: dts: dra7: add qspi register maps for memory map and control module
Add qspi memory map and control module register maps to device tree.

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jteki@openedev.com>
2016-01-13 18:47:27 +05:30
Mugunthan V N 106f813907 drivers: spi: ti_qspi: convert driver to adopt device driver model
adopt ti_qspi driver to device driver model

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
2016-01-13 18:47:27 +05:30
Mugunthan V N 6145ef74f9 dts: dra7: add spi alias for qspi
add spi alias for qspi so that spi probes the device and driver
successfully.

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jteki@openedev.com>
2016-01-13 18:47:27 +05:30
Mugunthan V N e7af6725d3 dra7xx_evm: qspi: do not define DM_SPI and DM_SPI_FLASH for spl
Since OMAP's spl doesn't support DM currently, do not define DM_SPI and
DM_SPI_FLASH for spl build.

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
2016-01-13 18:47:27 +05:30
Mugunthan V N f8e2f92d41 spi: Add support for dual and quad mode
spi bus can support dual and quad wire data transfers for tx and
rx. So defining dual and quad modes for both tx and rx. Also add
support to parse bus width used for spi tx and rx transfers.

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
2016-01-13 18:47:27 +05:30
Mugunthan V N 223091443c drivers: spi: ti_qspi: prepare driver for DM conversion
Prepare driver for DM conversion.

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
2016-01-13 18:47:27 +05:30
Mugunthan V N 9c42558afb drivers: spi:ti_qspi: change ti_qspi_slave to ti_qspi_priv for driver model conversion
Changing the ti_qspi_priv structure and its instance names from
to priv for driver mode conversion.

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
2016-01-13 18:47:27 +05:30
Mugunthan V N ec712f490d drivers: spi: ti_qspi: do not hard code chip select for memory map configuration
To enable memory map in dra7xx, specific chip select must be
written to control module register. But this hard coded to chip
select 1, fixing it by writing the specific chip select value to
control module register.

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
2016-01-13 18:47:27 +05:30
Jagan Teki 2b11a41cef spi: Add SPI_TX_DUAL mode
Added SPI_TX_DUAL mode flag.

Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Tested-by: Jagan Teki <jteki@openedev.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
2016-01-13 18:47:27 +05:30
Jagan Teki 1c17f5ec57 sf: Make IO modes at last in read modes
SLOW, FAST, DUAL, DUAL_IO, QUAD, QUAD_IO changed order to
SLOW, FAST, DUAL, QUAD, DUAL_IO, QUAD_IO

Cc: Simon Glass <sjg@chromium.org>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Tested-by: Jagan Teki <jteki@openedev.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
2016-01-13 18:47:27 +05:30
Jagan Teki 465c00d78e spi: Minor cleanup
- Add comments on mode_rx
- Tab space's

Cc: Simon Glass <sjg@chromium.org>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Tested-by: Mugunthan V N <mugunthanvnm@ti.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Jagan Teki <jteki@openedev.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
2016-01-13 18:47:27 +05:30
Jagan Teki 29ee0262e1 spi: Use BIT macro
Used BIT macro like 1 << nr as BIT(nr) where nr is 0...n

Cc: Simon Glass <sjg@chromium.org>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Tested-by: Mugunthan V N <mugunthanvnm@ti.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Jagan Teki <jteki@openedev.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
2016-01-13 18:47:27 +05:30
Jagan Teki e26a2e2cd9 spi: Fix bit assignment with flags
Fixed bit assignment with flags members on spi_slave{}

Cc: Simon Glass <sjg@chromium.org>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Tested-by: Mugunthan V N <mugunthanvnm@ti.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Jagan Teki <jteki@openedev.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
2016-01-13 18:47:26 +05:30
Jagan Teki c40f600360 spi: Move flags macro's to spi_slave{} members
This patch moves flags macro's to respective member
position on spi_slave{}, for better readabilty and
finding the respective member macro's easily.

Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Tested-by: Mugunthan V N <mugunthanvnm@ti.com>
Tested-by: Jagan Teki <jteki@openedev.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
2016-01-13 18:47:26 +05:30
Jagan Teki 91292e0bee spi: Rename op_mode_rx to mode_rx
Since spi rx mode macro's are renamed to simple and
meaninfull, this patch will rename the respective
structure members.

Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Tested-by: Mugunthan V N <mugunthanvnm@ti.com>
Tested-by: Jagan Teki <jteki@openedev.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
2016-01-13 18:47:26 +05:30
Jagan Teki e5961f0706 spi: Rename SPI_OPM_RX_* to SPI_RX_*
SPI_OPM_RX_AS 	- SPI_RX_SLOW
SPI_OPM_RX_AF	- SPI_RX_FAST
SPI_OPM_RX_DOUT	- SPI_RX_DUAL
SPI_OPM_RX_QOF	- SPI_RX_QUAD

Cc: Simon Glass <sjg@chromium.org>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Tested-by: Mugunthan V N <mugunthanvnm@ti.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Jagan Teki <jteki@openedev.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
2016-01-13 18:47:26 +05:30
Jagan Teki 4365522421 spi: Remove SPI_OPM_RX_DIO|QIOF
SPI_OPM_RX_DIO and SPI_OPM_RX_QIOF are rx IO
commands/opmodes for dual and quad. Usually IO
operation's are referred to flash protocol rather
with spi controller protocol, these are still present
in flash side for the usage of spi-nor controllers.

Cc: Simon Glass <sjg@chromium.org>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Tested-by: Mugunthan V N <mugunthanvnm@ti.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Jagan Teki <jteki@openedev.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
2016-01-13 18:47:26 +05:30
Jagan Teki 4dd12454dc spi: Remove SPI_OPM_RX_EXTN
SPI_OPM_RX_EXTN is a combination of all rx opmode's
and spi driver shall use any one of the rx mode at
a time not the combination and it is true in case of
flash where spi_flash_table mention combination of
supported read opmodes so-that the required one
will pick based on the rx mode from spi driver.

Cc: Simon Glass <sjg@chromium.org>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Tested-by: Mugunthan V N <mugunthanvnm@ti.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Jagan Teki <jteki@openedev.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
2016-01-13 18:47:26 +05:30
Jagan Teki d9a0ab6c0d sf: Write quad bit along with read status
While setting quad bit on spansion, macronix code
is writing only particular quad bit this may give
wrong functionality with other register bits,
So this patch fix the issue where it with write
previous read reg status along  particular quad bit.

Cc: Vignesh R <vigneshr@ti.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
2016-01-13 18:47:26 +05:30
Jagan Teki bfcdc3956d sf: Read back and check once macronix quad bit set
One macronix quad bit set using SR, it's good to
read back and check the written bit and also if
it's already been set check for the bit and return.

Cc: Vignesh R <vigneshr@ti.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
2016-01-13 18:47:26 +05:30
Jagan Teki ffecb0fc84 sf: Read back and check once spansion quad bit set
One spansion quad bit set using CR, it's good to
read back and check the written bit and also if
it's already been set check for the bit and return.

Cc: Vignesh R <vigneshr@ti.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Tested-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
2016-01-13 18:47:26 +05:30
Jagan Teki c56ae7519f sf: Fix quad bit set for micron devices
Setting up quad bit for micron devices need to do the
same way as other flash devices like spansion, winbond
etc does using enhanced volatile config register so this
patch adds this support instead of printing "QEB is volatile"

Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Peter Pan <peterpandong@micron.com>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
2016-01-13 18:47:26 +05:30
Jagan Teki eb020f69e0 sf: Use BIT macro
Used BIT macro like 1 << nr as BIT(nr) where nr is 0...n

Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
2016-01-13 18:47:26 +05:30
Jagan Teki 7bc679fb14 sf: Minor cleanup
- Tab space
- Place all read commands at one place.
- Re-arrange write commands.

Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
2016-01-13 18:47:26 +05:30
Jagan Teki 11c579bc9c sf: Remove spi_flash_remove
Use direct call to device_remove instead of exctra
spi_flash_remove defination.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jagan Teki <jteki@openedev.com>
2016-01-13 18:47:26 +05:30