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34074 Commits (a06728c8396b205c93819bb36345a816994506de)

Author SHA1 Message Date
Stefan Roese a06728c839 i2c: Fix the comment to match the function described
Use the correct function name in the function description.

Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Heiko Schocher <hs@denx.de>
2015-11-27 05:54:21 +01:00
Vignesh R 71cbed31f4 am33xx: Remove serial_init in s_init for QSPI/NOR XIP boot
serial_init() reads global_data, since global_data is not yet
initialized, this can cause unwanted behaviour leading to QSPI XIP boot
hang. Also, since serial_init() is anyways called later from
boar_init_f(), it does not make sense to do the same in s_init().

Tested on AM437x IDK EVM with QSPI XIP boot.

Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2015-11-23 11:01:53 -05:00
Thomas Fitzsimmons 54d68e9333 fs: ext4: Prevent infinite loop in ext4fs_iterate_dir
If the ext3 journal gets out of sync with what is written on disk, for
example because of an unexpected power cut, ext4fs_read_file can
return an all-zero directory entry.  In that case, ext4fs_iterate_dir
would infinite loop.

This patch detects when a directory entry's direntlen member is 0 and
returns a failure status, which breaks out of the infinite loop.  As a
result, U-Boot will not find files that may subsequently be recovered
when the journal is replayed.

This is better behaviour than hanging in an infinite loop, but as a
further improvement maybe U-Boot could interpret the ext3 journal and
actually find the unsynced entries.

Signed-off-by: Thomas Fitzsimmons <fitzsim@cisco.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2015-11-23 11:01:52 -05:00
Marcel Ziswiler b4bd655493 pci: fix address range check in __pci_hose_phys_to_bus()
The address range check may overflow if the memory region is located at
the top of the 32-bit address space. This can e.g. be seen on TK1 if
using the E1000 gigabit Ethernet driver where start and size are both
0x80000000 leading to the following messages:

Apalis TK1 # tftpboot $loadaddr test_file
Using e1000#0 device
TFTP from server 192.168.10.1; our IP address is 192.168.10.2
Filename 'test_file'.
Load address: 0x80408000
Loading: pci_hose_phys_to_bus: invalid physical address

This patch fixes this by changing the order of the addition vs.
subtraction in the range check just like already done in
__pci_hose_bus_to_phys().

Reported-by: Ivan Mercier <ivan.mercier@nexvision.fr>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-11-23 11:01:52 -05:00
Patrick Delaunay cfdaf4caa2 part:efi: add bootable parameter in gpt command
The optional parameter bootable is added in gpt command to set the
partition attribute flag "Legacy BIOS bootable"

This flag is used in extlinux and so in with distro to select
the boot partition where is located the configuration file
(please check out doc/README.distro for details).

With this parameter, U-Boot can be used to create the boot partition
needed for device using distro.

example of use:

setenv partitions "name=u-boot,size=60MiB;name=boot,size=60Mib,bootable;\
                   name=rootfs,size=0"

> gpt write mmc 0 $partitions

> part list mmc 0

Partition Map for MMC device 0  --   Partition Type: EFI

Part	Start LBA	End LBA		Name
	Attributes
	Type GUID
	Partition GUID
  1	0x00000022	0x0001e021	"u-boot"
	attrs:	0x0000000000000000
	type:	ebd0a0a2-b9e5-4433-87c0-68b6b72699c7
	guid:	cceb0b18-39cb-d547-9db7-03b405fa77d4
  2	0x0001e022	0x0003c021	"boot"
	attrs:	0x0000000000000004
	type:	ebd0a0a2-b9e5-4433-87c0-68b6b72699c7
	guid:	d4981a2b-0478-544e-9607-7fd3c651068d
  3	0x0003c022	0x003a9fde	"rootfs"
	attrs:	0x0000000000000000
	type:	ebd0a0a2-b9e5-4433-87c0-68b6b72699c7
	guid:	6d6c9a36-e919-264d-a9ee-bd00379686c7

> part list mmc 0 -bootable devplist

> printenv devplist

devplist=2

Then the distro scripts will search extlinux in partition 2
and not in the first partition.

Signed-off-by: Patrick Delaunay <patrick.delaunay73@gmail.com>
2015-11-23 11:01:52 -05:00
Lukasz Majewski bbb9ffac60 gpt: command: Extend gpt command to support GPT table verification
This commit adds support for "gpt verify" command, which verifies
correctness of on-board stored GPT partition table.
As the optional parameter one can provide '$partitons' environment variable
to check if partition data (size, offset, name) is correct.

This command should be regarded as complementary one to "gpt restore".

Signed-off-by: Lukasz Majewski <l.majewski@majess.pl>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Przemyslaw Marczak <p.marczak@samsung.com>
2015-11-23 11:01:51 -05:00
Lukasz Majewski cef68bf904 gpt: part: Definition and declaration of GPT verification functions
This commit provides definition and declaration of GPT verification
functions - namely gpt_verify_headers() and gpt_verify_partitions().
The former is used to only check CRC32 of GPT's header and PTEs.
The latter examines each partition entry and compare attributes such as:
name, start offset and size with ones provided at '$partitions' env
variable.

Signed-off-by: Lukasz Majewski <l.majewski@majess.pl>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Przemyslaw Marczak <p.marczak@samsung.com>
2015-11-23 11:01:50 -05:00
Lukasz Majewski 74f889b039 gpt: doc: Update gpt command's help description
Signed-off-by: Lukasz Majewski <l.majewski@majess.pl>
Reviewed-by: Tom Rini <trini@konsulko.com>
2015-11-23 11:01:46 -05:00
Lukasz Majewski dd445879f7 gpt: doc: README: Update README entry for gpt verify extension
./doc/README.gpt entry has been updated to explain usage of "gpt verify"
command.

Signed-off-by: Lukasz Majewski <l.majewski@majess.pl>
Reviewed-by: Tom Rini <trini@konsulko.com>
2015-11-23 10:56:09 -05:00
Lukasz Majewski 5af9dd3739 gpt: command: Remove duplicated check for empty partition description
Exactly the same check is performed in set_gpt_info() function executed
just after this check.

Signed-off-by: Lukasz Majewski <l.majewski@majess.pl>
Reviewed-by: Tom Rini <trini@konsulko.com>
2015-11-23 10:56:08 -05:00
Stefan Roese a5ecdd08fd lib/tiny-printf.c: Support numbers bigger than 0xffff and misc updates
With this patch now, the tiny printf() function also supports numbers
bigger than 0xffff. Additionally the code is simplified a bit and
some static variables are moved to function parameters. Also the
upper case hex variable output support is removed, as its not really
needed in this simple printf version. And removing it reduces the
complexity and the code size again a bit.

Here the new numbers, again on the db-mv784mp-gp (Armada XP):

Without this patch:
  56542   18536    1956   77034   12cea ./spl/u-boot-spl

With this patch:
  56446   18536    1936   76918   12c76 ./spl/u-boot-spl

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Hans de Goede <hdegoede@redhat.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
2015-11-23 10:56:08 -05:00
Stefan Roese 7d9cde1031 lib/tiny-printf.c: Add tiny printf function for space limited environments
This patch adds a small printf() version that supports all basic formats.
Its intented to be used in U-Boot SPL versions on platforms with very
limited internal RAM sizes.

To enable it, just define CONFIG_USE_TINY_PRINTF in your defconfig. This
will result in the SPL using this tiny function and the main U-Boot
still using the full-blown printf() function.

This code was copied from:
http://www.sparetimelabs.com/printfrevisited
With mostly only coding style related changes so that its checkpatch
clean.

The size reduction is about 2.5KiB. Here a comparison for the db-mv784mp-gp
(Marvell AXP) SPL:

Without this patch:
  58963   18536    1928   79427   13643 ./spl/u-boot-spl

With this patch:
  56542   18536    1956   77034   12cea ./spl/u-boot-spl

Note:
To make it possible to compile tiny-printf.c instead of vsprintf.c when
CONFIG_USE_TINY_PRINTF is defined, the functions printf() and vprintf() are
moved from common/console.c into vsprintf.c in this patch.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Hans de Goede <hdegoede@redhat.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
2015-11-23 10:56:07 -05:00
Stefan Roese ddf7355a73 common/console.c: Small coding style cleanup
Change some comments to match the U-Boot coding style rules.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
2015-11-23 10:56:07 -05:00
Stefan Roese dd5577703b common/console.c: Drop sandbox special-case console code
As done in commit da229e4e [sandbox: Drop special-case sandbox console code],
this patch drops the sandbox special-case code in vprintf() that was
missed by Simon at that time.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
2015-11-23 10:56:06 -05:00
Heiko Schocher f300dccde4 i2c, avr32: fix compiler warning "input is not relaxable"
compiling U-Boot for avr32 boards shows since
commit 3d1957f0ea "dm: i2c: Add support for multiplexed I2C buses"
this warning:

Building current source for 4 boards (4 threads, 8 jobs per thread)
     avr32:  +   atstk1002
+(atstk1002) drivers/i2c/built-in.o: warning: input is not relaxable
     avr32:  +   grasshopper
+(grasshopper) drivers/i2c/built-in.o: warning: input is not relaxable
     avr32:  +   atngw100
+(atngw100) drivers/i2c/built-in.o: warning: input is not relaxable
     avr32:  +   atngw100mkii
+(atngw100mkii) drivers/i2c/built-in.o: warning: input is not relaxable
    0    4    0 /4      0:00:16  : atngw100mkii

Fix it.

Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Roger Meier <r.meier@siemens.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
2015-11-23 14:47:48 +01:00
Tom Rini d018cd20b3 sunxi: Update new defconfigs
After introduction of CONFIG_SYS_NS16550 these defconfig files were
added and need to be updated.

Signed-off-by: Tom Rini <trini@konsulko.com>
2015-11-22 10:46:25 -05:00
Tom Rini 80d307d115 Merge branch 'master' of http://git.denx.de/u-boot-sunxi 2015-11-22 08:20:03 -05:00
Jelle de Jong aa56cb374d sunxi: Add support for the Lamobo R1 board
The lamobo-r1 board, sometimes called the BPI-R1 but not labelled as such
on the PCB, is meant as a A20 based router board. As such the board comes
with a built-in switch chip giving it 5 gigabit ethernet ports, and it
has a large empty area on the pcb with mounting holes which will fit a
2.5 inch harddisk. To complete its networking features it has a
Realtek RTL8192CU for WiFi 802.11 b/g/n.

The dts file is identical to the one submitted upstream.

Signed-off-by: Jelle de Jong <jelledejong@powercraft.nl>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2015-11-22 11:43:58 +01:00
Hans de Goede 7e17fd2653 sunxi: Add support for Orangepi Plus and Orangepi PC boards
Add defconfig files for the Orangepi Plus and Orangepi PC.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2015-11-22 11:43:57 +01:00
Hans de Goede d6e6d4b3a9 sunxi: Add H3 dts[i] files
These files are based on the current latest upstream kernel work. The
bus_gates bindings may still change, but for u-boot that does not matter
as we do not (yet) use any clock info from devicetree for sunxi u-boot.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2015-11-22 11:31:00 +01:00
Siarhei Siamashka 52d093112a sunxi: clock: Set AHB1 clock frequency to 200MHz on Allwinner H3
The 3.4 kernel from the Allwinner SDK is clocking AHB1 at 200MHz
on Allwinner H3 and using PLL6 as the clock source (PLL6/3).
This can be verified by reading the value of the AHB1_APB1_CFG_REG
register via /dev/mem. It always reads as 0x3180 regardless of
the current cpufreq operating point. So this configuration should
be safe for use in U-Boot too.

PLL6 also needs to be configured before it is used as the clock
source, according to the "CCU / Programming Guidelines" section
of the Allwinner manual.

The current low AHB1 clock speed is limiting the USB transfer
speed when booting via FEL. This patch can increase the FEL USB
transfer speed from ~510 KB/s to ~950 KB/s.

Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2015-11-22 11:31:00 +01:00
Jens Kuske 0404d53f2f sunxi: Add H3 DRAM initialization support
Based on existing A23/A33 code and the original H3 boot0.

Signed-off-by: Jens Kuske <jenskuske@gmail.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2015-11-22 11:31:00 +01:00
Jens Kuske 1c27b7dcd0 sunxi: Add basic H3 support
Add initial sun8i H3 support, only uart + mmc are supported for now.

Signed-off-by: Jens Kuske <jenskuske@gmail.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2015-11-22 11:30:59 +01:00
Siarhei Siamashka 6047a3a9c9 sunxi: musb: Implement dfu_usb_get_reset()
This is necessary to distinguish between the "dfu-util --detach" and
the "dfu-util --reset" requests.

The default weak implementation of dfu_usb_get_reset() unconditionally
reboots the device, but we want to be able to continue the boot.scr
execution after writing the kernel, fdt and ramdisk to RAM via DFU.

Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2015-11-22 11:30:59 +01:00
Siarhei Siamashka 2a909c5f7a sunxi: Enable DFU for RAM
The DFU protocol implementation in U-Boot is much faster than the
FEL protocol implementation in the boot ROM on Allwinner devices.
Using DFU instead of FEL improves the USB transfer speed from
500-900 KB/s to 3.2-3.7 MB/s. This is particularly useful for
reducing the time needed for booting systems with large initrd
images.

FEL is still useful for loading the U-Boot bootloader and a boot
script, which may then activate DFU in the following way:

   setenv dfu_alt_info ${dfu_alt_info_ram}
   dfu 0 ram 0
   bootm ${kernel_addr_r} ${ramdisk_addr_r} ${fdt_addr_r}

The rest of the files can be transferred to the device using the
"dfu-util" tool.

Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2015-11-22 11:30:59 +01:00
Ryan Harkin f3c71c93d7 vexpress64: store env in flash
Add support for storing the environment in CFI NOR flash on Juno and FVP
models.

I also removed some config values that are not used by CFI flash parts.

Juno has 1 flash part with 259 sectors.  The first 255 sectors are
0x40000 (256kb) and are followed by 4 sectors of 0x10000 (64KB).

FVP models simulate a 64MB NOR flash part at base address 0x0FFC0000.
This part has 256 x 256kb sectors.  We use the last sector to store the
environment.

To save the NOR flash to a file, the following parameters should be
passed to the model:

    -C bp.flashloader1.fname=${FILENAME}
    -C bp.flashloader1.fnameWrite=${FILENAME}

Foundation models don't simulate the NOR flash, but having NOR support
in the u-boot binary does not harm:  attempting to write to the NOR will
fail gracefully.

Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2015-11-21 21:50:29 -05:00
Ryan Harkin 3e933f43e9 vexpress64: remove #error
This patch allows vexpress64 targets to be compiled when
CONFIG_SYS_FLASH_CFI is enabled.

I considered using #warning instead of #error, but this just clutters up
the build output and hides real warnings.

Without this patch, you see errors during compilation like this:

include/configs/vexpress_aemv8a.h:42:2: error: #error "Unknown board
variant"
 #error "Unknown board variant"
include/configs/vexpress_aemv8a.h:115:2: error: #error "Unknown board
variant"
 #error "Unknown board variant"
include/configs/vexpress_aemv8a.h:280:2: error: #error "Unknown board
variant"
 #error "Unknown board variant"
make[1]: *** [tools/envcrc.o] Error 1
make: *** [tools] Error 2
In file included from include/config.h:5:0,
                 from tools/envcrc.c:19:

Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2015-11-21 21:50:28 -05:00
Ryan Harkin 2c2b218383 vexpress64: use 2nd DRAM bank only on juno
This patch makes the 2nd DRAM bank available on Juno only and not on
other vexpress64 targets, eg. the FVP models.

The commit below added a 2nd bank of NOR flash for Juno, but also for
all vexpress64 targets:

    commit 2d0cee1ca2
    Author: Liviu Dudau <Liviu.Dudau@foss.arm.com>
    Date:   Mon Oct 19 11:08:31 2015 +0100

    vexpress64: Juno: Declare all 8GB of RAM and make them visible to the kernel.

    Juno comes with 8GB RAM, but U-Boot only passes 2GB to the kernel.
    Declare a secondary memory bank and set the sizes correctly.

    Signed-off-by: Liviu Dudau <Liviu.Dudau@foss.arm.com>
    Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
    Reviewed-by: Ryan Harkin <ryan.harkin@linaro.org>
    Tested-by: Ryan Harkin <ryan.harkin@linaro.org>

Unfortunately, I only fully tested on Juno R0, R1 and the FVP Foundation
model.  Whilst FVP Base AEMV8 models run U-Boot OK, they fail to boot
the kernel.

Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
Acked-by: Liviu Dudau <liviu.dudau@foss.arm.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
2015-11-21 21:50:28 -05:00
Ryan Harkin bc8d3bc023 vexpress64: compile Juno PCIe conditionally
Only compile in PCIe support if the board really uses it. Provide
a __weak stub for the init function if e.g. FVP is being built.

Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2015-11-21 21:50:27 -05:00
Andre Przywara 0ee1a22b6d Juno: don't print PCI debug information by default
On a Juno r1 the PCI controller init routine outputs the rather boring
ATR entry information.
Do this only with DEBUG defined to avoid cluttering the user's
terminal.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Ryan Harkin <ryan.harkin@linaro.org>
2015-11-21 21:50:27 -05:00
Marek Vasut d4e69e617c eeprom: Clean up checkpatch issues
Cosmetic fixes to the file, make it checkpatch clean.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Cc: Heiko Schocher <hs@denx.de>
Reviewed-by: Heiko Schocher <hs@denx.de>
2015-11-21 21:50:27 -05:00
Marek Vasut d4fec4e988 eeprom: Add support for selecting i2c bus
Add additional parameter into the eeprom command to select
the I2C bus on which the eeprom resides.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Cc: Heiko Schocher <hs@denx.de>
Reviewed-by: Heiko Schocher <hs@denx.de>
2015-11-21 21:50:26 -05:00
Marek Vasut 354e3ed754 eeprom: Add bus argument to eeprom_init()
Add bus argument to eeprom_init(), so that it can select
the I2C bus number on which the eeprom resides. Any negative
value of the $bus argument will preserve the old behavior.
This is in place so that old code does not randomly break.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Cc: Heiko Schocher <hs@denx.de>
Reviewed-by: Heiko Schocher <hs@denx.de>
[trini: Wrap i2c_set_bus_num() call with CONFIG_SYS_I2C test]
Signed-off-by: Tom Rini <trini@konsulko.com>
2015-11-21 21:50:26 -05:00
Marek Vasut 1a37889b0a eeprom: Pull out the RW loop
Unify the code for doing read/write into single function, since the
code for both the read and write is almost identical. This again
trims down the code duplication.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Cc: Heiko Schocher <hs@denx.de>
Reviewed-by: Heiko Schocher <hs@denx.de>
2015-11-21 21:50:25 -05:00
Marek Vasut 39b6f98bd5 eeprom: Pull out transfer length computation
Pull out the code which computes the length of the transfer
into separate code and clean it up a little. This again trims
down the code duplication.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Cc: Heiko Schocher <hs@denx.de>
Reviewed-by: Heiko Schocher <hs@denx.de>
2015-11-21 21:50:25 -05:00
Marek Vasut 6717e3c84f eeprom: Pull out CONFIG_SYS_EEPROM_PAGE_WRITE_BITS
Implement default value of 8 for this macro and pull out all of
this macro out of the code. The default value of 8 actually does
implement exactly the same behavior as the previous code which
was in the #else clause of the ifdef.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Cc: Heiko Schocher <hs@denx.de>
Reviewed-by: Heiko Schocher <hs@denx.de>
2015-11-21 21:50:24 -05:00
Marek Vasut 8eee40a602 eeprom: Suck the ifdef into eeprom_init()
Just suck the ugly ifdef around eeprom_init() call into eeprom_init()
function itself. This puts all of the ifdef mess into one place.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Cc: Heiko Schocher <hs@denx.de>
Reviewed-by: Heiko Schocher <hs@denx.de>
2015-11-21 21:50:24 -05:00
Marek Vasut d738746cc3 eeprom: Pull out CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS
Pull this macro to the beginning of the cmd_eeprom.c and remove
another nasty ifdef from the code. Note that this is legal, since
udelay(0) changes the behavior only such that it pings the WDT if
WDT is enabled and otherwise does not wait.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Cc: Heiko Schocher <hs@denx.de>
Reviewed-by: Heiko Schocher <hs@denx.de>
2015-11-21 21:50:24 -05:00
Marek Vasut 52cd47c9a5 eeprom: Make eeprom_write_enable() weak
Make this function weak and implement it's weak implementation
so that the boards can just reimplement it. This zaps the horrid
CONFIG_SYS_EEPROM_WREN macro.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Cc: Heiko Schocher <hs@denx.de>
Reviewed-by: Heiko Schocher <hs@denx.de>
2015-11-21 21:50:23 -05:00
Marek Vasut 02c321cf88 eeprom: Pull out address computation
Pull out the code computing the EEPROM address into separate function
so that it's not duplicated.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Cc: Heiko Schocher <hs@denx.de>
Reviewed-by: Heiko Schocher <hs@denx.de>
2015-11-21 21:50:23 -05:00
Marek Vasut 9132088b00 eeprom: Pull out the I/O code
Pull out the code which does the I2C or SPI read/write, so that
the beefy ifdef around it is contained in a single function.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Cc: Heiko Schocher <hs@denx.de>
Reviewed-by: Heiko Schocher <hs@denx.de>
2015-11-21 21:50:22 -05:00
Marek Vasut 53a85ad79a eeprom: Zap CONFIG_SPI_X
This macro is no longer used, so just reap it.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Heiko Schocher <hs@denx.de>
Reviewed-by: Heiko Schocher <hs@denx.de>
2015-11-21 21:50:22 -05:00
Marek Vasut b7b2e3f748 eeprom: Zap eeprom_probe()
Remove this function as it's no longer used.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Heiko Schocher <hs@denx.de>
Reviewed-by: Heiko Schocher <hs@denx.de>
2015-11-21 21:50:21 -05:00
Marek Vasut ec7012e3d8 eeprom: Zap CONFIG_SYS_EEPROM_X40430
Now that the only user of CONFIG_SYS_EEPROM_X40430 was removed,
remove this unused code from cmd_eeprom.c

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Heiko Schocher <hs@denx.de>
Reviewed-by: Heiko Schocher <hs@denx.de>
2015-11-21 21:50:21 -05:00
Marek Vasut e4f65d0067 eeprom: Zap CONFIG_SYS_I2C_MULTI_EEPROMS
This option only complicates the code unnecessarily, just use
CONFIG_SYS_DEF_EEPROM_ADDR as the default address if there are
only five arguments to eeprom {read/write} if this is defined.
If CONFIG_SYS_DEF_EEPROM_ADDR is not defined, we mandate all
six arguments.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Cc: Heiko Schocher <hs@denx.de>
Reviewed-by: Heiko Schocher <hs@denx.de>
2015-11-21 21:50:21 -05:00
Marek Vasut 4f296d09e1 eeprom: Shuffle code around
Just move the code around so that the forward declarations are not
necessary. Also zap a few checkpatch issues where applicable and
zap the use of #ifdef CONFIG_CMD_EEPROM in the code, since this is
always true.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Cc: Heiko Schocher <hs@denx.de>
Reviewed-by: Heiko Schocher <hs@denx.de>
2015-11-21 21:50:20 -05:00
Andreas Bießmann 8961dac970 tricorder: rewrite tricordereeprom command
This rewrite uses lately promoted eeprom_init(int) function to choose the
right I2C bus when writing data to the EEPROM.

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Cc: Heiko Schocher <hs@denx.de>
Reviewed-by: Heiko Schocher <hs@denx.de>
2015-11-21 21:50:20 -05:00
Cooper Jr., Franklin 7ec2328d9e ARM: keystone2: configs: Correct burn_uboot_sp erase size
The NOR flash on Keystone 2 evms has a u-boot-spl partition size of
0x80000.

Currently burn_uboot_spi will erase 0x100000 from the spi NOR which will
cause a partial erase of the misc partition.

Fix this by correcting the erase size.

Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
2015-11-21 21:50:19 -05:00
Cooper Jr., Franklin bc622966c9 ARM: dra7x/am57x: Remove pin input/output config from WAKEUP pins
The WAKEUP_X pins are always an input no matter the pinmux mode.
However, the 18th bit that typical configures a pin as an input is
considered reserved for the WAKEUP_X pins. Therefore, for any WAKEUP
pin remove any configuration that sets that pin as an input. Since
those pins are only inputs remove any output configuration from those
pins.

Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
2015-11-21 21:50:19 -05:00
Thomas Chou 2f3a5fee9e nios2: 10m50: change to ns16550 uart
Change to ns16550 uart for 10m50 devboard based on a new
Altera release.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-11-21 21:50:18 -05:00