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WIP: op compatibility mode

master
wocsor 2021-11-15 12:41:17 -07:00
parent 60936e46e6
commit d527579b41
1 changed files with 40 additions and 30 deletions
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10
board/smart_dsu/main.c
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@ -235,6 +235,7 @@ bool send = 0;
#define ACC_CTRL 0xF10 #define ACC_CTRL 0xF10
#define ACC_CTRL_OP 0x343 #define ACC_CTRL_OP 0x343
bool enable_acc = 0; bool enable_acc = 0;
bool op_ctrl_mode = 0;
int acc_cmd = 0; int acc_cmd = 0;
#define AEB_CTRL 0xF11 #define AEB_CTRL 0xF11
@ -284,6 +285,9 @@ void CAN1_RX0_IRQ_Handler(void) {
} }
break; break;
case ACC_CTRL_OP: // hack to allow the firmware to support stock OP case ACC_CTRL_OP: // hack to allow the firmware to support stock OP
to_fwd.RIR &= 0xFFFFFFFE; // do not fwd
op_ctrl_mode = 1;
break;
case ACC_CTRL: case ACC_CTRL:
// send this EXACTLY how ACC_CONTROL is sent // send this EXACTLY how ACC_CONTROL is sent
for (int i=0; i<8; i++) { for (int i=0; i<8; i++) {
@ -388,6 +392,11 @@ void CAN3_RX0_IRQ_Handler(void) {
switch (address) { switch (address) {
case DSU_ACC_CONTROL: // ACC_CTRL case DSU_ACC_CONTROL: // ACC_CTRL
if (op_ctrl_mode){
to_fwd.RIR &= 0xFFFFFFFE; // do not fwd
// op_ctrl_mode = 0;
// for now, just set this flag until the next reboot
} else {
for (int i=0; i<8; i++) { for (int i=0; i<8; i++) {
dat[i] = GET_BYTE(&CAN3->sFIFOMailBox[0], i); dat[i] = GET_BYTE(&CAN3->sFIFOMailBox[0], i);
} }
@ -421,6 +430,7 @@ void CAN3_RX0_IRQ_Handler(void) {
puts("\n"); puts("\n");
#endif #endif
} }
}
break; break;
case DSU_AEB_CMD: // AEB BRAKING case DSU_AEB_CMD: // AEB BRAKING
for (int i=0; i<8; i++) { for (int i=0; i<8; i++) {