Update in PCB from sidloc schematic

* Change SPI CLK of FPGA to L18 * Fixes #44 and #45 Signed-off-by: Agis Zisimatos <agzisim@gmail.com>
2022-04-26 17:04:15 +03:00 · 2022-04-26 17:04:15 +03:00 · 8fc3b2df0d
parent aa2a8d5806
commit 8fc3b2df0d
3 changed files with 1490 additions and 1354 deletions
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