2005-11-10 07:26:51 -07:00
|
|
|
/*
|
|
|
|
* linux/arch/arm/mach-omap2/io.c
|
|
|
|
*
|
|
|
|
* OMAP2 I/O mapping code
|
|
|
|
*
|
|
|
|
* Copyright (C) 2005 Nokia Corporation
|
2009-05-28 15:16:04 -06:00
|
|
|
* Copyright (C) 2007-2009 Texas Instruments
|
2008-10-06 06:49:36 -06:00
|
|
|
*
|
|
|
|
* Author:
|
|
|
|
* Juha Yrjola <juha.yrjola@nokia.com>
|
|
|
|
* Syed Khasim <x0khasim@ti.com>
|
2005-11-10 07:26:51 -07:00
|
|
|
*
|
2009-05-28 15:16:04 -06:00
|
|
|
* Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
|
|
|
|
*
|
2005-11-10 07:26:51 -07:00
|
|
|
* This program is free software; you can redistribute it and/or modify
|
|
|
|
* it under the terms of the GNU General Public License version 2 as
|
|
|
|
* published by the Free Software Foundation.
|
|
|
|
*/
|
|
|
|
|
|
|
|
#include <linux/module.h>
|
|
|
|
#include <linux/kernel.h>
|
|
|
|
#include <linux/init.h>
|
2008-09-06 05:10:45 -06:00
|
|
|
#include <linux/io.h>
|
2009-06-19 19:08:25 -06:00
|
|
|
#include <linux/clk.h>
|
2009-08-03 06:06:36 -06:00
|
|
|
#include <linux/omapfb.h>
|
2005-11-10 07:26:51 -07:00
|
|
|
|
2006-04-02 10:46:27 -06:00
|
|
|
#include <asm/tlb.h>
|
|
|
|
|
|
|
|
#include <asm/mach/map.h>
|
|
|
|
|
2009-10-20 10:40:47 -06:00
|
|
|
#include <plat/sram.h>
|
|
|
|
#include <plat/sdrc.h>
|
|
|
|
#include <plat/gpmc.h>
|
|
|
|
#include <plat/serial.h>
|
2008-10-06 06:49:36 -06:00
|
|
|
|
2010-01-26 20:13:12 -07:00
|
|
|
#include "clock2xxx.h"
|
OMAP3/4 clock: split into per-chip family files
clock34xx_data.c now contains data for the OMAP34xx family, the
OMAP36xx family, and the OMAP3517 family, so rename it to
clock3xxx_data.c. Rename clock34xx.c to clock3xxx.c, and move the
chip family-specific clock functions to clock34xx.c, clock36xx.c, or
clock3517.c, as appropriate. So now "clock3xxx.*" refers to the OMAP3
superset.
The main goal here is to prepare to compile chip family-specific clock
functions only for kernel builds that target that chip family. To get to
that point, we also need to add CONFIG_SOC_* options for those other
chip families; that will be done in future patches, planned for 2.6.35.
OMAP4 is also affected by this. It duplicated the OMAP3 non-CORE DPLL
clkops structure. The OMAP4 variant of this clkops structure has been
removed, and since there was nothing else currently in clock44xx.c, it
too has been removed -- it can always be added back later when there
is some content for it. (The OMAP4 clock autogeneration scripts have been
updated accordingly.)
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>
Cc: Rajendra Nayak <rnayak@ti.com>
Cc: Ranjith Lohithakshan <ranjithl@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
2010-02-22 22:09:20 -07:00
|
|
|
#include "clock3xxx.h"
|
2010-01-26 20:13:12 -07:00
|
|
|
#include "clock44xx.h"
|
2010-10-08 11:00:19 -06:00
|
|
|
#include "io.h"
|
2005-11-10 07:26:51 -07:00
|
|
|
|
2009-10-20 10:40:47 -06:00
|
|
|
#include <plat/omap-pm.h>
|
2010-12-21 21:05:16 -07:00
|
|
|
#include "powerdomain.h"
|
2005-11-10 07:26:51 -07:00
|
|
|
|
2010-12-21 21:05:15 -07:00
|
|
|
#include "clockdomain.h"
|
2009-10-20 10:40:47 -06:00
|
|
|
#include <plat/omap_hwmod.h>
|
2010-12-09 16:49:23 -07:00
|
|
|
#include <plat/multi.h>
|
2009-09-03 11:14:05 -06:00
|
|
|
|
2005-11-10 07:26:51 -07:00
|
|
|
/*
|
|
|
|
* The machine specific code may provide the extra mapping besides the
|
|
|
|
* default mapping provided here.
|
|
|
|
*/
|
2008-10-09 08:51:41 -06:00
|
|
|
|
2010-02-12 13:26:47 -07:00
|
|
|
#ifdef CONFIG_ARCH_OMAP2
|
2008-10-09 08:51:41 -06:00
|
|
|
static struct map_desc omap24xx_io_desc[] __initdata = {
|
2005-11-10 07:26:51 -07:00
|
|
|
{
|
|
|
|
.virtual = L3_24XX_VIRT,
|
|
|
|
.pfn = __phys_to_pfn(L3_24XX_PHYS),
|
|
|
|
.length = L3_24XX_SIZE,
|
|
|
|
.type = MT_DEVICE
|
|
|
|
},
|
2008-02-20 16:30:06 -07:00
|
|
|
{
|
2008-10-09 08:51:41 -06:00
|
|
|
.virtual = L4_24XX_VIRT,
|
|
|
|
.pfn = __phys_to_pfn(L4_24XX_PHYS),
|
|
|
|
.length = L4_24XX_SIZE,
|
|
|
|
.type = MT_DEVICE
|
2008-02-20 16:30:06 -07:00
|
|
|
},
|
2008-10-09 08:51:41 -06:00
|
|
|
};
|
|
|
|
|
|
|
|
#ifdef CONFIG_ARCH_OMAP2420
|
|
|
|
static struct map_desc omap242x_io_desc[] __initdata = {
|
|
|
|
{
|
2010-01-08 15:23:05 -07:00
|
|
|
.virtual = DSP_MEM_2420_VIRT,
|
|
|
|
.pfn = __phys_to_pfn(DSP_MEM_2420_PHYS),
|
|
|
|
.length = DSP_MEM_2420_SIZE,
|
2008-10-09 08:51:41 -06:00
|
|
|
.type = MT_DEVICE
|
|
|
|
},
|
|
|
|
{
|
2010-01-08 15:23:05 -07:00
|
|
|
.virtual = DSP_IPI_2420_VIRT,
|
|
|
|
.pfn = __phys_to_pfn(DSP_IPI_2420_PHYS),
|
|
|
|
.length = DSP_IPI_2420_SIZE,
|
2008-10-09 08:51:41 -06:00
|
|
|
.type = MT_DEVICE
|
2008-02-20 16:30:06 -07:00
|
|
|
},
|
2008-10-09 08:51:41 -06:00
|
|
|
{
|
2010-01-08 15:23:05 -07:00
|
|
|
.virtual = DSP_MMU_2420_VIRT,
|
|
|
|
.pfn = __phys_to_pfn(DSP_MMU_2420_PHYS),
|
|
|
|
.length = DSP_MMU_2420_SIZE,
|
2008-10-09 08:51:41 -06:00
|
|
|
.type = MT_DEVICE
|
|
|
|
},
|
|
|
|
};
|
|
|
|
|
|
|
|
#endif
|
|
|
|
|
2006-12-06 18:14:05 -07:00
|
|
|
#ifdef CONFIG_ARCH_OMAP2430
|
2008-10-09 08:51:41 -06:00
|
|
|
static struct map_desc omap243x_io_desc[] __initdata = {
|
2006-12-06 18:14:05 -07:00
|
|
|
{
|
|
|
|
.virtual = L4_WK_243X_VIRT,
|
|
|
|
.pfn = __phys_to_pfn(L4_WK_243X_PHYS),
|
|
|
|
.length = L4_WK_243X_SIZE,
|
|
|
|
.type = MT_DEVICE
|
|
|
|
},
|
|
|
|
{
|
|
|
|
.virtual = OMAP243X_GPMC_VIRT,
|
|
|
|
.pfn = __phys_to_pfn(OMAP243X_GPMC_PHYS),
|
|
|
|
.length = OMAP243X_GPMC_SIZE,
|
|
|
|
.type = MT_DEVICE
|
|
|
|
},
|
2008-10-09 08:51:41 -06:00
|
|
|
{
|
|
|
|
.virtual = OMAP243X_SDRC_VIRT,
|
|
|
|
.pfn = __phys_to_pfn(OMAP243X_SDRC_PHYS),
|
|
|
|
.length = OMAP243X_SDRC_SIZE,
|
|
|
|
.type = MT_DEVICE
|
|
|
|
},
|
|
|
|
{
|
|
|
|
.virtual = OMAP243X_SMS_VIRT,
|
|
|
|
.pfn = __phys_to_pfn(OMAP243X_SMS_PHYS),
|
|
|
|
.length = OMAP243X_SMS_SIZE,
|
|
|
|
.type = MT_DEVICE
|
|
|
|
},
|
|
|
|
};
|
2006-12-06 18:14:05 -07:00
|
|
|
#endif
|
|
|
|
#endif
|
2008-10-09 08:51:41 -06:00
|
|
|
|
2010-02-12 13:26:48 -07:00
|
|
|
#ifdef CONFIG_ARCH_OMAP3
|
2008-10-09 08:51:41 -06:00
|
|
|
static struct map_desc omap34xx_io_desc[] __initdata = {
|
2005-11-10 07:26:51 -07:00
|
|
|
{
|
2008-10-09 08:51:41 -06:00
|
|
|
.virtual = L3_34XX_VIRT,
|
|
|
|
.pfn = __phys_to_pfn(L3_34XX_PHYS),
|
|
|
|
.length = L3_34XX_SIZE,
|
2006-12-07 14:58:10 -07:00
|
|
|
.type = MT_DEVICE
|
|
|
|
},
|
|
|
|
{
|
2008-10-09 08:51:41 -06:00
|
|
|
.virtual = L4_34XX_VIRT,
|
|
|
|
.pfn = __phys_to_pfn(L4_34XX_PHYS),
|
|
|
|
.length = L4_34XX_SIZE,
|
2006-12-07 14:58:10 -07:00
|
|
|
.type = MT_DEVICE
|
|
|
|
},
|
2008-10-09 08:51:41 -06:00
|
|
|
{
|
|
|
|
.virtual = OMAP34XX_GPMC_VIRT,
|
|
|
|
.pfn = __phys_to_pfn(OMAP34XX_GPMC_PHYS),
|
|
|
|
.length = OMAP34XX_GPMC_SIZE,
|
2005-11-10 07:26:51 -07:00
|
|
|
.type = MT_DEVICE
|
2008-10-09 08:51:41 -06:00
|
|
|
},
|
|
|
|
{
|
|
|
|
.virtual = OMAP343X_SMS_VIRT,
|
|
|
|
.pfn = __phys_to_pfn(OMAP343X_SMS_PHYS),
|
|
|
|
.length = OMAP343X_SMS_SIZE,
|
|
|
|
.type = MT_DEVICE
|
|
|
|
},
|
|
|
|
{
|
|
|
|
.virtual = OMAP343X_SDRC_VIRT,
|
|
|
|
.pfn = __phys_to_pfn(OMAP343X_SDRC_PHYS),
|
|
|
|
.length = OMAP343X_SDRC_SIZE,
|
2005-11-10 07:26:51 -07:00
|
|
|
.type = MT_DEVICE
|
2008-10-09 08:51:41 -06:00
|
|
|
},
|
|
|
|
{
|
|
|
|
.virtual = L4_PER_34XX_VIRT,
|
|
|
|
.pfn = __phys_to_pfn(L4_PER_34XX_PHYS),
|
|
|
|
.length = L4_PER_34XX_SIZE,
|
|
|
|
.type = MT_DEVICE
|
|
|
|
},
|
|
|
|
{
|
|
|
|
.virtual = L4_EMU_34XX_VIRT,
|
|
|
|
.pfn = __phys_to_pfn(L4_EMU_34XX_PHYS),
|
|
|
|
.length = L4_EMU_34XX_SIZE,
|
|
|
|
.type = MT_DEVICE
|
|
|
|
},
|
2010-04-30 13:57:14 -06:00
|
|
|
#if defined(CONFIG_DEBUG_LL) && \
|
|
|
|
(defined(CONFIG_MACH_OMAP_ZOOM2) || defined(CONFIG_MACH_OMAP_ZOOM3))
|
|
|
|
{
|
|
|
|
.virtual = ZOOM_UART_VIRT,
|
|
|
|
.pfn = __phys_to_pfn(ZOOM_UART_BASE),
|
|
|
|
.length = SZ_1M,
|
|
|
|
.type = MT_DEVICE
|
|
|
|
},
|
|
|
|
#endif
|
2005-11-10 07:26:51 -07:00
|
|
|
};
|
2008-10-09 08:51:41 -06:00
|
|
|
#endif
|
2009-05-28 15:16:04 -06:00
|
|
|
#ifdef CONFIG_ARCH_OMAP4
|
|
|
|
static struct map_desc omap44xx_io_desc[] __initdata = {
|
|
|
|
{
|
|
|
|
.virtual = L3_44XX_VIRT,
|
|
|
|
.pfn = __phys_to_pfn(L3_44XX_PHYS),
|
|
|
|
.length = L3_44XX_SIZE,
|
|
|
|
.type = MT_DEVICE,
|
|
|
|
},
|
|
|
|
{
|
|
|
|
.virtual = L4_44XX_VIRT,
|
|
|
|
.pfn = __phys_to_pfn(L4_44XX_PHYS),
|
|
|
|
.length = L4_44XX_SIZE,
|
|
|
|
.type = MT_DEVICE,
|
|
|
|
},
|
|
|
|
{
|
|
|
|
.virtual = OMAP44XX_GPMC_VIRT,
|
|
|
|
.pfn = __phys_to_pfn(OMAP44XX_GPMC_PHYS),
|
|
|
|
.length = OMAP44XX_GPMC_SIZE,
|
|
|
|
.type = MT_DEVICE,
|
|
|
|
},
|
2009-10-19 18:25:57 -06:00
|
|
|
{
|
|
|
|
.virtual = OMAP44XX_EMIF1_VIRT,
|
|
|
|
.pfn = __phys_to_pfn(OMAP44XX_EMIF1_PHYS),
|
|
|
|
.length = OMAP44XX_EMIF1_SIZE,
|
|
|
|
.type = MT_DEVICE,
|
|
|
|
},
|
|
|
|
{
|
|
|
|
.virtual = OMAP44XX_EMIF2_VIRT,
|
|
|
|
.pfn = __phys_to_pfn(OMAP44XX_EMIF2_PHYS),
|
|
|
|
.length = OMAP44XX_EMIF2_SIZE,
|
|
|
|
.type = MT_DEVICE,
|
|
|
|
},
|
|
|
|
{
|
|
|
|
.virtual = OMAP44XX_DMM_VIRT,
|
|
|
|
.pfn = __phys_to_pfn(OMAP44XX_DMM_PHYS),
|
|
|
|
.length = OMAP44XX_DMM_SIZE,
|
|
|
|
.type = MT_DEVICE,
|
|
|
|
},
|
2009-05-28 15:16:04 -06:00
|
|
|
{
|
|
|
|
.virtual = L4_PER_44XX_VIRT,
|
|
|
|
.pfn = __phys_to_pfn(L4_PER_44XX_PHYS),
|
|
|
|
.length = L4_PER_44XX_SIZE,
|
|
|
|
.type = MT_DEVICE,
|
|
|
|
},
|
|
|
|
{
|
|
|
|
.virtual = L4_EMU_44XX_VIRT,
|
|
|
|
.pfn = __phys_to_pfn(L4_EMU_44XX_PHYS),
|
|
|
|
.length = L4_EMU_44XX_SIZE,
|
|
|
|
.type = MT_DEVICE,
|
|
|
|
},
|
|
|
|
};
|
|
|
|
#endif
|
2005-11-10 07:26:51 -07:00
|
|
|
|
2010-02-12 13:26:47 -07:00
|
|
|
static void __init _omap2_map_common_io(void)
|
|
|
|
{
|
|
|
|
/* Normally devicemaps_init() would flush caches and tlb after
|
|
|
|
* mdesc->map_io(), but we must also do it here because of the CPU
|
|
|
|
* revision check below.
|
|
|
|
*/
|
|
|
|
local_flush_tlb_all();
|
|
|
|
flush_cache_all();
|
|
|
|
|
|
|
|
omap2_check_revision();
|
|
|
|
omap_sram_init();
|
|
|
|
}
|
|
|
|
|
|
|
|
#ifdef CONFIG_ARCH_OMAP2420
|
2010-03-03 09:24:53 -07:00
|
|
|
void __init omap242x_map_common_io(void)
|
2005-11-10 07:26:51 -07:00
|
|
|
{
|
2008-10-09 08:51:41 -06:00
|
|
|
iotable_init(omap24xx_io_desc, ARRAY_SIZE(omap24xx_io_desc));
|
|
|
|
iotable_init(omap242x_io_desc, ARRAY_SIZE(omap242x_io_desc));
|
2010-02-12 13:26:47 -07:00
|
|
|
_omap2_map_common_io();
|
|
|
|
}
|
2008-10-09 08:51:41 -06:00
|
|
|
#endif
|
|
|
|
|
2010-02-12 13:26:47 -07:00
|
|
|
#ifdef CONFIG_ARCH_OMAP2430
|
2010-03-03 09:24:53 -07:00
|
|
|
void __init omap243x_map_common_io(void)
|
2010-02-12 13:26:47 -07:00
|
|
|
{
|
2008-10-09 08:51:41 -06:00
|
|
|
iotable_init(omap24xx_io_desc, ARRAY_SIZE(omap24xx_io_desc));
|
|
|
|
iotable_init(omap243x_io_desc, ARRAY_SIZE(omap243x_io_desc));
|
2010-02-12 13:26:47 -07:00
|
|
|
_omap2_map_common_io();
|
|
|
|
}
|
2008-10-09 08:51:41 -06:00
|
|
|
#endif
|
|
|
|
|
2010-02-12 13:26:48 -07:00
|
|
|
#ifdef CONFIG_ARCH_OMAP3
|
2010-03-03 09:24:53 -07:00
|
|
|
void __init omap34xx_map_common_io(void)
|
2010-02-12 13:26:47 -07:00
|
|
|
{
|
2008-10-09 08:51:41 -06:00
|
|
|
iotable_init(omap34xx_io_desc, ARRAY_SIZE(omap34xx_io_desc));
|
2010-02-12 13:26:47 -07:00
|
|
|
_omap2_map_common_io();
|
|
|
|
}
|
2008-10-09 08:51:41 -06:00
|
|
|
#endif
|
2006-04-02 10:46:27 -06:00
|
|
|
|
2010-02-12 13:26:47 -07:00
|
|
|
#ifdef CONFIG_ARCH_OMAP4
|
2010-03-03 09:24:53 -07:00
|
|
|
void __init omap44xx_map_common_io(void)
|
2010-02-12 13:26:47 -07:00
|
|
|
{
|
2009-05-28 15:16:04 -06:00
|
|
|
iotable_init(omap44xx_io_desc, ARRAY_SIZE(omap44xx_io_desc));
|
2010-02-12 13:26:47 -07:00
|
|
|
_omap2_map_common_io();
|
2006-04-02 10:46:27 -06:00
|
|
|
}
|
2010-02-12 13:26:47 -07:00
|
|
|
#endif
|
2006-04-02 10:46:27 -06:00
|
|
|
|
2009-06-19 19:08:25 -06:00
|
|
|
/*
|
|
|
|
* omap2_init_reprogram_sdrc - reprogram SDRC timing parameters
|
|
|
|
*
|
|
|
|
* Sets the CORE DPLL3 M2 divider to the same value that it's at
|
|
|
|
* currently. This has the effect of setting the SDRC SDRAM AC timing
|
|
|
|
* registers to the values currently defined by the kernel. Currently
|
|
|
|
* only defined for OMAP3; will return 0 if called on OMAP2. Returns
|
|
|
|
* -EINVAL if the dpll3_m2_ck cannot be found, 0 if called on OMAP2,
|
|
|
|
* or passes along the return value of clk_set_rate().
|
|
|
|
*/
|
|
|
|
static int __init _omap2_init_reprogram_sdrc(void)
|
|
|
|
{
|
|
|
|
struct clk *dpll3_m2_ck;
|
|
|
|
int v = -EINVAL;
|
|
|
|
long rate;
|
|
|
|
|
|
|
|
if (!cpu_is_omap34xx())
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
dpll3_m2_ck = clk_get(NULL, "dpll3_m2_ck");
|
2010-11-30 07:17:58 -07:00
|
|
|
if (IS_ERR(dpll3_m2_ck))
|
2009-06-19 19:08:25 -06:00
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
rate = clk_get_rate(dpll3_m2_ck);
|
|
|
|
pr_info("Reprogramming SDRC clock to %ld Hz\n", rate);
|
|
|
|
v = clk_set_rate(dpll3_m2_ck, rate);
|
|
|
|
if (v)
|
|
|
|
pr_err("dpll3_m2_clk rate change failed: %d\n", v);
|
|
|
|
|
|
|
|
clk_put(dpll3_m2_ck);
|
|
|
|
|
|
|
|
return v;
|
|
|
|
}
|
|
|
|
|
2010-12-14 12:42:35 -07:00
|
|
|
static int _set_hwmod_postsetup_state(struct omap_hwmod *oh, void *data)
|
|
|
|
{
|
|
|
|
return omap_hwmod_set_postsetup_state(oh, *(u8 *)data);
|
|
|
|
}
|
|
|
|
|
2011-01-07 04:57:44 -07:00
|
|
|
void __iomem *omap_irq_base;
|
|
|
|
|
2010-12-09 16:49:23 -07:00
|
|
|
/*
|
|
|
|
* Initialize asm_irq_base for entry-macro.S
|
|
|
|
*/
|
|
|
|
static inline void omap_irq_base_init(void)
|
|
|
|
{
|
2010-12-14 20:17:31 -07:00
|
|
|
if (cpu_is_omap24xx())
|
2010-12-09 16:49:23 -07:00
|
|
|
omap_irq_base = OMAP2_L4_IO_ADDRESS(OMAP24XX_IC_BASE);
|
|
|
|
else if (cpu_is_omap34xx())
|
|
|
|
omap_irq_base = OMAP2_L4_IO_ADDRESS(OMAP34XX_IC_BASE);
|
|
|
|
else if (cpu_is_omap44xx())
|
|
|
|
omap_irq_base = OMAP2_L4_IO_ADDRESS(OMAP44XX_GIC_CPU_BASE);
|
|
|
|
else
|
|
|
|
pr_err("Could not initialize omap_irq_base\n");
|
|
|
|
}
|
|
|
|
|
OMAP2+: io: split omap2_init_common_hw()
Split omap2_init_common_hw() into two functions. The first,
omap2_init_common_infrastructure(), initializes the hwmod code and
data, the OMAP PM code, and the clock code and data. The second,
omap2_init_common_devices(), handles any other early device
initialization that, for whatever reason, has not been or cannot be
moved to initcalls or early platform devices.
This patch is required for the hwmod postsetup patch, which allows
board files to change the state that hwmods should be placed into at
the conclusion of the hwmod _setup() function. For example, for a
board whose creators wish to ensure watchdog coverage across the
entire kernel boot process, code to change the watchdog's postsetup
state will be added in the board-*.c file between the
omap2_init_common_infrastructure() and omap2_init_common_devices() function
calls.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Tony Lindgren <tony@atomide.com>
2010-12-21 15:25:10 -07:00
|
|
|
void __init omap2_init_common_infrastructure(void)
|
2006-04-02 10:46:27 -06:00
|
|
|
{
|
2010-12-14 12:42:35 -07:00
|
|
|
u8 postsetup_state;
|
|
|
|
|
2010-12-21 20:01:20 -07:00
|
|
|
if (cpu_is_omap242x()) {
|
|
|
|
omap2xxx_powerdomains_init();
|
2010-12-21 20:01:20 -07:00
|
|
|
omap2_clockdomains_init();
|
2010-02-22 22:09:32 -07:00
|
|
|
omap2420_hwmod_init();
|
2010-12-21 20:01:20 -07:00
|
|
|
} else if (cpu_is_omap243x()) {
|
|
|
|
omap2xxx_powerdomains_init();
|
2010-12-21 20:01:20 -07:00
|
|
|
omap2_clockdomains_init();
|
2010-02-22 22:09:32 -07:00
|
|
|
omap2430_hwmod_init();
|
2010-12-21 20:01:20 -07:00
|
|
|
} else if (cpu_is_omap34xx()) {
|
|
|
|
omap3xxx_powerdomains_init();
|
2010-12-21 20:01:20 -07:00
|
|
|
omap2_clockdomains_init();
|
2010-02-22 22:09:32 -07:00
|
|
|
omap3xxx_hwmod_init();
|
2010-12-21 20:01:20 -07:00
|
|
|
} else if (cpu_is_omap44xx()) {
|
|
|
|
omap44xx_powerdomains_init();
|
2010-12-21 20:01:20 -07:00
|
|
|
omap44xx_clockdomains_init();
|
2010-05-12 09:54:36 -06:00
|
|
|
omap44xx_hwmod_init();
|
2010-12-21 20:01:20 -07:00
|
|
|
} else {
|
2010-12-14 12:42:35 -07:00
|
|
|
pr_err("Could not init hwmod data - unknown SoC\n");
|
2010-12-21 20:01:20 -07:00
|
|
|
}
|
2010-12-14 12:42:35 -07:00
|
|
|
|
|
|
|
/* Set the default postsetup state for all hwmods */
|
|
|
|
#ifdef CONFIG_PM_RUNTIME
|
|
|
|
postsetup_state = _HWMOD_STATE_IDLE;
|
|
|
|
#else
|
|
|
|
postsetup_state = _HWMOD_STATE_ENABLED;
|
|
|
|
#endif
|
|
|
|
omap_hwmod_for_each(_set_hwmod_postsetup_state, &postsetup_state);
|
2010-05-12 09:54:36 -06:00
|
|
|
|
OMAP2+: wd_timer: disable on boot via hwmod postsetup mechanism
The OMAP watchdog timer IP blocks require a specific set of register
writes to occur before they will be disabled[1], even if the device
clocks appear to be disabled in the CM_*CLKEN registers. In the MPU
watchdog case, failure to execute this reset sequence will eventually
cause the watchdog to reset the OMAP unexpectedly.
Previously, the code to disable this watchdog was manually called from
mach-omap2/devices.c during device initialization. This causes the
watchdog to be unconditionally disabled for a portion of kernel
initialization. This should be controllable by the board-*.c files,
since some system integrators will want full watchdog coverage of
kernel initialization. Also, the watchdog disable code was not
connected to the hwmod shutdown code. This means that calling
omap_hwmod_shutdown() will not, in fact, disable the watchdog, and the
goal of omap_hwmod_shutdown() is to be able to shutdown any on-chip
OMAP device.
To resolve the latter problem, populate the pre_shutdown pointer in
the watchdog timer hwmod classes with a function that executes the
watchdog shutdown sequence. This allows the hwmod code to fully
disable the watchdog.
Then, to allow some board files to support watchdog coverage
throughout kernel initialization, add common code to mach-omap2/io.c
to cause the MPU watchdog to be disabled on boot unless a board file
specifically requests it to remain enabled. Board files can do this
by changing the watchdog timer hwmod's postsetup state between the
omap2_init_common_infrastructure() and omap2_init_common_devices()
function calls.
1. OMAP34xx Multimedia Device Silicon Revision 3.1.x Rev. ZH
[SWPU222H], Section 16.4.3.6, "Start/Stop Sequence for WDTs (Using
WDTi.WSPR Register)"
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Charulatha Varadarajan <charu@ti.com>
2010-12-21 15:39:15 -07:00
|
|
|
/*
|
|
|
|
* Set the default postsetup state for unusual modules (like
|
|
|
|
* MPU WDT).
|
|
|
|
*
|
|
|
|
* The postsetup_state is not actually used until
|
|
|
|
* omap_hwmod_late_init(), so boards that desire full watchdog
|
|
|
|
* coverage of kernel initialization can reprogram the
|
|
|
|
* postsetup_state between the calls to
|
|
|
|
* omap2_init_common_infra() and omap2_init_common_devices().
|
|
|
|
*
|
|
|
|
* XXX ideally we could detect whether the MPU WDT was currently
|
|
|
|
* enabled here and make this conditional
|
|
|
|
*/
|
|
|
|
postsetup_state = _HWMOD_STATE_DISABLED;
|
|
|
|
omap_hwmod_for_each_by_class("wd_timer",
|
|
|
|
_set_hwmod_postsetup_state,
|
|
|
|
&postsetup_state);
|
|
|
|
|
2010-12-09 08:13:48 -07:00
|
|
|
omap_pm_if_early_init();
|
2010-01-26 20:13:12 -07:00
|
|
|
|
OMAP2 clock: split OMAP2420, OMAP2430 clock data into their own files
In preparation for multi-OMAP2 kernels, split
mach-omap2/clock2xxx_data.c into mach-omap2/clock2420_data.c and
mach-omap2/clock2430_data.c. 2430 uses a different device space
physical memory layout than past or future OMAPs, and we use a
different virtual memory layout as well, which causes trouble for
architecture-level code/data that tries to support both. We tried
using offsets from the virtual base last year, but those patches never
made it upstream; so after some discussion with Tony about the best
all-around approach, we'll just grit our teeth and duplicate the
structures. The maintenance advantages of a single kernel config that
can compile and boot on OMAP2, 3, and 4 platforms are simply too
compelling.
This approach does have some nice benefits beyond multi-OMAP 2 kernel
support. The runtime size of OMAP2420-specific and OMAP2430-specific
kernels is smaller, since unused clocks for the other OMAP2 chip will
no longer be compiled in. (At some point we will mark the clock data
__initdata and allocate it during registration, which will eliminate
the runtime memory advantage.) It also makes the clock trees slightly
easier to read, since 2420-specific and 2430-specific clocks are no
longer mixed together.
This patch also splits 2430-specific clock code into its own file,
mach-omap2/clock2430.c, which is only compiled in for 2430 builds -
mostly for organizational clarity.
While here, fix a bug in the OMAP2430 clock tree: "emul_ck" was
incorrectly marked as being 2420-only, when actually it is present on
both OMAP2420 and OMAP2430.
Thanks to Tony for some good discussions about how to approach this
problem.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Richard Woodruff <r-woodruff2@ti.com>
2010-02-22 22:09:22 -07:00
|
|
|
if (cpu_is_omap2420())
|
|
|
|
omap2420_clk_init();
|
|
|
|
else if (cpu_is_omap2430())
|
|
|
|
omap2430_clk_init();
|
2010-01-26 20:13:12 -07:00
|
|
|
else if (cpu_is_omap34xx())
|
|
|
|
omap3xxx_clk_init();
|
|
|
|
else if (cpu_is_omap44xx())
|
|
|
|
omap4xxx_clk_init();
|
|
|
|
else
|
2010-12-14 12:42:35 -07:00
|
|
|
pr_err("Could not init clock framework - unknown SoC\n");
|
OMAP2+: io: split omap2_init_common_hw()
Split omap2_init_common_hw() into two functions. The first,
omap2_init_common_infrastructure(), initializes the hwmod code and
data, the OMAP PM code, and the clock code and data. The second,
omap2_init_common_devices(), handles any other early device
initialization that, for whatever reason, has not been or cannot be
moved to initcalls or early platform devices.
This patch is required for the hwmod postsetup patch, which allows
board files to change the state that hwmods should be placed into at
the conclusion of the hwmod _setup() function. For example, for a
board whose creators wish to ensure watchdog coverage across the
entire kernel boot process, code to change the watchdog's postsetup
state will be added in the board-*.c file between the
omap2_init_common_infrastructure() and omap2_init_common_devices() function
calls.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Tony Lindgren <tony@atomide.com>
2010-12-21 15:25:10 -07:00
|
|
|
}
|
|
|
|
|
|
|
|
void __init omap2_init_common_devices(struct omap_sdrc_params *sdrc_cs0,
|
|
|
|
struct omap_sdrc_params *sdrc_cs1)
|
|
|
|
{
|
2010-03-10 10:16:31 -07:00
|
|
|
if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
|
|
|
|
omap2_sdrc_init(sdrc_cs0, sdrc_cs1);
|
|
|
|
_omap2_init_reprogram_sdrc();
|
|
|
|
}
|
2006-06-26 17:16:16 -06:00
|
|
|
gpmc_init();
|
2010-12-09 16:49:23 -07:00
|
|
|
|
|
|
|
omap_irq_base_init();
|
2005-11-10 07:26:51 -07:00
|
|
|
}
|
2010-12-10 10:46:24 -07:00
|
|
|
|
|
|
|
/*
|
|
|
|
* NOTE: Please use ioremap + __raw_read/write where possible instead of these
|
|
|
|
*/
|
|
|
|
|
|
|
|
u8 omap_readb(u32 pa)
|
|
|
|
{
|
|
|
|
return __raw_readb(OMAP2_L4_IO_ADDRESS(pa));
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(omap_readb);
|
|
|
|
|
|
|
|
u16 omap_readw(u32 pa)
|
|
|
|
{
|
|
|
|
return __raw_readw(OMAP2_L4_IO_ADDRESS(pa));
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(omap_readw);
|
|
|
|
|
|
|
|
u32 omap_readl(u32 pa)
|
|
|
|
{
|
|
|
|
return __raw_readl(OMAP2_L4_IO_ADDRESS(pa));
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(omap_readl);
|
|
|
|
|
|
|
|
void omap_writeb(u8 v, u32 pa)
|
|
|
|
{
|
|
|
|
__raw_writeb(v, OMAP2_L4_IO_ADDRESS(pa));
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(omap_writeb);
|
|
|
|
|
|
|
|
void omap_writew(u16 v, u32 pa)
|
|
|
|
{
|
|
|
|
__raw_writew(v, OMAP2_L4_IO_ADDRESS(pa));
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(omap_writew);
|
|
|
|
|
|
|
|
void omap_writel(u32 v, u32 pa)
|
|
|
|
{
|
|
|
|
__raw_writel(v, OMAP2_L4_IO_ADDRESS(pa));
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(omap_writel);
|