2009-11-02 16:53:02 -07:00
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/*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: Rafał Miłecki <zajec5@gmail.com>
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2009-12-28 11:58:44 -07:00
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* Alex Deucher <alexdeucher@gmail.com>
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2009-11-02 16:53:02 -07:00
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*/
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2012-10-02 11:01:07 -06:00
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#include <drm/drmP.h>
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2009-11-02 16:53:02 -07:00
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#include "radeon.h"
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2010-02-17 22:58:36 -07:00
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#include "avivod.h"
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2011-04-12 12:49:23 -06:00
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#include "atom.h"
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2014-12-07 14:10:45 -07:00
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#include "r600_dpm.h"
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2010-05-07 13:10:16 -06:00
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#include <linux/power_supply.h>
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2010-07-02 10:58:16 -06:00
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#include <linux/hwmon.h>
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#include <linux/hwmon-sysfs.h>
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2009-11-02 16:53:02 -07:00
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2009-12-22 15:02:16 -07:00
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#define RADEON_IDLE_LOOP_MS 100
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#define RADEON_RECLOCK_DELAY_MS 200
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2010-01-07 16:22:47 -07:00
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#define RADEON_WAIT_VBLANK_TIMEOUT 200
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2009-12-22 15:02:16 -07:00
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2010-06-07 16:29:44 -06:00
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static const char *radeon_pm_state_type_name[5] = {
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2012-10-01 16:28:09 -06:00
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"",
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2010-06-07 16:29:44 -06:00
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"Powersave",
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"Battery",
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"Balanced",
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"Performance",
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};
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2010-05-07 13:10:16 -06:00
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static void radeon_dynpm_idle_work_handler(struct work_struct *work);
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2009-12-22 15:02:16 -07:00
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static int radeon_debugfs_pm_init(struct radeon_device *rdev);
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2010-05-07 13:10:16 -06:00
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static bool radeon_pm_in_vbl(struct radeon_device *rdev);
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static bool radeon_pm_debug_check_in_vbl(struct radeon_device *rdev, bool finish);
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static void radeon_pm_update_profile(struct radeon_device *rdev);
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static void radeon_pm_set_clocks(struct radeon_device *rdev);
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2016-10-22 17:05:33 -06:00
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static void radeon_pm_compute_clocks_dpm(struct radeon_device *rdev);
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2010-05-07 13:10:16 -06:00
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2011-11-04 08:09:41 -06:00
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int radeon_pm_get_type_index(struct radeon_device *rdev,
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enum radeon_pm_state_type ps_type,
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int instance)
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{
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int i;
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int found_instance = -1;
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for (i = 0; i < rdev->pm.num_power_states; i++) {
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if (rdev->pm.power_state[i].type == ps_type) {
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found_instance++;
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if (found_instance == instance)
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return i;
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}
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}
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/* return default if no match */
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return rdev->pm.default_power_state_index;
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}
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2012-07-31 15:14:35 -06:00
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void radeon_pm_acpi_event_handler(struct radeon_device *rdev)
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2010-05-07 13:10:16 -06:00
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{
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2013-09-09 17:11:52 -06:00
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if ((rdev->pm.pm_method == PM_METHOD_DPM) && rdev->pm.dpm_enabled) {
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mutex_lock(&rdev->pm.mutex);
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if (power_supply_is_system_supplied() > 0)
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rdev->pm.dpm.ac_power = true;
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else
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rdev->pm.dpm.ac_power = false;
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2014-06-18 12:23:46 -06:00
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if (rdev->family == CHIP_ARUBA) {
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if (rdev->asic->dpm.enable_bapm)
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radeon_dpm_enable_bapm(rdev, rdev->pm.dpm.ac_power);
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}
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2013-09-09 17:11:52 -06:00
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mutex_unlock(&rdev->pm.mutex);
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2016-10-22 17:05:33 -06:00
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/* allow new DPM state to be picked */
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radeon_pm_compute_clocks_dpm(rdev);
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2016-03-16 05:56:45 -06:00
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} else if (rdev->pm.pm_method == PM_METHOD_PROFILE) {
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2012-07-31 15:14:35 -06:00
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if (rdev->pm.profile == PM_PROFILE_AUTO) {
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mutex_lock(&rdev->pm.mutex);
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radeon_pm_update_profile(rdev);
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radeon_pm_set_clocks(rdev);
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mutex_unlock(&rdev->pm.mutex);
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2010-05-07 13:10:16 -06:00
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}
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}
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}
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static void radeon_pm_update_profile(struct radeon_device *rdev)
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{
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switch (rdev->pm.profile) {
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case PM_PROFILE_DEFAULT:
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rdev->pm.profile_index = PM_PROFILE_DEFAULT_IDX;
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break;
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case PM_PROFILE_AUTO:
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if (power_supply_is_system_supplied() > 0) {
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if (rdev->pm.active_crtc_count > 1)
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rdev->pm.profile_index = PM_PROFILE_HIGH_MH_IDX;
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else
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rdev->pm.profile_index = PM_PROFILE_HIGH_SH_IDX;
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} else {
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if (rdev->pm.active_crtc_count > 1)
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2010-06-02 15:56:01 -06:00
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rdev->pm.profile_index = PM_PROFILE_MID_MH_IDX;
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2010-05-07 13:10:16 -06:00
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else
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2010-06-02 15:56:01 -06:00
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rdev->pm.profile_index = PM_PROFILE_MID_SH_IDX;
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2010-05-07 13:10:16 -06:00
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}
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break;
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case PM_PROFILE_LOW:
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if (rdev->pm.active_crtc_count > 1)
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rdev->pm.profile_index = PM_PROFILE_LOW_MH_IDX;
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else
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rdev->pm.profile_index = PM_PROFILE_LOW_SH_IDX;
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break;
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2010-06-02 15:56:01 -06:00
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case PM_PROFILE_MID:
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if (rdev->pm.active_crtc_count > 1)
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rdev->pm.profile_index = PM_PROFILE_MID_MH_IDX;
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else
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rdev->pm.profile_index = PM_PROFILE_MID_SH_IDX;
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break;
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2010-05-07 13:10:16 -06:00
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case PM_PROFILE_HIGH:
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if (rdev->pm.active_crtc_count > 1)
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rdev->pm.profile_index = PM_PROFILE_HIGH_MH_IDX;
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else
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rdev->pm.profile_index = PM_PROFILE_HIGH_SH_IDX;
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break;
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}
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if (rdev->pm.active_crtc_count == 0) {
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rdev->pm.requested_power_state_index =
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rdev->pm.profiles[rdev->pm.profile_index].dpms_off_ps_idx;
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rdev->pm.requested_clock_mode_index =
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rdev->pm.profiles[rdev->pm.profile_index].dpms_off_cm_idx;
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} else {
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rdev->pm.requested_power_state_index =
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rdev->pm.profiles[rdev->pm.profile_index].dpms_on_ps_idx;
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rdev->pm.requested_clock_mode_index =
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rdev->pm.profiles[rdev->pm.profile_index].dpms_on_cm_idx;
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}
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}
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2009-12-22 15:02:16 -07:00
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2010-04-26 13:52:20 -06:00
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static void radeon_unmap_vram_bos(struct radeon_device *rdev)
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{
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struct radeon_bo *bo, *n;
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if (list_empty(&rdev->gem.objects))
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return;
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list_for_each_entry_safe(bo, n, &rdev->gem.objects, list) {
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if (bo->tbo.mem.mem_type == TTM_PL_VRAM)
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ttm_bo_unmap_virtual(&bo->tbo);
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}
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}
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2010-05-07 13:10:16 -06:00
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static void radeon_sync_with_vblank(struct radeon_device *rdev)
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2010-04-24 12:50:23 -06:00
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{
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2010-05-07 13:10:16 -06:00
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if (rdev->pm.active_crtcs) {
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rdev->pm.vblank_sync = false;
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wait_event_timeout(
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rdev->irq.vblank_queue, rdev->pm.vblank_sync,
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msecs_to_jiffies(RADEON_WAIT_VBLANK_TIMEOUT));
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}
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}
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static void radeon_set_power_state(struct radeon_device *rdev)
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{
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u32 sclk, mclk;
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2010-05-27 15:01:41 -06:00
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bool misc_after = false;
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2010-05-07 13:10:16 -06:00
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if ((rdev->pm.requested_clock_mode_index == rdev->pm.current_clock_mode_index) &&
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(rdev->pm.requested_power_state_index == rdev->pm.current_power_state_index))
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return;
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if (radeon_gui_idle(rdev)) {
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sclk = rdev->pm.power_state[rdev->pm.requested_power_state_index].
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clock_info[rdev->pm.requested_clock_mode_index].sclk;
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2011-01-06 19:19:26 -07:00
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if (sclk > rdev->pm.default_sclk)
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sclk = rdev->pm.default_sclk;
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2010-05-07 13:10:16 -06:00
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2012-10-01 17:25:11 -06:00
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/* starting with BTC, there is one state that is used for both
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* MH and SH. Difference is that we always use the high clock index for
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2013-02-11 06:44:48 -07:00
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* mclk and vddci.
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2012-10-01 17:25:11 -06:00
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*/
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if ((rdev->pm.pm_method == PM_METHOD_PROFILE) &&
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(rdev->family >= CHIP_BARTS) &&
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rdev->pm.active_crtc_count &&
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((rdev->pm.profile_index == PM_PROFILE_MID_MH_IDX) ||
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(rdev->pm.profile_index == PM_PROFILE_LOW_MH_IDX)))
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mclk = rdev->pm.power_state[rdev->pm.requested_power_state_index].
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clock_info[rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_on_cm_idx].mclk;
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else
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mclk = rdev->pm.power_state[rdev->pm.requested_power_state_index].
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clock_info[rdev->pm.requested_clock_mode_index].mclk;
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2011-01-06 19:19:26 -07:00
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if (mclk > rdev->pm.default_mclk)
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mclk = rdev->pm.default_mclk;
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2010-05-07 13:10:16 -06:00
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2010-05-27 15:01:41 -06:00
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/* upvolt before raising clocks, downvolt after lowering clocks */
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if (sclk < rdev->pm.current_sclk)
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misc_after = true;
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2010-05-07 13:10:16 -06:00
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2010-05-27 15:01:41 -06:00
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radeon_sync_with_vblank(rdev);
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2010-05-07 13:10:16 -06:00
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2010-05-27 15:01:41 -06:00
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if (rdev->pm.pm_method == PM_METHOD_DYNPM) {
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2010-05-07 13:10:16 -06:00
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if (!radeon_pm_in_vbl(rdev))
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return;
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2010-05-27 15:01:41 -06:00
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}
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2010-05-07 13:10:16 -06:00
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2010-05-27 15:01:41 -06:00
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radeon_pm_prepare(rdev);
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2010-05-07 13:10:16 -06:00
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2010-05-27 15:01:41 -06:00
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if (!misc_after)
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/* voltage, pcie lanes, etc.*/
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radeon_pm_misc(rdev);
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/* set engine clock */
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if (sclk != rdev->pm.current_sclk) {
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radeon_pm_debug_check_in_vbl(rdev, false);
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radeon_set_engine_clock(rdev, sclk);
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radeon_pm_debug_check_in_vbl(rdev, true);
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rdev->pm.current_sclk = sclk;
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2010-08-01 18:42:55 -06:00
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DRM_DEBUG_DRIVER("Setting: e: %d\n", sclk);
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2010-05-27 15:01:41 -06:00
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}
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/* set memory clock */
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2012-02-23 15:53:48 -07:00
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if (rdev->asic->pm.set_memory_clock && (mclk != rdev->pm.current_mclk)) {
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2010-05-27 15:01:41 -06:00
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radeon_pm_debug_check_in_vbl(rdev, false);
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radeon_set_memory_clock(rdev, mclk);
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radeon_pm_debug_check_in_vbl(rdev, true);
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rdev->pm.current_mclk = mclk;
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2010-08-01 18:42:55 -06:00
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DRM_DEBUG_DRIVER("Setting: m: %d\n", mclk);
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2010-05-07 13:10:16 -06:00
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}
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2010-04-26 13:45:23 -06:00
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2010-05-27 15:01:41 -06:00
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if (misc_after)
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/* voltage, pcie lanes, etc.*/
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radeon_pm_misc(rdev);
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radeon_pm_finish(rdev);
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2010-05-07 13:10:16 -06:00
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rdev->pm.current_power_state_index = rdev->pm.requested_power_state_index;
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rdev->pm.current_clock_mode_index = rdev->pm.requested_clock_mode_index;
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} else
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2010-08-01 18:42:55 -06:00
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DRM_DEBUG_DRIVER("pm: GUI not idle!!!\n");
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2010-05-07 13:10:16 -06:00
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}
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static void radeon_pm_set_clocks(struct radeon_device *rdev)
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{
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2016-06-06 08:41:44 -06:00
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struct drm_crtc *crtc;
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2012-12-17 09:04:32 -07:00
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int i, r;
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2010-04-27 11:58:46 -06:00
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2010-08-13 08:53:35 -06:00
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/* no need to take locks, etc. if nothing's going to change */
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if ((rdev->pm.requested_clock_mode_index == rdev->pm.current_clock_mode_index) &&
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(rdev->pm.requested_power_state_index == rdev->pm.current_power_state_index))
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return;
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2012-05-11 06:57:18 -06:00
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down_write(&rdev->pm.mclk_lock);
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2012-05-09 07:34:45 -06:00
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mutex_lock(&rdev->ring_lock);
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2010-04-29 14:14:02 -06:00
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2012-08-10 11:12:08 -06:00
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/* wait for the rings to drain */
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for (i = 0; i < RADEON_NUM_RINGS; i++) {
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struct radeon_ring *ring = &rdev->ring[i];
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2012-12-17 09:04:32 -07:00
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if (!ring->ready) {
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continue;
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}
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2014-02-18 07:58:31 -07:00
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r = radeon_fence_wait_empty(rdev, i);
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2012-12-17 09:04:32 -07:00
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if (r) {
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/* needs a GPU reset dont reset here */
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mutex_unlock(&rdev->ring_lock);
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up_write(&rdev->pm.mclk_lock);
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return;
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}
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2010-04-29 14:14:02 -06:00
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}
|
2012-08-10 11:12:08 -06:00
|
|
|
|
2010-04-26 13:52:20 -06:00
|
|
|
radeon_unmap_vram_bos(rdev);
|
|
|
|
|
2010-05-07 13:10:16 -06:00
|
|
|
if (rdev->irq.installed) {
|
2016-06-06 08:41:44 -06:00
|
|
|
i = 0;
|
|
|
|
drm_for_each_crtc(crtc, rdev->ddev) {
|
2010-04-26 13:45:23 -06:00
|
|
|
if (rdev->pm.active_crtcs & (1 << i)) {
|
2016-02-12 12:30:31 -07:00
|
|
|
/* This can fail if a modeset is in progress */
|
2016-06-06 08:41:44 -06:00
|
|
|
if (drm_crtc_vblank_get(crtc) == 0)
|
2016-02-12 12:30:31 -07:00
|
|
|
rdev->pm.req_vblank |= (1 << i);
|
|
|
|
else
|
|
|
|
DRM_DEBUG_DRIVER("crtc %d no vblank, can glitch\n",
|
|
|
|
i);
|
2010-04-26 13:45:23 -06:00
|
|
|
}
|
2016-06-06 08:41:44 -06:00
|
|
|
i++;
|
2010-04-26 13:45:23 -06:00
|
|
|
}
|
|
|
|
}
|
2010-04-28 22:22:43 -06:00
|
|
|
|
2010-05-07 13:10:16 -06:00
|
|
|
radeon_set_power_state(rdev);
|
2010-04-26 13:45:23 -06:00
|
|
|
|
2010-05-07 13:10:16 -06:00
|
|
|
if (rdev->irq.installed) {
|
2016-06-06 08:41:44 -06:00
|
|
|
i = 0;
|
|
|
|
drm_for_each_crtc(crtc, rdev->ddev) {
|
2010-04-26 13:45:23 -06:00
|
|
|
if (rdev->pm.req_vblank & (1 << i)) {
|
|
|
|
rdev->pm.req_vblank &= ~(1 << i);
|
2016-06-06 08:41:44 -06:00
|
|
|
drm_crtc_vblank_put(crtc);
|
2010-04-26 13:45:23 -06:00
|
|
|
}
|
2016-06-06 08:41:44 -06:00
|
|
|
i++;
|
2010-04-26 13:45:23 -06:00
|
|
|
}
|
|
|
|
}
|
2010-04-26 13:52:20 -06:00
|
|
|
|
2010-04-24 12:50:23 -06:00
|
|
|
/* update display watermarks based on new power state */
|
|
|
|
radeon_update_bandwidth_info(rdev);
|
|
|
|
if (rdev->pm.active_crtc_count)
|
|
|
|
radeon_bandwidth_update(rdev);
|
|
|
|
|
2010-05-07 13:10:16 -06:00
|
|
|
rdev->pm.dynpm_planned_action = DYNPM_ACTION_NONE;
|
2010-04-26 13:45:23 -06:00
|
|
|
|
2012-05-09 07:34:45 -06:00
|
|
|
mutex_unlock(&rdev->ring_lock);
|
2012-05-11 06:57:18 -06:00
|
|
|
up_write(&rdev->pm.mclk_lock);
|
2010-04-24 12:50:23 -06:00
|
|
|
}
|
|
|
|
|
2010-06-07 16:29:44 -06:00
|
|
|
static void radeon_pm_print_states(struct radeon_device *rdev)
|
|
|
|
{
|
|
|
|
int i, j;
|
|
|
|
struct radeon_power_state *power_state;
|
|
|
|
struct radeon_pm_clock_info *clock_info;
|
|
|
|
|
2010-08-01 18:42:55 -06:00
|
|
|
DRM_DEBUG_DRIVER("%d Power State(s)\n", rdev->pm.num_power_states);
|
2010-06-07 16:29:44 -06:00
|
|
|
for (i = 0; i < rdev->pm.num_power_states; i++) {
|
|
|
|
power_state = &rdev->pm.power_state[i];
|
2010-08-01 18:42:55 -06:00
|
|
|
DRM_DEBUG_DRIVER("State %d: %s\n", i,
|
2010-06-07 16:29:44 -06:00
|
|
|
radeon_pm_state_type_name[power_state->type]);
|
|
|
|
if (i == rdev->pm.default_power_state_index)
|
2010-08-01 18:42:55 -06:00
|
|
|
DRM_DEBUG_DRIVER("\tDefault");
|
2010-06-07 16:29:44 -06:00
|
|
|
if ((rdev->flags & RADEON_IS_PCIE) && !(rdev->flags & RADEON_IS_IGP))
|
2010-08-01 18:42:55 -06:00
|
|
|
DRM_DEBUG_DRIVER("\t%d PCIE Lanes\n", power_state->pcie_lanes);
|
2010-06-07 16:29:44 -06:00
|
|
|
if (power_state->flags & RADEON_PM_STATE_SINGLE_DISPLAY_ONLY)
|
2010-08-01 18:42:55 -06:00
|
|
|
DRM_DEBUG_DRIVER("\tSingle display only\n");
|
|
|
|
DRM_DEBUG_DRIVER("\t%d Clock Mode(s)\n", power_state->num_clock_modes);
|
2010-06-07 16:29:44 -06:00
|
|
|
for (j = 0; j < power_state->num_clock_modes; j++) {
|
|
|
|
clock_info = &(power_state->clock_info[j]);
|
|
|
|
if (rdev->flags & RADEON_IS_IGP)
|
2012-10-01 16:28:09 -06:00
|
|
|
DRM_DEBUG_DRIVER("\t\t%d e: %d\n",
|
|
|
|
j,
|
|
|
|
clock_info->sclk * 10);
|
2010-06-07 16:29:44 -06:00
|
|
|
else
|
2012-10-01 16:28:09 -06:00
|
|
|
DRM_DEBUG_DRIVER("\t\t%d e: %d\tm: %d\tv: %d\n",
|
|
|
|
j,
|
|
|
|
clock_info->sclk * 10,
|
|
|
|
clock_info->mclk * 10,
|
|
|
|
clock_info->voltage.voltage);
|
2010-06-07 16:29:44 -06:00
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2010-05-07 13:10:16 -06:00
|
|
|
static ssize_t radeon_get_pm_profile(struct device *dev,
|
|
|
|
struct device_attribute *attr,
|
|
|
|
char *buf)
|
2010-04-24 12:50:23 -06:00
|
|
|
{
|
2013-09-10 02:30:44 -06:00
|
|
|
struct drm_device *ddev = dev_get_drvdata(dev);
|
2010-04-24 12:50:23 -06:00
|
|
|
struct radeon_device *rdev = ddev->dev_private;
|
2010-05-07 13:10:16 -06:00
|
|
|
int cp = rdev->pm.profile;
|
2010-04-24 12:50:23 -06:00
|
|
|
|
2010-05-07 13:10:16 -06:00
|
|
|
return snprintf(buf, PAGE_SIZE, "%s\n",
|
|
|
|
(cp == PM_PROFILE_AUTO) ? "auto" :
|
|
|
|
(cp == PM_PROFILE_LOW) ? "low" :
|
2010-07-28 05:25:58 -06:00
|
|
|
(cp == PM_PROFILE_MID) ? "mid" :
|
2010-05-07 13:10:16 -06:00
|
|
|
(cp == PM_PROFILE_HIGH) ? "high" : "default");
|
2010-04-24 12:50:23 -06:00
|
|
|
}
|
|
|
|
|
2010-05-07 13:10:16 -06:00
|
|
|
static ssize_t radeon_set_pm_profile(struct device *dev,
|
|
|
|
struct device_attribute *attr,
|
|
|
|
const char *buf,
|
|
|
|
size_t count)
|
2010-04-24 12:50:23 -06:00
|
|
|
{
|
2013-09-10 02:30:44 -06:00
|
|
|
struct drm_device *ddev = dev_get_drvdata(dev);
|
2010-04-24 12:50:23 -06:00
|
|
|
struct radeon_device *rdev = ddev->dev_private;
|
|
|
|
|
2014-05-19 17:21:29 -06:00
|
|
|
/* Can't set profile when the card is off */
|
|
|
|
if ((rdev->flags & RADEON_IS_PX) &&
|
|
|
|
(ddev->switch_power_state != DRM_SWITCH_POWER_ON))
|
|
|
|
return -EINVAL;
|
|
|
|
|
2010-04-24 12:50:23 -06:00
|
|
|
mutex_lock(&rdev->pm.mutex);
|
2010-05-07 13:10:16 -06:00
|
|
|
if (rdev->pm.pm_method == PM_METHOD_PROFILE) {
|
|
|
|
if (strncmp("default", buf, strlen("default")) == 0)
|
|
|
|
rdev->pm.profile = PM_PROFILE_DEFAULT;
|
|
|
|
else if (strncmp("auto", buf, strlen("auto")) == 0)
|
|
|
|
rdev->pm.profile = PM_PROFILE_AUTO;
|
|
|
|
else if (strncmp("low", buf, strlen("low")) == 0)
|
|
|
|
rdev->pm.profile = PM_PROFILE_LOW;
|
2010-06-02 15:56:01 -06:00
|
|
|
else if (strncmp("mid", buf, strlen("mid")) == 0)
|
|
|
|
rdev->pm.profile = PM_PROFILE_MID;
|
2010-05-07 13:10:16 -06:00
|
|
|
else if (strncmp("high", buf, strlen("high")) == 0)
|
|
|
|
rdev->pm.profile = PM_PROFILE_HIGH;
|
|
|
|
else {
|
2011-03-23 09:14:09 -06:00
|
|
|
count = -EINVAL;
|
2010-05-07 13:10:16 -06:00
|
|
|
goto fail;
|
2010-04-24 12:50:23 -06:00
|
|
|
}
|
2010-05-07 13:10:16 -06:00
|
|
|
radeon_pm_update_profile(rdev);
|
|
|
|
radeon_pm_set_clocks(rdev);
|
2011-03-23 09:14:09 -06:00
|
|
|
} else
|
|
|
|
count = -EINVAL;
|
|
|
|
|
2010-05-07 13:10:16 -06:00
|
|
|
fail:
|
2010-04-24 12:50:23 -06:00
|
|
|
mutex_unlock(&rdev->pm.mutex);
|
|
|
|
|
|
|
|
return count;
|
|
|
|
}
|
|
|
|
|
2010-05-07 13:10:16 -06:00
|
|
|
static ssize_t radeon_get_pm_method(struct device *dev,
|
|
|
|
struct device_attribute *attr,
|
|
|
|
char *buf)
|
2010-04-24 12:50:23 -06:00
|
|
|
{
|
2013-09-10 02:30:44 -06:00
|
|
|
struct drm_device *ddev = dev_get_drvdata(dev);
|
2010-04-24 12:50:23 -06:00
|
|
|
struct radeon_device *rdev = ddev->dev_private;
|
2010-05-07 13:10:16 -06:00
|
|
|
int pm = rdev->pm.pm_method;
|
2010-04-24 12:50:23 -06:00
|
|
|
|
|
|
|
return snprintf(buf, PAGE_SIZE, "%s\n",
|
2013-04-12 11:55:22 -06:00
|
|
|
(pm == PM_METHOD_DYNPM) ? "dynpm" :
|
|
|
|
(pm == PM_METHOD_PROFILE) ? "profile" : "dpm");
|
2010-04-24 12:50:23 -06:00
|
|
|
}
|
|
|
|
|
2010-05-07 13:10:16 -06:00
|
|
|
static ssize_t radeon_set_pm_method(struct device *dev,
|
|
|
|
struct device_attribute *attr,
|
|
|
|
const char *buf,
|
|
|
|
size_t count)
|
2010-04-24 12:50:23 -06:00
|
|
|
{
|
2013-09-10 02:30:44 -06:00
|
|
|
struct drm_device *ddev = dev_get_drvdata(dev);
|
2010-04-24 12:50:23 -06:00
|
|
|
struct radeon_device *rdev = ddev->dev_private;
|
|
|
|
|
2014-05-19 17:21:29 -06:00
|
|
|
/* Can't set method when the card is off */
|
|
|
|
if ((rdev->flags & RADEON_IS_PX) &&
|
|
|
|
(ddev->switch_power_state != DRM_SWITCH_POWER_ON)) {
|
|
|
|
count = -EINVAL;
|
|
|
|
goto fail;
|
|
|
|
}
|
|
|
|
|
2013-04-12 11:55:22 -06:00
|
|
|
/* we don't support the legacy modes with dpm */
|
|
|
|
if (rdev->pm.pm_method == PM_METHOD_DPM) {
|
|
|
|
count = -EINVAL;
|
|
|
|
goto fail;
|
|
|
|
}
|
2010-05-07 13:10:16 -06:00
|
|
|
|
|
|
|
if (strncmp("dynpm", buf, strlen("dynpm")) == 0) {
|
2010-04-24 12:50:23 -06:00
|
|
|
mutex_lock(&rdev->pm.mutex);
|
2010-05-07 13:10:16 -06:00
|
|
|
rdev->pm.pm_method = PM_METHOD_DYNPM;
|
|
|
|
rdev->pm.dynpm_state = DYNPM_STATE_PAUSED;
|
|
|
|
rdev->pm.dynpm_planned_action = DYNPM_ACTION_DEFAULT;
|
2010-04-24 12:50:23 -06:00
|
|
|
mutex_unlock(&rdev->pm.mutex);
|
2010-05-07 13:10:16 -06:00
|
|
|
} else if (strncmp("profile", buf, strlen("profile")) == 0) {
|
|
|
|
mutex_lock(&rdev->pm.mutex);
|
|
|
|
/* disable dynpm */
|
|
|
|
rdev->pm.dynpm_state = DYNPM_STATE_DISABLED;
|
|
|
|
rdev->pm.dynpm_planned_action = DYNPM_ACTION_NONE;
|
DRM / radeon / KMS: Fix hibernation regression related to radeon PM (was: Re: [Regression, post-2.6.34] Hibernation broken on machines with radeon/KMS and r300)
There is a regression from 2.6.34 related to the recent radeon power
management changes, caused by attempting to cancel a delayed work
item that's never been scheduled. However, the code as is has some
other issues potentially leading to visible problems.
First, the mutex around cancel_delayed_work() in radeon_pm_suspend()
doesn't really serve any purpose, because cancel_delayed_work() only
tries to delete the work's timer. Moreover, it doesn't prevent the
work handler from running, so the handler can do some wrong things if
it wins the race and in that case it will rearm itself to do some
more wrong things going forward. So, I think it's better to wait for
the handler to return in case it's already been queued up for
execution. Also, it should be prevented from rearming itself in that
case.
Second, in radeon_set_pm_method() the cancel_delayed_work() is not
sufficient to prevent the work handler from running and queing up
itself for the next run (the failure scenario is that
cancel_delayed_work() returns 0, so the handler is run, it waits on
the mutex and then rearms itself after the mutex has been released),
so again the work handler should be prevented from rearming itself in
that case..
Finally, there's a potential deadlock in radeon_pm_fini(), because
cancel_delayed_work_sync() is called under rdev->pm.mutex, but the
work handler tries to acquire the same mutex (if it wins the race).
Fix the issues described above.
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
Reviewed-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-06-17 17:02:27 -06:00
|
|
|
rdev->pm.pm_method = PM_METHOD_PROFILE;
|
2010-05-07 13:10:16 -06:00
|
|
|
mutex_unlock(&rdev->pm.mutex);
|
2011-01-03 06:49:32 -07:00
|
|
|
cancel_delayed_work_sync(&rdev->pm.dynpm_idle_work);
|
2010-05-07 13:10:16 -06:00
|
|
|
} else {
|
2011-03-23 09:14:09 -06:00
|
|
|
count = -EINVAL;
|
2010-05-07 13:10:16 -06:00
|
|
|
goto fail;
|
|
|
|
}
|
|
|
|
radeon_pm_compute_clocks(rdev);
|
|
|
|
fail:
|
2010-04-24 12:50:23 -06:00
|
|
|
return count;
|
|
|
|
}
|
|
|
|
|
2013-04-12 11:55:22 -06:00
|
|
|
static ssize_t radeon_get_dpm_state(struct device *dev,
|
|
|
|
struct device_attribute *attr,
|
|
|
|
char *buf)
|
|
|
|
{
|
2013-09-10 02:30:44 -06:00
|
|
|
struct drm_device *ddev = dev_get_drvdata(dev);
|
2013-04-12 11:55:22 -06:00
|
|
|
struct radeon_device *rdev = ddev->dev_private;
|
|
|
|
enum radeon_pm_state_type pm = rdev->pm.dpm.user_state;
|
|
|
|
|
|
|
|
return snprintf(buf, PAGE_SIZE, "%s\n",
|
|
|
|
(pm == POWER_STATE_TYPE_BATTERY) ? "battery" :
|
|
|
|
(pm == POWER_STATE_TYPE_BALANCED) ? "balanced" : "performance");
|
|
|
|
}
|
|
|
|
|
|
|
|
static ssize_t radeon_set_dpm_state(struct device *dev,
|
|
|
|
struct device_attribute *attr,
|
|
|
|
const char *buf,
|
|
|
|
size_t count)
|
|
|
|
{
|
2013-09-10 02:30:44 -06:00
|
|
|
struct drm_device *ddev = dev_get_drvdata(dev);
|
2013-04-12 11:55:22 -06:00
|
|
|
struct radeon_device *rdev = ddev->dev_private;
|
|
|
|
|
|
|
|
mutex_lock(&rdev->pm.mutex);
|
|
|
|
if (strncmp("battery", buf, strlen("battery")) == 0)
|
|
|
|
rdev->pm.dpm.user_state = POWER_STATE_TYPE_BATTERY;
|
|
|
|
else if (strncmp("balanced", buf, strlen("balanced")) == 0)
|
|
|
|
rdev->pm.dpm.user_state = POWER_STATE_TYPE_BALANCED;
|
|
|
|
else if (strncmp("performance", buf, strlen("performance")) == 0)
|
|
|
|
rdev->pm.dpm.user_state = POWER_STATE_TYPE_PERFORMANCE;
|
|
|
|
else {
|
|
|
|
mutex_unlock(&rdev->pm.mutex);
|
|
|
|
count = -EINVAL;
|
|
|
|
goto fail;
|
|
|
|
}
|
|
|
|
mutex_unlock(&rdev->pm.mutex);
|
2014-08-11 11:01:58 -06:00
|
|
|
|
|
|
|
/* Can't set dpm state when the card is off */
|
|
|
|
if (!(rdev->flags & RADEON_IS_PX) ||
|
|
|
|
(ddev->switch_power_state == DRM_SWITCH_POWER_ON))
|
|
|
|
radeon_pm_compute_clocks(rdev);
|
|
|
|
|
2013-04-12 11:55:22 -06:00
|
|
|
fail:
|
|
|
|
return count;
|
|
|
|
}
|
|
|
|
|
2013-07-02 16:38:02 -06:00
|
|
|
static ssize_t radeon_get_dpm_forced_performance_level(struct device *dev,
|
|
|
|
struct device_attribute *attr,
|
|
|
|
char *buf)
|
|
|
|
{
|
2013-09-10 02:30:44 -06:00
|
|
|
struct drm_device *ddev = dev_get_drvdata(dev);
|
2013-07-02 16:38:02 -06:00
|
|
|
struct radeon_device *rdev = ddev->dev_private;
|
|
|
|
enum radeon_dpm_forced_level level = rdev->pm.dpm.forced_level;
|
|
|
|
|
2014-05-19 17:21:29 -06:00
|
|
|
if ((rdev->flags & RADEON_IS_PX) &&
|
|
|
|
(ddev->switch_power_state != DRM_SWITCH_POWER_ON))
|
|
|
|
return snprintf(buf, PAGE_SIZE, "off\n");
|
|
|
|
|
2013-07-02 16:38:02 -06:00
|
|
|
return snprintf(buf, PAGE_SIZE, "%s\n",
|
|
|
|
(level == RADEON_DPM_FORCED_LEVEL_AUTO) ? "auto" :
|
|
|
|
(level == RADEON_DPM_FORCED_LEVEL_LOW) ? "low" : "high");
|
|
|
|
}
|
|
|
|
|
|
|
|
static ssize_t radeon_set_dpm_forced_performance_level(struct device *dev,
|
|
|
|
struct device_attribute *attr,
|
|
|
|
const char *buf,
|
|
|
|
size_t count)
|
|
|
|
{
|
2013-09-10 02:30:44 -06:00
|
|
|
struct drm_device *ddev = dev_get_drvdata(dev);
|
2013-07-02 16:38:02 -06:00
|
|
|
struct radeon_device *rdev = ddev->dev_private;
|
|
|
|
enum radeon_dpm_forced_level level;
|
|
|
|
int ret = 0;
|
|
|
|
|
2014-05-19 17:21:29 -06:00
|
|
|
/* Can't force performance level when the card is off */
|
|
|
|
if ((rdev->flags & RADEON_IS_PX) &&
|
|
|
|
(ddev->switch_power_state != DRM_SWITCH_POWER_ON))
|
|
|
|
return -EINVAL;
|
|
|
|
|
2013-07-02 16:38:02 -06:00
|
|
|
mutex_lock(&rdev->pm.mutex);
|
|
|
|
if (strncmp("low", buf, strlen("low")) == 0) {
|
|
|
|
level = RADEON_DPM_FORCED_LEVEL_LOW;
|
|
|
|
} else if (strncmp("high", buf, strlen("high")) == 0) {
|
|
|
|
level = RADEON_DPM_FORCED_LEVEL_HIGH;
|
|
|
|
} else if (strncmp("auto", buf, strlen("auto")) == 0) {
|
|
|
|
level = RADEON_DPM_FORCED_LEVEL_AUTO;
|
|
|
|
} else {
|
|
|
|
count = -EINVAL;
|
|
|
|
goto fail;
|
|
|
|
}
|
|
|
|
if (rdev->asic->dpm.force_performance_level) {
|
2013-10-23 15:22:29 -06:00
|
|
|
if (rdev->pm.dpm.thermal_active) {
|
|
|
|
count = -EINVAL;
|
|
|
|
goto fail;
|
|
|
|
}
|
2013-07-02 16:38:02 -06:00
|
|
|
ret = radeon_dpm_force_performance_level(rdev, level);
|
|
|
|
if (ret)
|
|
|
|
count = -EINVAL;
|
|
|
|
}
|
|
|
|
fail:
|
2013-10-23 15:22:29 -06:00
|
|
|
mutex_unlock(&rdev->pm.mutex);
|
|
|
|
|
2013-07-02 16:38:02 -06:00
|
|
|
return count;
|
|
|
|
}
|
|
|
|
|
2014-12-07 14:10:45 -07:00
|
|
|
static ssize_t radeon_hwmon_get_pwm1_enable(struct device *dev,
|
|
|
|
struct device_attribute *attr,
|
|
|
|
char *buf)
|
|
|
|
{
|
|
|
|
struct radeon_device *rdev = dev_get_drvdata(dev);
|
|
|
|
u32 pwm_mode = 0;
|
|
|
|
|
|
|
|
if (rdev->asic->dpm.fan_ctrl_get_mode)
|
|
|
|
pwm_mode = rdev->asic->dpm.fan_ctrl_get_mode(rdev);
|
|
|
|
|
|
|
|
/* never 0 (full-speed), fuse or smc-controlled always */
|
|
|
|
return sprintf(buf, "%i\n", pwm_mode == FDO_PWM_MODE_STATIC ? 1 : 2);
|
|
|
|
}
|
|
|
|
|
|
|
|
static ssize_t radeon_hwmon_set_pwm1_enable(struct device *dev,
|
|
|
|
struct device_attribute *attr,
|
|
|
|
const char *buf,
|
|
|
|
size_t count)
|
|
|
|
{
|
|
|
|
struct radeon_device *rdev = dev_get_drvdata(dev);
|
|
|
|
int err;
|
|
|
|
int value;
|
|
|
|
|
|
|
|
if(!rdev->asic->dpm.fan_ctrl_set_mode)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
err = kstrtoint(buf, 10, &value);
|
|
|
|
if (err)
|
|
|
|
return err;
|
|
|
|
|
2015-02-04 15:18:55 -07:00
|
|
|
switch (value) {
|
2014-12-07 14:10:45 -07:00
|
|
|
case 1: /* manual, percent-based */
|
|
|
|
rdev->asic->dpm.fan_ctrl_set_mode(rdev, FDO_PWM_MODE_STATIC);
|
|
|
|
break;
|
|
|
|
default: /* disable */
|
|
|
|
rdev->asic->dpm.fan_ctrl_set_mode(rdev, 0);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
return count;
|
|
|
|
}
|
|
|
|
|
|
|
|
static ssize_t radeon_hwmon_get_pwm1_min(struct device *dev,
|
|
|
|
struct device_attribute *attr,
|
|
|
|
char *buf)
|
|
|
|
{
|
|
|
|
return sprintf(buf, "%i\n", 0);
|
|
|
|
}
|
|
|
|
|
|
|
|
static ssize_t radeon_hwmon_get_pwm1_max(struct device *dev,
|
|
|
|
struct device_attribute *attr,
|
|
|
|
char *buf)
|
|
|
|
{
|
2015-02-04 15:18:55 -07:00
|
|
|
return sprintf(buf, "%i\n", 255);
|
2014-12-07 14:10:45 -07:00
|
|
|
}
|
|
|
|
|
|
|
|
static ssize_t radeon_hwmon_set_pwm1(struct device *dev,
|
|
|
|
struct device_attribute *attr,
|
|
|
|
const char *buf, size_t count)
|
|
|
|
{
|
|
|
|
struct radeon_device *rdev = dev_get_drvdata(dev);
|
|
|
|
int err;
|
|
|
|
u32 value;
|
|
|
|
|
|
|
|
err = kstrtou32(buf, 10, &value);
|
|
|
|
if (err)
|
|
|
|
return err;
|
|
|
|
|
2015-02-04 15:18:55 -07:00
|
|
|
value = (value * 100) / 255;
|
|
|
|
|
2014-12-07 14:10:45 -07:00
|
|
|
err = rdev->asic->dpm.set_fan_speed_percent(rdev, value);
|
|
|
|
if (err)
|
|
|
|
return err;
|
|
|
|
|
|
|
|
return count;
|
|
|
|
}
|
|
|
|
|
|
|
|
static ssize_t radeon_hwmon_get_pwm1(struct device *dev,
|
|
|
|
struct device_attribute *attr,
|
|
|
|
char *buf)
|
|
|
|
{
|
|
|
|
struct radeon_device *rdev = dev_get_drvdata(dev);
|
|
|
|
int err;
|
|
|
|
u32 speed;
|
|
|
|
|
|
|
|
err = rdev->asic->dpm.get_fan_speed_percent(rdev, &speed);
|
|
|
|
if (err)
|
|
|
|
return err;
|
|
|
|
|
2015-02-04 15:18:55 -07:00
|
|
|
speed = (speed * 255) / 100;
|
|
|
|
|
2014-12-07 14:10:45 -07:00
|
|
|
return sprintf(buf, "%i\n", speed);
|
|
|
|
}
|
|
|
|
|
2010-05-07 13:10:16 -06:00
|
|
|
static DEVICE_ATTR(power_profile, S_IRUGO | S_IWUSR, radeon_get_pm_profile, radeon_set_pm_profile);
|
|
|
|
static DEVICE_ATTR(power_method, S_IRUGO | S_IWUSR, radeon_get_pm_method, radeon_set_pm_method);
|
2013-04-12 11:55:22 -06:00
|
|
|
static DEVICE_ATTR(power_dpm_state, S_IRUGO | S_IWUSR, radeon_get_dpm_state, radeon_set_dpm_state);
|
2013-07-02 16:38:02 -06:00
|
|
|
static DEVICE_ATTR(power_dpm_force_performance_level, S_IRUGO | S_IWUSR,
|
|
|
|
radeon_get_dpm_forced_performance_level,
|
|
|
|
radeon_set_dpm_forced_performance_level);
|
2010-04-24 12:50:23 -06:00
|
|
|
|
2010-07-02 10:58:16 -06:00
|
|
|
static ssize_t radeon_hwmon_show_temp(struct device *dev,
|
|
|
|
struct device_attribute *attr,
|
|
|
|
char *buf)
|
|
|
|
{
|
2013-11-22 22:52:00 -07:00
|
|
|
struct radeon_device *rdev = dev_get_drvdata(dev);
|
2014-05-19 17:21:29 -06:00
|
|
|
struct drm_device *ddev = rdev->ddev;
|
2011-02-01 14:12:34 -07:00
|
|
|
int temp;
|
2010-07-02 10:58:16 -06:00
|
|
|
|
2014-05-19 17:21:29 -06:00
|
|
|
/* Can't get temperature when the card is off */
|
|
|
|
if ((rdev->flags & RADEON_IS_PX) &&
|
|
|
|
(ddev->switch_power_state != DRM_SWITCH_POWER_ON))
|
|
|
|
return -EINVAL;
|
|
|
|
|
2013-06-21 12:38:03 -06:00
|
|
|
if (rdev->asic->pm.get_temperature)
|
|
|
|
temp = radeon_get_temperature(rdev);
|
|
|
|
else
|
2010-07-02 10:58:16 -06:00
|
|
|
temp = 0;
|
|
|
|
|
|
|
|
return snprintf(buf, PAGE_SIZE, "%d\n", temp);
|
|
|
|
}
|
|
|
|
|
2013-09-10 02:32:41 -06:00
|
|
|
static ssize_t radeon_hwmon_show_temp_thresh(struct device *dev,
|
|
|
|
struct device_attribute *attr,
|
|
|
|
char *buf)
|
|
|
|
{
|
2013-12-12 16:25:57 -07:00
|
|
|
struct radeon_device *rdev = dev_get_drvdata(dev);
|
2013-09-10 02:32:41 -06:00
|
|
|
int hyst = to_sensor_dev_attr(attr)->index;
|
|
|
|
int temp;
|
|
|
|
|
|
|
|
if (hyst)
|
|
|
|
temp = rdev->pm.dpm.thermal.min_temp;
|
|
|
|
else
|
|
|
|
temp = rdev->pm.dpm.thermal.max_temp;
|
|
|
|
|
|
|
|
return snprintf(buf, PAGE_SIZE, "%d\n", temp);
|
|
|
|
}
|
|
|
|
|
2010-07-02 10:58:16 -06:00
|
|
|
static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, radeon_hwmon_show_temp, NULL, 0);
|
2013-09-10 02:32:41 -06:00
|
|
|
static SENSOR_DEVICE_ATTR(temp1_crit, S_IRUGO, radeon_hwmon_show_temp_thresh, NULL, 0);
|
|
|
|
static SENSOR_DEVICE_ATTR(temp1_crit_hyst, S_IRUGO, radeon_hwmon_show_temp_thresh, NULL, 1);
|
2014-12-07 14:10:45 -07:00
|
|
|
static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO | S_IWUSR, radeon_hwmon_get_pwm1, radeon_hwmon_set_pwm1, 0);
|
|
|
|
static SENSOR_DEVICE_ATTR(pwm1_enable, S_IRUGO | S_IWUSR, radeon_hwmon_get_pwm1_enable, radeon_hwmon_set_pwm1_enable, 0);
|
|
|
|
static SENSOR_DEVICE_ATTR(pwm1_min, S_IRUGO, radeon_hwmon_get_pwm1_min, NULL, 0);
|
|
|
|
static SENSOR_DEVICE_ATTR(pwm1_max, S_IRUGO, radeon_hwmon_get_pwm1_max, NULL, 0);
|
|
|
|
|
2010-07-02 10:58:16 -06:00
|
|
|
|
|
|
|
static struct attribute *hwmon_attributes[] = {
|
|
|
|
&sensor_dev_attr_temp1_input.dev_attr.attr,
|
2013-09-10 02:32:41 -06:00
|
|
|
&sensor_dev_attr_temp1_crit.dev_attr.attr,
|
|
|
|
&sensor_dev_attr_temp1_crit_hyst.dev_attr.attr,
|
2014-12-07 14:10:45 -07:00
|
|
|
&sensor_dev_attr_pwm1.dev_attr.attr,
|
|
|
|
&sensor_dev_attr_pwm1_enable.dev_attr.attr,
|
|
|
|
&sensor_dev_attr_pwm1_min.dev_attr.attr,
|
|
|
|
&sensor_dev_attr_pwm1_max.dev_attr.attr,
|
2010-07-02 10:58:16 -06:00
|
|
|
NULL
|
|
|
|
};
|
|
|
|
|
2013-09-10 02:32:41 -06:00
|
|
|
static umode_t hwmon_attributes_visible(struct kobject *kobj,
|
|
|
|
struct attribute *attr, int index)
|
|
|
|
{
|
2016-01-13 07:48:43 -07:00
|
|
|
struct device *dev = kobj_to_dev(kobj);
|
2013-12-12 16:25:57 -07:00
|
|
|
struct radeon_device *rdev = dev_get_drvdata(dev);
|
2014-12-07 14:10:45 -07:00
|
|
|
umode_t effective_mode = attr->mode;
|
2013-09-10 02:32:41 -06:00
|
|
|
|
2015-10-19 07:30:42 -06:00
|
|
|
/* Skip attributes if DPM is not enabled */
|
2013-09-10 02:32:41 -06:00
|
|
|
if (rdev->pm.pm_method != PM_METHOD_DPM &&
|
|
|
|
(attr == &sensor_dev_attr_temp1_crit.dev_attr.attr ||
|
2015-10-19 07:30:42 -06:00
|
|
|
attr == &sensor_dev_attr_temp1_crit_hyst.dev_attr.attr ||
|
|
|
|
attr == &sensor_dev_attr_pwm1.dev_attr.attr ||
|
|
|
|
attr == &sensor_dev_attr_pwm1_enable.dev_attr.attr ||
|
|
|
|
attr == &sensor_dev_attr_pwm1_max.dev_attr.attr ||
|
|
|
|
attr == &sensor_dev_attr_pwm1_min.dev_attr.attr))
|
2013-09-10 02:32:41 -06:00
|
|
|
return 0;
|
|
|
|
|
2014-12-07 14:10:45 -07:00
|
|
|
/* Skip fan attributes if fan is not present */
|
|
|
|
if (rdev->pm.no_fan &&
|
|
|
|
(attr == &sensor_dev_attr_pwm1.dev_attr.attr ||
|
|
|
|
attr == &sensor_dev_attr_pwm1_enable.dev_attr.attr ||
|
|
|
|
attr == &sensor_dev_attr_pwm1_max.dev_attr.attr ||
|
|
|
|
attr == &sensor_dev_attr_pwm1_min.dev_attr.attr))
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
/* mask fan attributes if we have no bindings for this asic to expose */
|
|
|
|
if ((!rdev->asic->dpm.get_fan_speed_percent &&
|
|
|
|
attr == &sensor_dev_attr_pwm1.dev_attr.attr) || /* can't query fan */
|
|
|
|
(!rdev->asic->dpm.fan_ctrl_get_mode &&
|
|
|
|
attr == &sensor_dev_attr_pwm1_enable.dev_attr.attr)) /* can't query state */
|
|
|
|
effective_mode &= ~S_IRUGO;
|
|
|
|
|
|
|
|
if ((!rdev->asic->dpm.set_fan_speed_percent &&
|
|
|
|
attr == &sensor_dev_attr_pwm1.dev_attr.attr) || /* can't manage fan */
|
|
|
|
(!rdev->asic->dpm.fan_ctrl_set_mode &&
|
|
|
|
attr == &sensor_dev_attr_pwm1_enable.dev_attr.attr)) /* can't manage state */
|
|
|
|
effective_mode &= ~S_IWUSR;
|
|
|
|
|
|
|
|
/* hide max/min values if we can't both query and manage the fan */
|
|
|
|
if ((!rdev->asic->dpm.set_fan_speed_percent &&
|
|
|
|
!rdev->asic->dpm.get_fan_speed_percent) &&
|
|
|
|
(attr == &sensor_dev_attr_pwm1_max.dev_attr.attr ||
|
|
|
|
attr == &sensor_dev_attr_pwm1_min.dev_attr.attr))
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
return effective_mode;
|
2013-09-10 02:32:41 -06:00
|
|
|
}
|
|
|
|
|
2010-07-02 10:58:16 -06:00
|
|
|
static const struct attribute_group hwmon_attrgroup = {
|
|
|
|
.attrs = hwmon_attributes,
|
2013-09-10 02:32:41 -06:00
|
|
|
.is_visible = hwmon_attributes_visible,
|
2010-07-02 10:58:16 -06:00
|
|
|
};
|
|
|
|
|
2013-11-22 22:52:00 -07:00
|
|
|
static const struct attribute_group *hwmon_groups[] = {
|
|
|
|
&hwmon_attrgroup,
|
|
|
|
NULL
|
|
|
|
};
|
|
|
|
|
2010-08-09 13:59:42 -06:00
|
|
|
static int radeon_hwmon_init(struct radeon_device *rdev)
|
2010-07-02 10:58:16 -06:00
|
|
|
{
|
2010-08-09 13:59:42 -06:00
|
|
|
int err = 0;
|
2010-07-02 10:58:16 -06:00
|
|
|
|
|
|
|
switch (rdev->pm.int_thermal_type) {
|
|
|
|
case THERMAL_TYPE_RV6XX:
|
|
|
|
case THERMAL_TYPE_RV770:
|
|
|
|
case THERMAL_TYPE_EVERGREEN:
|
2011-05-25 15:49:54 -06:00
|
|
|
case THERMAL_TYPE_NI:
|
2010-11-22 15:56:32 -07:00
|
|
|
case THERMAL_TYPE_SUMO:
|
2012-03-20 15:18:10 -06:00
|
|
|
case THERMAL_TYPE_SI:
|
2013-06-21 13:50:47 -06:00
|
|
|
case THERMAL_TYPE_CI:
|
|
|
|
case THERMAL_TYPE_KV:
|
2013-06-21 12:38:03 -06:00
|
|
|
if (rdev->asic->pm.get_temperature == NULL)
|
2012-03-20 15:18:29 -06:00
|
|
|
return err;
|
2014-04-15 10:44:32 -06:00
|
|
|
rdev->pm.int_hwmon_dev = hwmon_device_register_with_groups(rdev->dev,
|
|
|
|
"radeon", rdev,
|
|
|
|
hwmon_groups);
|
|
|
|
if (IS_ERR(rdev->pm.int_hwmon_dev)) {
|
|
|
|
err = PTR_ERR(rdev->pm.int_hwmon_dev);
|
2010-08-09 13:59:42 -06:00
|
|
|
dev_err(rdev->dev,
|
|
|
|
"Unable to register hwmon device: %d\n", err);
|
|
|
|
}
|
2010-07-02 10:58:16 -06:00
|
|
|
break;
|
|
|
|
default:
|
|
|
|
break;
|
|
|
|
}
|
2010-08-09 13:59:42 -06:00
|
|
|
|
|
|
|
return err;
|
2010-07-02 10:58:16 -06:00
|
|
|
}
|
|
|
|
|
2014-04-15 10:44:32 -06:00
|
|
|
static void radeon_hwmon_fini(struct radeon_device *rdev)
|
|
|
|
{
|
|
|
|
if (rdev->pm.int_hwmon_dev)
|
|
|
|
hwmon_device_unregister(rdev->pm.int_hwmon_dev);
|
|
|
|
}
|
|
|
|
|
2013-04-12 11:55:22 -06:00
|
|
|
static void radeon_dpm_thermal_work_handler(struct work_struct *work)
|
|
|
|
{
|
|
|
|
struct radeon_device *rdev =
|
|
|
|
container_of(work, struct radeon_device,
|
|
|
|
pm.dpm.thermal.work);
|
|
|
|
/* switch to the thermal state */
|
|
|
|
enum radeon_pm_state_type dpm_state = POWER_STATE_TYPE_INTERNAL_THERMAL;
|
|
|
|
|
|
|
|
if (!rdev->pm.dpm_enabled)
|
|
|
|
return;
|
|
|
|
|
|
|
|
if (rdev->asic->pm.get_temperature) {
|
|
|
|
int temp = radeon_get_temperature(rdev);
|
|
|
|
|
|
|
|
if (temp < rdev->pm.dpm.thermal.min_temp)
|
|
|
|
/* switch back the user state */
|
|
|
|
dpm_state = rdev->pm.dpm.user_state;
|
|
|
|
} else {
|
|
|
|
if (rdev->pm.dpm.thermal.high_to_low)
|
|
|
|
/* switch back the user state */
|
|
|
|
dpm_state = rdev->pm.dpm.user_state;
|
|
|
|
}
|
2013-07-24 12:59:48 -06:00
|
|
|
mutex_lock(&rdev->pm.mutex);
|
|
|
|
if (dpm_state == POWER_STATE_TYPE_INTERNAL_THERMAL)
|
|
|
|
rdev->pm.dpm.thermal_active = true;
|
|
|
|
else
|
|
|
|
rdev->pm.dpm.thermal_active = false;
|
|
|
|
rdev->pm.dpm.state = dpm_state;
|
|
|
|
mutex_unlock(&rdev->pm.mutex);
|
|
|
|
|
|
|
|
radeon_pm_compute_clocks(rdev);
|
2013-04-12 11:55:22 -06:00
|
|
|
}
|
|
|
|
|
2015-03-18 15:05:10 -06:00
|
|
|
static bool radeon_dpm_single_display(struct radeon_device *rdev)
|
2013-04-12 11:55:22 -06:00
|
|
|
{
|
2013-07-08 09:35:06 -06:00
|
|
|
bool single_display = (rdev->pm.dpm.new_active_crtc_count < 2) ?
|
|
|
|
true : false;
|
|
|
|
|
|
|
|
/* check if the vblank period is too short to adjust the mclk */
|
|
|
|
if (single_display && rdev->asic->dpm.vblank_too_short) {
|
|
|
|
if (radeon_dpm_vblank_too_short(rdev))
|
|
|
|
single_display = false;
|
|
|
|
}
|
2013-04-12 11:55:22 -06:00
|
|
|
|
2015-02-17 22:59:45 -07:00
|
|
|
/* 120hz tends to be problematic even if they are under the
|
|
|
|
* vblank limit.
|
|
|
|
*/
|
|
|
|
if (single_display && (r600_dpm_get_vrefresh(rdev) >= 120))
|
|
|
|
single_display = false;
|
|
|
|
|
2015-03-18 15:05:10 -06:00
|
|
|
return single_display;
|
|
|
|
}
|
|
|
|
|
|
|
|
static struct radeon_ps *radeon_dpm_pick_power_state(struct radeon_device *rdev,
|
|
|
|
enum radeon_pm_state_type dpm_state)
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
struct radeon_ps *ps;
|
|
|
|
u32 ui_class;
|
|
|
|
bool single_display = radeon_dpm_single_display(rdev);
|
|
|
|
|
2013-07-05 09:48:31 -06:00
|
|
|
/* certain older asics have a separare 3D performance state,
|
|
|
|
* so try that first if the user selected performance
|
|
|
|
*/
|
|
|
|
if (dpm_state == POWER_STATE_TYPE_PERFORMANCE)
|
|
|
|
dpm_state = POWER_STATE_TYPE_INTERNAL_3DPERF;
|
2013-04-12 11:55:22 -06:00
|
|
|
/* balanced states don't exist at the moment */
|
|
|
|
if (dpm_state == POWER_STATE_TYPE_BALANCED)
|
2016-10-22 17:05:33 -06:00
|
|
|
dpm_state = rdev->pm.dpm.ac_power ?
|
|
|
|
POWER_STATE_TYPE_PERFORMANCE : POWER_STATE_TYPE_BATTERY;
|
2013-04-12 11:55:22 -06:00
|
|
|
|
2013-07-05 09:48:31 -06:00
|
|
|
restart_search:
|
2013-04-12 11:55:22 -06:00
|
|
|
/* Pick the best power state based on current conditions */
|
|
|
|
for (i = 0; i < rdev->pm.dpm.num_ps; i++) {
|
|
|
|
ps = &rdev->pm.dpm.ps[i];
|
|
|
|
ui_class = ps->class & ATOM_PPLIB_CLASSIFICATION_UI_MASK;
|
|
|
|
switch (dpm_state) {
|
|
|
|
/* user states */
|
|
|
|
case POWER_STATE_TYPE_BATTERY:
|
|
|
|
if (ui_class == ATOM_PPLIB_CLASSIFICATION_UI_BATTERY) {
|
|
|
|
if (ps->caps & ATOM_PPLIB_SINGLE_DISPLAY_ONLY) {
|
2013-07-08 09:35:06 -06:00
|
|
|
if (single_display)
|
2013-04-12 11:55:22 -06:00
|
|
|
return ps;
|
|
|
|
} else
|
|
|
|
return ps;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
case POWER_STATE_TYPE_BALANCED:
|
|
|
|
if (ui_class == ATOM_PPLIB_CLASSIFICATION_UI_BALANCED) {
|
|
|
|
if (ps->caps & ATOM_PPLIB_SINGLE_DISPLAY_ONLY) {
|
2013-07-08 09:35:06 -06:00
|
|
|
if (single_display)
|
2013-04-12 11:55:22 -06:00
|
|
|
return ps;
|
|
|
|
} else
|
|
|
|
return ps;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
case POWER_STATE_TYPE_PERFORMANCE:
|
|
|
|
if (ui_class == ATOM_PPLIB_CLASSIFICATION_UI_PERFORMANCE) {
|
|
|
|
if (ps->caps & ATOM_PPLIB_SINGLE_DISPLAY_ONLY) {
|
2013-07-08 09:35:06 -06:00
|
|
|
if (single_display)
|
2013-04-12 11:55:22 -06:00
|
|
|
return ps;
|
|
|
|
} else
|
|
|
|
return ps;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
/* internal states */
|
|
|
|
case POWER_STATE_TYPE_INTERNAL_UVD:
|
2013-06-11 15:55:39 -06:00
|
|
|
if (rdev->pm.dpm.uvd_ps)
|
|
|
|
return rdev->pm.dpm.uvd_ps;
|
|
|
|
else
|
|
|
|
break;
|
2013-04-12 11:55:22 -06:00
|
|
|
case POWER_STATE_TYPE_INTERNAL_UVD_SD:
|
|
|
|
if (ps->class & ATOM_PPLIB_CLASSIFICATION_SDSTATE)
|
|
|
|
return ps;
|
|
|
|
break;
|
|
|
|
case POWER_STATE_TYPE_INTERNAL_UVD_HD:
|
|
|
|
if (ps->class & ATOM_PPLIB_CLASSIFICATION_HDSTATE)
|
|
|
|
return ps;
|
|
|
|
break;
|
|
|
|
case POWER_STATE_TYPE_INTERNAL_UVD_HD2:
|
|
|
|
if (ps->class & ATOM_PPLIB_CLASSIFICATION_HD2STATE)
|
|
|
|
return ps;
|
|
|
|
break;
|
|
|
|
case POWER_STATE_TYPE_INTERNAL_UVD_MVC:
|
|
|
|
if (ps->class2 & ATOM_PPLIB_CLASSIFICATION2_MVC)
|
|
|
|
return ps;
|
|
|
|
break;
|
|
|
|
case POWER_STATE_TYPE_INTERNAL_BOOT:
|
|
|
|
return rdev->pm.dpm.boot_ps;
|
|
|
|
case POWER_STATE_TYPE_INTERNAL_THERMAL:
|
|
|
|
if (ps->class & ATOM_PPLIB_CLASSIFICATION_THERMAL)
|
|
|
|
return ps;
|
|
|
|
break;
|
|
|
|
case POWER_STATE_TYPE_INTERNAL_ACPI:
|
|
|
|
if (ps->class & ATOM_PPLIB_CLASSIFICATION_ACPI)
|
|
|
|
return ps;
|
|
|
|
break;
|
|
|
|
case POWER_STATE_TYPE_INTERNAL_ULV:
|
|
|
|
if (ps->class2 & ATOM_PPLIB_CLASSIFICATION2_ULV)
|
|
|
|
return ps;
|
|
|
|
break;
|
2013-07-05 09:48:31 -06:00
|
|
|
case POWER_STATE_TYPE_INTERNAL_3DPERF:
|
|
|
|
if (ps->class & ATOM_PPLIB_CLASSIFICATION_3DPERFORMANCE)
|
|
|
|
return ps;
|
|
|
|
break;
|
2013-04-12 11:55:22 -06:00
|
|
|
default:
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
/* use a fallback state if we didn't match */
|
|
|
|
switch (dpm_state) {
|
|
|
|
case POWER_STATE_TYPE_INTERNAL_UVD_SD:
|
2013-07-24 10:12:49 -06:00
|
|
|
dpm_state = POWER_STATE_TYPE_INTERNAL_UVD_HD;
|
|
|
|
goto restart_search;
|
2013-04-12 11:55:22 -06:00
|
|
|
case POWER_STATE_TYPE_INTERNAL_UVD_HD:
|
|
|
|
case POWER_STATE_TYPE_INTERNAL_UVD_HD2:
|
|
|
|
case POWER_STATE_TYPE_INTERNAL_UVD_MVC:
|
2013-06-11 15:55:39 -06:00
|
|
|
if (rdev->pm.dpm.uvd_ps) {
|
|
|
|
return rdev->pm.dpm.uvd_ps;
|
|
|
|
} else {
|
|
|
|
dpm_state = POWER_STATE_TYPE_PERFORMANCE;
|
|
|
|
goto restart_search;
|
|
|
|
}
|
2013-04-12 11:55:22 -06:00
|
|
|
case POWER_STATE_TYPE_INTERNAL_THERMAL:
|
|
|
|
dpm_state = POWER_STATE_TYPE_INTERNAL_ACPI;
|
|
|
|
goto restart_search;
|
|
|
|
case POWER_STATE_TYPE_INTERNAL_ACPI:
|
|
|
|
dpm_state = POWER_STATE_TYPE_BATTERY;
|
|
|
|
goto restart_search;
|
|
|
|
case POWER_STATE_TYPE_BATTERY:
|
2013-07-05 09:48:31 -06:00
|
|
|
case POWER_STATE_TYPE_BALANCED:
|
|
|
|
case POWER_STATE_TYPE_INTERNAL_3DPERF:
|
2013-04-12 11:55:22 -06:00
|
|
|
dpm_state = POWER_STATE_TYPE_PERFORMANCE;
|
|
|
|
goto restart_search;
|
|
|
|
default:
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void radeon_dpm_change_power_state_locked(struct radeon_device *rdev)
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
struct radeon_ps *ps;
|
|
|
|
enum radeon_pm_state_type dpm_state;
|
2013-01-16 10:52:04 -07:00
|
|
|
int ret;
|
2015-03-18 15:05:10 -06:00
|
|
|
bool single_display = radeon_dpm_single_display(rdev);
|
2013-04-12 11:55:22 -06:00
|
|
|
|
|
|
|
/* if dpm init failed */
|
|
|
|
if (!rdev->pm.dpm_enabled)
|
|
|
|
return;
|
|
|
|
|
|
|
|
if (rdev->pm.dpm.user_state != rdev->pm.dpm.state) {
|
|
|
|
/* add other state override checks here */
|
2013-06-21 13:12:57 -06:00
|
|
|
if ((!rdev->pm.dpm.thermal_active) &&
|
|
|
|
(!rdev->pm.dpm.uvd_active))
|
2013-04-12 11:55:22 -06:00
|
|
|
rdev->pm.dpm.state = rdev->pm.dpm.user_state;
|
|
|
|
}
|
|
|
|
dpm_state = rdev->pm.dpm.state;
|
|
|
|
|
|
|
|
ps = radeon_dpm_pick_power_state(rdev, dpm_state);
|
|
|
|
if (ps)
|
2013-01-16 12:40:26 -07:00
|
|
|
rdev->pm.dpm.requested_ps = ps;
|
2013-04-12 11:55:22 -06:00
|
|
|
else
|
|
|
|
return;
|
|
|
|
|
2012-11-29 17:27:56 -07:00
|
|
|
/* no need to reprogram if nothing changed unless we are on BTC+ */
|
2013-04-12 11:55:22 -06:00
|
|
|
if (rdev->pm.dpm.current_ps == rdev->pm.dpm.requested_ps) {
|
2013-08-20 18:29:05 -06:00
|
|
|
/* vce just modifies an existing state so force a change */
|
|
|
|
if (ps->vce_active != rdev->pm.dpm.vce_active)
|
|
|
|
goto force;
|
2015-03-18 15:05:10 -06:00
|
|
|
/* user has made a display change (such as timing) */
|
|
|
|
if (rdev->pm.dpm.single_display != single_display)
|
|
|
|
goto force;
|
2012-11-29 17:27:56 -07:00
|
|
|
if ((rdev->family < CHIP_BARTS) || (rdev->flags & RADEON_IS_IGP)) {
|
|
|
|
/* for pre-BTC and APUs if the num crtcs changed but state is the same,
|
|
|
|
* all we need to do is update the display configuration.
|
|
|
|
*/
|
|
|
|
if (rdev->pm.dpm.new_active_crtcs != rdev->pm.dpm.current_active_crtcs) {
|
|
|
|
/* update display watermarks based on new power state */
|
|
|
|
radeon_bandwidth_update(rdev);
|
|
|
|
/* update displays */
|
|
|
|
radeon_dpm_display_configuration_changed(rdev);
|
|
|
|
rdev->pm.dpm.current_active_crtcs = rdev->pm.dpm.new_active_crtcs;
|
|
|
|
rdev->pm.dpm.current_active_crtc_count = rdev->pm.dpm.new_active_crtc_count;
|
|
|
|
}
|
|
|
|
return;
|
|
|
|
} else {
|
|
|
|
/* for BTC+ if the num crtcs hasn't changed and state is the same,
|
|
|
|
* nothing to do, if the num crtcs is > 1 and state is the same,
|
|
|
|
* update display configuration.
|
|
|
|
*/
|
|
|
|
if (rdev->pm.dpm.new_active_crtcs ==
|
|
|
|
rdev->pm.dpm.current_active_crtcs) {
|
|
|
|
return;
|
|
|
|
} else {
|
|
|
|
if ((rdev->pm.dpm.current_active_crtc_count > 1) &&
|
|
|
|
(rdev->pm.dpm.new_active_crtc_count > 1)) {
|
|
|
|
/* update display watermarks based on new power state */
|
|
|
|
radeon_bandwidth_update(rdev);
|
|
|
|
/* update displays */
|
|
|
|
radeon_dpm_display_configuration_changed(rdev);
|
|
|
|
rdev->pm.dpm.current_active_crtcs = rdev->pm.dpm.new_active_crtcs;
|
|
|
|
rdev->pm.dpm.current_active_crtc_count = rdev->pm.dpm.new_active_crtc_count;
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
}
|
2013-04-12 11:55:22 -06:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2013-08-20 18:29:05 -06:00
|
|
|
force:
|
2013-10-23 16:35:43 -06:00
|
|
|
if (radeon_dpm == 1) {
|
|
|
|
printk("switching from power state:\n");
|
|
|
|
radeon_dpm_print_power_state(rdev, rdev->pm.dpm.current_ps);
|
|
|
|
printk("switching to power state:\n");
|
|
|
|
radeon_dpm_print_power_state(rdev, rdev->pm.dpm.requested_ps);
|
|
|
|
}
|
2013-08-20 18:29:05 -06:00
|
|
|
|
2013-04-12 11:55:22 -06:00
|
|
|
down_write(&rdev->pm.mclk_lock);
|
|
|
|
mutex_lock(&rdev->ring_lock);
|
|
|
|
|
2013-08-20 18:29:05 -06:00
|
|
|
/* update whether vce is active */
|
|
|
|
ps->vce_active = rdev->pm.dpm.vce_active;
|
|
|
|
|
2013-01-16 12:40:26 -07:00
|
|
|
ret = radeon_dpm_pre_set_power_state(rdev);
|
|
|
|
if (ret)
|
|
|
|
goto done;
|
2013-01-16 10:52:04 -07:00
|
|
|
|
2013-04-12 11:55:22 -06:00
|
|
|
/* update display watermarks based on new power state */
|
|
|
|
radeon_bandwidth_update(rdev);
|
2016-03-08 09:31:00 -07:00
|
|
|
/* update displays */
|
|
|
|
radeon_dpm_display_configuration_changed(rdev);
|
2013-04-12 11:55:22 -06:00
|
|
|
|
|
|
|
/* wait for the rings to drain */
|
|
|
|
for (i = 0; i < RADEON_NUM_RINGS; i++) {
|
|
|
|
struct radeon_ring *ring = &rdev->ring[i];
|
|
|
|
if (ring->ready)
|
2014-02-18 07:58:31 -07:00
|
|
|
radeon_fence_wait_empty(rdev, i);
|
2013-04-12 11:55:22 -06:00
|
|
|
}
|
|
|
|
|
|
|
|
/* program the new power state */
|
|
|
|
radeon_dpm_set_power_state(rdev);
|
|
|
|
|
|
|
|
/* update current power state */
|
|
|
|
rdev->pm.dpm.current_ps = rdev->pm.dpm.requested_ps;
|
|
|
|
|
2013-01-16 12:40:26 -07:00
|
|
|
radeon_dpm_post_set_power_state(rdev);
|
2013-01-16 10:52:04 -07:00
|
|
|
|
2016-02-24 15:38:38 -07:00
|
|
|
rdev->pm.dpm.current_active_crtcs = rdev->pm.dpm.new_active_crtcs;
|
|
|
|
rdev->pm.dpm.current_active_crtc_count = rdev->pm.dpm.new_active_crtc_count;
|
|
|
|
rdev->pm.dpm.single_display = single_display;
|
|
|
|
|
2013-09-13 12:07:03 -06:00
|
|
|
if (rdev->asic->dpm.force_performance_level) {
|
2013-10-23 15:31:42 -06:00
|
|
|
if (rdev->pm.dpm.thermal_active) {
|
|
|
|
enum radeon_dpm_forced_level level = rdev->pm.dpm.forced_level;
|
2013-09-13 12:07:03 -06:00
|
|
|
/* force low perf level for thermal */
|
|
|
|
radeon_dpm_force_performance_level(rdev, RADEON_DPM_FORCED_LEVEL_LOW);
|
2013-10-23 15:31:42 -06:00
|
|
|
/* save the user's level */
|
|
|
|
rdev->pm.dpm.forced_level = level;
|
|
|
|
} else {
|
|
|
|
/* otherwise, user selected level */
|
|
|
|
radeon_dpm_force_performance_level(rdev, rdev->pm.dpm.forced_level);
|
|
|
|
}
|
2013-07-24 12:59:48 -06:00
|
|
|
}
|
|
|
|
|
2013-01-16 10:52:04 -07:00
|
|
|
done:
|
2013-04-12 11:55:22 -06:00
|
|
|
mutex_unlock(&rdev->ring_lock);
|
|
|
|
up_write(&rdev->pm.mclk_lock);
|
|
|
|
}
|
|
|
|
|
2013-07-24 10:12:49 -06:00
|
|
|
void radeon_dpm_enable_uvd(struct radeon_device *rdev, bool enable)
|
|
|
|
{
|
|
|
|
enum radeon_pm_state_type dpm_state;
|
|
|
|
|
2013-07-31 16:13:23 -06:00
|
|
|
if (rdev->asic->dpm.powergate_uvd) {
|
2013-07-24 10:12:49 -06:00
|
|
|
mutex_lock(&rdev->pm.mutex);
|
2014-01-10 08:05:05 -07:00
|
|
|
/* don't powergate anything if we
|
|
|
|
have active but pause streams */
|
|
|
|
enable |= rdev->pm.dpm.sd > 0;
|
|
|
|
enable |= rdev->pm.dpm.hd > 0;
|
2013-07-31 16:13:23 -06:00
|
|
|
/* enable/disable UVD */
|
|
|
|
radeon_dpm_powergate_uvd(rdev, !enable);
|
2013-07-24 10:12:49 -06:00
|
|
|
mutex_unlock(&rdev->pm.mutex);
|
|
|
|
} else {
|
2013-07-31 16:13:23 -06:00
|
|
|
if (enable) {
|
|
|
|
mutex_lock(&rdev->pm.mutex);
|
|
|
|
rdev->pm.dpm.uvd_active = true;
|
2014-06-07 09:31:25 -06:00
|
|
|
/* disable this for now */
|
|
|
|
#if 0
|
2013-07-31 16:13:23 -06:00
|
|
|
if ((rdev->pm.dpm.sd == 1) && (rdev->pm.dpm.hd == 0))
|
|
|
|
dpm_state = POWER_STATE_TYPE_INTERNAL_UVD_SD;
|
|
|
|
else if ((rdev->pm.dpm.sd == 2) && (rdev->pm.dpm.hd == 0))
|
|
|
|
dpm_state = POWER_STATE_TYPE_INTERNAL_UVD_HD;
|
|
|
|
else if ((rdev->pm.dpm.sd == 0) && (rdev->pm.dpm.hd == 1))
|
|
|
|
dpm_state = POWER_STATE_TYPE_INTERNAL_UVD_HD;
|
|
|
|
else if ((rdev->pm.dpm.sd == 0) && (rdev->pm.dpm.hd == 2))
|
|
|
|
dpm_state = POWER_STATE_TYPE_INTERNAL_UVD_HD2;
|
|
|
|
else
|
2014-06-07 09:31:25 -06:00
|
|
|
#endif
|
2013-07-31 16:13:23 -06:00
|
|
|
dpm_state = POWER_STATE_TYPE_INTERNAL_UVD;
|
|
|
|
rdev->pm.dpm.state = dpm_state;
|
|
|
|
mutex_unlock(&rdev->pm.mutex);
|
|
|
|
} else {
|
|
|
|
mutex_lock(&rdev->pm.mutex);
|
|
|
|
rdev->pm.dpm.uvd_active = false;
|
|
|
|
mutex_unlock(&rdev->pm.mutex);
|
|
|
|
}
|
2013-07-24 10:12:49 -06:00
|
|
|
|
2013-07-31 16:13:23 -06:00
|
|
|
radeon_pm_compute_clocks(rdev);
|
|
|
|
}
|
2013-07-24 10:12:49 -06:00
|
|
|
}
|
|
|
|
|
2013-08-23 09:56:26 -06:00
|
|
|
void radeon_dpm_enable_vce(struct radeon_device *rdev, bool enable)
|
|
|
|
{
|
|
|
|
if (enable) {
|
|
|
|
mutex_lock(&rdev->pm.mutex);
|
|
|
|
rdev->pm.dpm.vce_active = true;
|
|
|
|
/* XXX select vce level based on ring/task */
|
|
|
|
rdev->pm.dpm.vce_level = RADEON_VCE_LEVEL_AC_ALL;
|
|
|
|
mutex_unlock(&rdev->pm.mutex);
|
|
|
|
} else {
|
|
|
|
mutex_lock(&rdev->pm.mutex);
|
|
|
|
rdev->pm.dpm.vce_active = false;
|
|
|
|
mutex_unlock(&rdev->pm.mutex);
|
|
|
|
}
|
|
|
|
|
|
|
|
radeon_pm_compute_clocks(rdev);
|
|
|
|
}
|
|
|
|
|
2013-04-12 11:55:22 -06:00
|
|
|
static void radeon_pm_suspend_old(struct radeon_device *rdev)
|
2009-12-28 11:58:44 -07:00
|
|
|
{
|
2010-05-07 13:10:16 -06:00
|
|
|
mutex_lock(&rdev->pm.mutex);
|
DRM / radeon / KMS: Fix hibernation regression related to radeon PM (was: Re: [Regression, post-2.6.34] Hibernation broken on machines with radeon/KMS and r300)
There is a regression from 2.6.34 related to the recent radeon power
management changes, caused by attempting to cancel a delayed work
item that's never been scheduled. However, the code as is has some
other issues potentially leading to visible problems.
First, the mutex around cancel_delayed_work() in radeon_pm_suspend()
doesn't really serve any purpose, because cancel_delayed_work() only
tries to delete the work's timer. Moreover, it doesn't prevent the
work handler from running, so the handler can do some wrong things if
it wins the race and in that case it will rearm itself to do some
more wrong things going forward. So, I think it's better to wait for
the handler to return in case it's already been queued up for
execution. Also, it should be prevented from rearming itself in that
case.
Second, in radeon_set_pm_method() the cancel_delayed_work() is not
sufficient to prevent the work handler from running and queing up
itself for the next run (the failure scenario is that
cancel_delayed_work() returns 0, so the handler is run, it waits on
the mutex and then rearms itself after the mutex has been released),
so again the work handler should be prevented from rearming itself in
that case..
Finally, there's a potential deadlock in radeon_pm_fini(), because
cancel_delayed_work_sync() is called under rdev->pm.mutex, but the
work handler tries to acquire the same mutex (if it wins the race).
Fix the issues described above.
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
Reviewed-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-06-17 17:02:27 -06:00
|
|
|
if (rdev->pm.pm_method == PM_METHOD_DYNPM) {
|
|
|
|
if (rdev->pm.dynpm_state == DYNPM_STATE_ACTIVE)
|
|
|
|
rdev->pm.dynpm_state = DYNPM_STATE_SUSPENDED;
|
|
|
|
}
|
2010-05-07 13:10:16 -06:00
|
|
|
mutex_unlock(&rdev->pm.mutex);
|
2011-01-03 06:49:32 -07:00
|
|
|
|
|
|
|
cancel_delayed_work_sync(&rdev->pm.dynpm_idle_work);
|
2009-12-28 11:58:44 -07:00
|
|
|
}
|
|
|
|
|
2013-04-12 11:55:22 -06:00
|
|
|
static void radeon_pm_suspend_dpm(struct radeon_device *rdev)
|
|
|
|
{
|
|
|
|
mutex_lock(&rdev->pm.mutex);
|
|
|
|
/* disable dpm */
|
|
|
|
radeon_dpm_disable(rdev);
|
|
|
|
/* reset the power state */
|
|
|
|
rdev->pm.dpm.current_ps = rdev->pm.dpm.requested_ps = rdev->pm.dpm.boot_ps;
|
|
|
|
rdev->pm.dpm_enabled = false;
|
|
|
|
mutex_unlock(&rdev->pm.mutex);
|
|
|
|
}
|
|
|
|
|
|
|
|
void radeon_pm_suspend(struct radeon_device *rdev)
|
|
|
|
{
|
|
|
|
if (rdev->pm.pm_method == PM_METHOD_DPM)
|
|
|
|
radeon_pm_suspend_dpm(rdev);
|
|
|
|
else
|
|
|
|
radeon_pm_suspend_old(rdev);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void radeon_pm_resume_old(struct radeon_device *rdev)
|
2010-03-02 14:06:52 -07:00
|
|
|
{
|
2011-01-06 19:19:32 -07:00
|
|
|
/* set up the default clocks if the MC ucode is loaded */
|
2012-09-14 08:59:26 -06:00
|
|
|
if ((rdev->family >= CHIP_BARTS) &&
|
2013-09-21 12:37:49 -06:00
|
|
|
(rdev->family <= CHIP_CAYMAN) &&
|
2012-09-14 08:59:26 -06:00
|
|
|
rdev->mc_fw) {
|
2011-01-06 19:19:32 -07:00
|
|
|
if (rdev->pm.default_vddc)
|
2011-04-12 12:49:23 -06:00
|
|
|
radeon_atom_set_voltage(rdev, rdev->pm.default_vddc,
|
|
|
|
SET_VOLTAGE_TYPE_ASIC_VDDC);
|
2011-04-12 12:49:24 -06:00
|
|
|
if (rdev->pm.default_vddci)
|
|
|
|
radeon_atom_set_voltage(rdev, rdev->pm.default_vddci,
|
|
|
|
SET_VOLTAGE_TYPE_ASIC_VDDCI);
|
2011-01-06 19:19:32 -07:00
|
|
|
if (rdev->pm.default_sclk)
|
|
|
|
radeon_set_engine_clock(rdev, rdev->pm.default_sclk);
|
|
|
|
if (rdev->pm.default_mclk)
|
|
|
|
radeon_set_memory_clock(rdev, rdev->pm.default_mclk);
|
|
|
|
}
|
2010-06-07 15:49:51 -06:00
|
|
|
/* asic init will reset the default power state */
|
|
|
|
mutex_lock(&rdev->pm.mutex);
|
|
|
|
rdev->pm.current_power_state_index = rdev->pm.default_power_state_index;
|
|
|
|
rdev->pm.current_clock_mode_index = 0;
|
2011-01-06 19:19:26 -07:00
|
|
|
rdev->pm.current_sclk = rdev->pm.default_sclk;
|
|
|
|
rdev->pm.current_mclk = rdev->pm.default_mclk;
|
2014-01-07 19:40:20 -07:00
|
|
|
if (rdev->pm.power_state) {
|
|
|
|
rdev->pm.current_vddc = rdev->pm.power_state[rdev->pm.default_power_state_index].clock_info[0].voltage.voltage;
|
|
|
|
rdev->pm.current_vddci = rdev->pm.power_state[rdev->pm.default_power_state_index].clock_info[0].voltage.vddci;
|
|
|
|
}
|
DRM / radeon / KMS: Fix hibernation regression related to radeon PM (was: Re: [Regression, post-2.6.34] Hibernation broken on machines with radeon/KMS and r300)
There is a regression from 2.6.34 related to the recent radeon power
management changes, caused by attempting to cancel a delayed work
item that's never been scheduled. However, the code as is has some
other issues potentially leading to visible problems.
First, the mutex around cancel_delayed_work() in radeon_pm_suspend()
doesn't really serve any purpose, because cancel_delayed_work() only
tries to delete the work's timer. Moreover, it doesn't prevent the
work handler from running, so the handler can do some wrong things if
it wins the race and in that case it will rearm itself to do some
more wrong things going forward. So, I think it's better to wait for
the handler to return in case it's already been queued up for
execution. Also, it should be prevented from rearming itself in that
case.
Second, in radeon_set_pm_method() the cancel_delayed_work() is not
sufficient to prevent the work handler from running and queing up
itself for the next run (the failure scenario is that
cancel_delayed_work() returns 0, so the handler is run, it waits on
the mutex and then rearms itself after the mutex has been released),
so again the work handler should be prevented from rearming itself in
that case..
Finally, there's a potential deadlock in radeon_pm_fini(), because
cancel_delayed_work_sync() is called under rdev->pm.mutex, but the
work handler tries to acquire the same mutex (if it wins the race).
Fix the issues described above.
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
Reviewed-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-06-17 17:02:27 -06:00
|
|
|
if (rdev->pm.pm_method == PM_METHOD_DYNPM
|
|
|
|
&& rdev->pm.dynpm_state == DYNPM_STATE_SUSPENDED) {
|
|
|
|
rdev->pm.dynpm_state = DYNPM_STATE_ACTIVE;
|
2011-01-03 06:49:32 -07:00
|
|
|
schedule_delayed_work(&rdev->pm.dynpm_idle_work,
|
|
|
|
msecs_to_jiffies(RADEON_IDLE_LOOP_MS));
|
DRM / radeon / KMS: Fix hibernation regression related to radeon PM (was: Re: [Regression, post-2.6.34] Hibernation broken on machines with radeon/KMS and r300)
There is a regression from 2.6.34 related to the recent radeon power
management changes, caused by attempting to cancel a delayed work
item that's never been scheduled. However, the code as is has some
other issues potentially leading to visible problems.
First, the mutex around cancel_delayed_work() in radeon_pm_suspend()
doesn't really serve any purpose, because cancel_delayed_work() only
tries to delete the work's timer. Moreover, it doesn't prevent the
work handler from running, so the handler can do some wrong things if
it wins the race and in that case it will rearm itself to do some
more wrong things going forward. So, I think it's better to wait for
the handler to return in case it's already been queued up for
execution. Also, it should be prevented from rearming itself in that
case.
Second, in radeon_set_pm_method() the cancel_delayed_work() is not
sufficient to prevent the work handler from running and queing up
itself for the next run (the failure scenario is that
cancel_delayed_work() returns 0, so the handler is run, it waits on
the mutex and then rearms itself after the mutex has been released),
so again the work handler should be prevented from rearming itself in
that case..
Finally, there's a potential deadlock in radeon_pm_fini(), because
cancel_delayed_work_sync() is called under rdev->pm.mutex, but the
work handler tries to acquire the same mutex (if it wins the race).
Fix the issues described above.
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
Reviewed-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-06-17 17:02:27 -06:00
|
|
|
}
|
2010-06-07 15:49:51 -06:00
|
|
|
mutex_unlock(&rdev->pm.mutex);
|
2010-05-07 13:10:16 -06:00
|
|
|
radeon_pm_compute_clocks(rdev);
|
2010-03-02 14:06:52 -07:00
|
|
|
}
|
|
|
|
|
2013-04-12 11:55:22 -06:00
|
|
|
static void radeon_pm_resume_dpm(struct radeon_device *rdev)
|
|
|
|
{
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
/* asic init will reset to the boot state */
|
|
|
|
mutex_lock(&rdev->pm.mutex);
|
|
|
|
rdev->pm.dpm.current_ps = rdev->pm.dpm.requested_ps = rdev->pm.dpm.boot_ps;
|
|
|
|
radeon_dpm_setup_asic(rdev);
|
|
|
|
ret = radeon_dpm_enable(rdev);
|
|
|
|
mutex_unlock(&rdev->pm.mutex);
|
2013-12-19 14:17:47 -07:00
|
|
|
if (ret)
|
|
|
|
goto dpm_resume_fail;
|
|
|
|
rdev->pm.dpm_enabled = true;
|
|
|
|
return;
|
|
|
|
|
|
|
|
dpm_resume_fail:
|
|
|
|
DRM_ERROR("radeon: dpm resume failed\n");
|
|
|
|
if ((rdev->family >= CHIP_BARTS) &&
|
|
|
|
(rdev->family <= CHIP_CAYMAN) &&
|
|
|
|
rdev->mc_fw) {
|
|
|
|
if (rdev->pm.default_vddc)
|
|
|
|
radeon_atom_set_voltage(rdev, rdev->pm.default_vddc,
|
|
|
|
SET_VOLTAGE_TYPE_ASIC_VDDC);
|
|
|
|
if (rdev->pm.default_vddci)
|
|
|
|
radeon_atom_set_voltage(rdev, rdev->pm.default_vddci,
|
|
|
|
SET_VOLTAGE_TYPE_ASIC_VDDCI);
|
|
|
|
if (rdev->pm.default_sclk)
|
|
|
|
radeon_set_engine_clock(rdev, rdev->pm.default_sclk);
|
|
|
|
if (rdev->pm.default_mclk)
|
|
|
|
radeon_set_memory_clock(rdev, rdev->pm.default_mclk);
|
2013-04-12 11:55:22 -06:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
void radeon_pm_resume(struct radeon_device *rdev)
|
|
|
|
{
|
|
|
|
if (rdev->pm.pm_method == PM_METHOD_DPM)
|
|
|
|
radeon_pm_resume_dpm(rdev);
|
|
|
|
else
|
|
|
|
radeon_pm_resume_old(rdev);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int radeon_pm_init_old(struct radeon_device *rdev)
|
2009-11-02 16:53:02 -07:00
|
|
|
{
|
2010-05-18 03:00:14 -06:00
|
|
|
int ret;
|
2010-08-09 13:59:42 -06:00
|
|
|
|
2010-06-07 15:49:51 -06:00
|
|
|
rdev->pm.profile = PM_PROFILE_DEFAULT;
|
2010-05-07 13:10:16 -06:00
|
|
|
rdev->pm.dynpm_state = DYNPM_STATE_DISABLED;
|
|
|
|
rdev->pm.dynpm_planned_action = DYNPM_ACTION_NONE;
|
|
|
|
rdev->pm.dynpm_can_upclock = true;
|
|
|
|
rdev->pm.dynpm_can_downclock = true;
|
2011-01-06 19:19:26 -07:00
|
|
|
rdev->pm.default_sclk = rdev->clock.default_sclk;
|
|
|
|
rdev->pm.default_mclk = rdev->clock.default_mclk;
|
2010-06-07 15:49:51 -06:00
|
|
|
rdev->pm.current_sclk = rdev->clock.default_sclk;
|
|
|
|
rdev->pm.current_mclk = rdev->clock.default_mclk;
|
2010-07-02 10:58:16 -06:00
|
|
|
rdev->pm.int_thermal_type = THERMAL_TYPE_NONE;
|
2009-12-22 15:02:16 -07:00
|
|
|
|
2009-12-28 11:58:44 -07:00
|
|
|
if (rdev->bios) {
|
|
|
|
if (rdev->is_atom_bios)
|
|
|
|
radeon_atombios_get_power_modes(rdev);
|
|
|
|
else
|
|
|
|
radeon_combios_get_power_modes(rdev);
|
2010-06-07 16:29:44 -06:00
|
|
|
radeon_pm_print_states(rdev);
|
2010-05-07 13:10:16 -06:00
|
|
|
radeon_pm_init_profile(rdev);
|
2011-01-06 19:19:32 -07:00
|
|
|
/* set up the default clocks if the MC ucode is loaded */
|
2012-09-14 08:59:26 -06:00
|
|
|
if ((rdev->family >= CHIP_BARTS) &&
|
2013-09-21 12:37:49 -06:00
|
|
|
(rdev->family <= CHIP_CAYMAN) &&
|
2012-09-14 08:59:26 -06:00
|
|
|
rdev->mc_fw) {
|
2011-01-06 19:19:32 -07:00
|
|
|
if (rdev->pm.default_vddc)
|
2011-04-12 12:49:23 -06:00
|
|
|
radeon_atom_set_voltage(rdev, rdev->pm.default_vddc,
|
|
|
|
SET_VOLTAGE_TYPE_ASIC_VDDC);
|
2011-07-25 16:50:08 -06:00
|
|
|
if (rdev->pm.default_vddci)
|
|
|
|
radeon_atom_set_voltage(rdev, rdev->pm.default_vddci,
|
|
|
|
SET_VOLTAGE_TYPE_ASIC_VDDCI);
|
2011-01-06 19:19:32 -07:00
|
|
|
if (rdev->pm.default_sclk)
|
|
|
|
radeon_set_engine_clock(rdev, rdev->pm.default_sclk);
|
|
|
|
if (rdev->pm.default_mclk)
|
|
|
|
radeon_set_memory_clock(rdev, rdev->pm.default_mclk);
|
|
|
|
}
|
2009-12-28 11:58:44 -07:00
|
|
|
}
|
|
|
|
|
2010-07-02 10:58:16 -06:00
|
|
|
/* set up the internal thermal sensor if applicable */
|
2010-08-09 13:59:42 -06:00
|
|
|
ret = radeon_hwmon_init(rdev);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
2011-01-03 06:49:32 -07:00
|
|
|
|
|
|
|
INIT_DELAYED_WORK(&rdev->pm.dynpm_idle_work, radeon_dynpm_idle_work_handler);
|
|
|
|
|
2010-05-07 13:10:16 -06:00
|
|
|
if (rdev->pm.num_power_states > 1) {
|
|
|
|
if (radeon_debugfs_pm_init(rdev)) {
|
|
|
|
DRM_ERROR("Failed to register debugfs file for PM!\n");
|
|
|
|
}
|
2009-12-22 15:02:16 -07:00
|
|
|
|
2010-05-07 13:10:16 -06:00
|
|
|
DRM_INFO("radeon: power management initialized\n");
|
|
|
|
}
|
2009-12-22 15:02:16 -07:00
|
|
|
|
2009-11-02 16:53:02 -07:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2013-04-12 11:55:22 -06:00
|
|
|
static void radeon_dpm_print_power_states(struct radeon_device *rdev)
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
|
|
|
|
for (i = 0; i < rdev->pm.dpm.num_ps; i++) {
|
|
|
|
printk("== power state %d ==\n", i);
|
|
|
|
radeon_dpm_print_power_state(rdev, &rdev->pm.dpm.ps[i]);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static int radeon_pm_init_dpm(struct radeon_device *rdev)
|
|
|
|
{
|
|
|
|
int ret;
|
|
|
|
|
2013-09-13 12:07:03 -06:00
|
|
|
/* default to balanced state */
|
2013-07-05 09:48:31 -06:00
|
|
|
rdev->pm.dpm.state = POWER_STATE_TYPE_BALANCED;
|
|
|
|
rdev->pm.dpm.user_state = POWER_STATE_TYPE_BALANCED;
|
2013-09-13 12:07:03 -06:00
|
|
|
rdev->pm.dpm.forced_level = RADEON_DPM_FORCED_LEVEL_AUTO;
|
2013-04-12 11:55:22 -06:00
|
|
|
rdev->pm.default_sclk = rdev->clock.default_sclk;
|
|
|
|
rdev->pm.default_mclk = rdev->clock.default_mclk;
|
|
|
|
rdev->pm.current_sclk = rdev->clock.default_sclk;
|
|
|
|
rdev->pm.current_mclk = rdev->clock.default_mclk;
|
|
|
|
rdev->pm.int_thermal_type = THERMAL_TYPE_NONE;
|
|
|
|
|
|
|
|
if (rdev->bios && rdev->is_atom_bios)
|
|
|
|
radeon_atombios_get_power_modes(rdev);
|
|
|
|
else
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
/* set up the internal thermal sensor if applicable */
|
|
|
|
ret = radeon_hwmon_init(rdev);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
INIT_WORK(&rdev->pm.dpm.thermal.work, radeon_dpm_thermal_work_handler);
|
|
|
|
mutex_lock(&rdev->pm.mutex);
|
|
|
|
radeon_dpm_init(rdev);
|
|
|
|
rdev->pm.dpm.current_ps = rdev->pm.dpm.requested_ps = rdev->pm.dpm.boot_ps;
|
2013-10-23 16:35:43 -06:00
|
|
|
if (radeon_dpm == 1)
|
|
|
|
radeon_dpm_print_power_states(rdev);
|
2013-04-12 11:55:22 -06:00
|
|
|
radeon_dpm_setup_asic(rdev);
|
|
|
|
ret = radeon_dpm_enable(rdev);
|
|
|
|
mutex_unlock(&rdev->pm.mutex);
|
2013-12-19 14:17:47 -07:00
|
|
|
if (ret)
|
|
|
|
goto dpm_failed;
|
2013-04-12 11:55:22 -06:00
|
|
|
rdev->pm.dpm_enabled = true;
|
|
|
|
|
2013-12-18 11:39:58 -07:00
|
|
|
if (radeon_debugfs_pm_init(rdev)) {
|
|
|
|
DRM_ERROR("Failed to register debugfs file for dpm!\n");
|
2013-04-12 11:55:22 -06:00
|
|
|
}
|
|
|
|
|
2013-12-18 11:39:58 -07:00
|
|
|
DRM_INFO("radeon: dpm initialized\n");
|
|
|
|
|
2013-04-12 11:55:22 -06:00
|
|
|
return 0;
|
2013-12-19 14:17:47 -07:00
|
|
|
|
|
|
|
dpm_failed:
|
|
|
|
rdev->pm.dpm_enabled = false;
|
|
|
|
if ((rdev->family >= CHIP_BARTS) &&
|
|
|
|
(rdev->family <= CHIP_CAYMAN) &&
|
|
|
|
rdev->mc_fw) {
|
|
|
|
if (rdev->pm.default_vddc)
|
|
|
|
radeon_atom_set_voltage(rdev, rdev->pm.default_vddc,
|
|
|
|
SET_VOLTAGE_TYPE_ASIC_VDDC);
|
|
|
|
if (rdev->pm.default_vddci)
|
|
|
|
radeon_atom_set_voltage(rdev, rdev->pm.default_vddci,
|
|
|
|
SET_VOLTAGE_TYPE_ASIC_VDDCI);
|
|
|
|
if (rdev->pm.default_sclk)
|
|
|
|
radeon_set_engine_clock(rdev, rdev->pm.default_sclk);
|
|
|
|
if (rdev->pm.default_mclk)
|
|
|
|
radeon_set_memory_clock(rdev, rdev->pm.default_mclk);
|
|
|
|
}
|
|
|
|
DRM_ERROR("radeon: dpm initialization failed\n");
|
|
|
|
return ret;
|
2013-04-12 11:55:22 -06:00
|
|
|
}
|
|
|
|
|
2015-01-08 08:46:33 -07:00
|
|
|
struct radeon_dpm_quirk {
|
|
|
|
u32 chip_vendor;
|
|
|
|
u32 chip_device;
|
|
|
|
u32 subsys_vendor;
|
|
|
|
u32 subsys_device;
|
|
|
|
};
|
|
|
|
|
|
|
|
/* cards with dpm stability problems */
|
|
|
|
static struct radeon_dpm_quirk radeon_dpm_quirk_list[] = {
|
|
|
|
/* TURKS - https://bugs.launchpad.net/ubuntu/+source/linux/+bug/1386534 */
|
|
|
|
{ PCI_VENDOR_ID_ATI, 0x6759, 0x1682, 0x3195 },
|
|
|
|
/* TURKS - https://bugzilla.kernel.org/show_bug.cgi?id=83731 */
|
|
|
|
{ PCI_VENDOR_ID_ATI, 0x6840, 0x1179, 0xfb81 },
|
|
|
|
{ 0, 0, 0, 0 },
|
|
|
|
};
|
|
|
|
|
2013-04-12 11:55:22 -06:00
|
|
|
int radeon_pm_init(struct radeon_device *rdev)
|
|
|
|
{
|
2015-01-08 08:46:33 -07:00
|
|
|
struct radeon_dpm_quirk *p = radeon_dpm_quirk_list;
|
|
|
|
bool disable_dpm = false;
|
|
|
|
|
|
|
|
/* Apply dpm quirks */
|
|
|
|
while (p && p->chip_device != 0) {
|
|
|
|
if (rdev->pdev->vendor == p->chip_vendor &&
|
|
|
|
rdev->pdev->device == p->chip_device &&
|
|
|
|
rdev->pdev->subsystem_vendor == p->subsys_vendor &&
|
|
|
|
rdev->pdev->subsystem_device == p->subsys_device) {
|
|
|
|
disable_dpm = true;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
++p;
|
|
|
|
}
|
|
|
|
|
2013-04-12 11:55:22 -06:00
|
|
|
/* enable dpm on rv6xx+ */
|
|
|
|
switch (rdev->family) {
|
2013-04-12 12:04:10 -06:00
|
|
|
case CHIP_RV610:
|
|
|
|
case CHIP_RV630:
|
|
|
|
case CHIP_RV620:
|
|
|
|
case CHIP_RV635:
|
|
|
|
case CHIP_RV670:
|
2013-04-12 11:59:22 -06:00
|
|
|
case CHIP_RS780:
|
|
|
|
case CHIP_RS880:
|
2014-04-18 07:08:11 -06:00
|
|
|
case CHIP_RV770:
|
2013-08-07 14:09:08 -06:00
|
|
|
/* DPM requires the RLC, RV770+ dGPU requires SMC */
|
2013-08-06 11:34:00 -06:00
|
|
|
if (!rdev->rlc_fw)
|
|
|
|
rdev->pm.pm_method = PM_METHOD_PROFILE;
|
2013-08-07 14:09:08 -06:00
|
|
|
else if ((rdev->family >= CHIP_RV770) &&
|
|
|
|
(!(rdev->flags & RADEON_IS_IGP)) &&
|
|
|
|
(!rdev->smc_fw))
|
|
|
|
rdev->pm.pm_method = PM_METHOD_PROFILE;
|
2013-08-06 11:34:00 -06:00
|
|
|
else if (radeon_dpm == 1)
|
2013-04-12 11:59:22 -06:00
|
|
|
rdev->pm.pm_method = PM_METHOD_DPM;
|
|
|
|
else
|
|
|
|
rdev->pm.pm_method = PM_METHOD_PROFILE;
|
|
|
|
break;
|
2013-11-01 13:16:02 -06:00
|
|
|
case CHIP_RV730:
|
|
|
|
case CHIP_RV710:
|
|
|
|
case CHIP_RV740:
|
2013-11-01 13:11:34 -06:00
|
|
|
case CHIP_CEDAR:
|
|
|
|
case CHIP_REDWOOD:
|
|
|
|
case CHIP_JUNIPER:
|
|
|
|
case CHIP_CYPRESS:
|
|
|
|
case CHIP_HEMLOCK:
|
2013-10-23 15:11:06 -06:00
|
|
|
case CHIP_PALM:
|
|
|
|
case CHIP_SUMO:
|
|
|
|
case CHIP_SUMO2:
|
2014-07-14 10:01:40 -06:00
|
|
|
case CHIP_BARTS:
|
|
|
|
case CHIP_TURKS:
|
|
|
|
case CHIP_CAICOS:
|
2014-07-07 15:13:37 -06:00
|
|
|
case CHIP_CAYMAN:
|
2013-11-14 08:21:29 -07:00
|
|
|
case CHIP_ARUBA:
|
2013-10-23 15:14:06 -06:00
|
|
|
case CHIP_TAHITI:
|
|
|
|
case CHIP_PITCAIRN:
|
|
|
|
case CHIP_VERDE:
|
|
|
|
case CHIP_OLAND:
|
|
|
|
case CHIP_HAINAN:
|
2013-12-19 15:37:33 -07:00
|
|
|
case CHIP_BONAIRE:
|
2013-12-19 15:39:17 -07:00
|
|
|
case CHIP_KABINI:
|
|
|
|
case CHIP_KAVERI:
|
2013-12-19 15:37:33 -07:00
|
|
|
case CHIP_HAWAII:
|
2014-04-30 16:40:51 -06:00
|
|
|
case CHIP_MULLINS:
|
2013-10-23 15:11:06 -06:00
|
|
|
/* DPM requires the RLC, RV770+ dGPU requires SMC */
|
|
|
|
if (!rdev->rlc_fw)
|
|
|
|
rdev->pm.pm_method = PM_METHOD_PROFILE;
|
|
|
|
else if ((rdev->family >= CHIP_RV770) &&
|
|
|
|
(!(rdev->flags & RADEON_IS_IGP)) &&
|
|
|
|
(!rdev->smc_fw))
|
|
|
|
rdev->pm.pm_method = PM_METHOD_PROFILE;
|
2015-01-08 08:46:33 -07:00
|
|
|
else if (disable_dpm && (radeon_dpm == -1))
|
|
|
|
rdev->pm.pm_method = PM_METHOD_PROFILE;
|
2013-10-23 15:11:06 -06:00
|
|
|
else if (radeon_dpm == 0)
|
|
|
|
rdev->pm.pm_method = PM_METHOD_PROFILE;
|
|
|
|
else
|
|
|
|
rdev->pm.pm_method = PM_METHOD_DPM;
|
|
|
|
break;
|
2013-04-12 11:55:22 -06:00
|
|
|
default:
|
|
|
|
/* default to profile method */
|
|
|
|
rdev->pm.pm_method = PM_METHOD_PROFILE;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (rdev->pm.pm_method == PM_METHOD_DPM)
|
|
|
|
return radeon_pm_init_dpm(rdev);
|
|
|
|
else
|
|
|
|
return radeon_pm_init_old(rdev);
|
|
|
|
}
|
|
|
|
|
2013-12-19 09:37:22 -07:00
|
|
|
int radeon_pm_late_init(struct radeon_device *rdev)
|
|
|
|
{
|
|
|
|
int ret = 0;
|
|
|
|
|
|
|
|
if (rdev->pm.pm_method == PM_METHOD_DPM) {
|
2015-09-30 14:45:52 -06:00
|
|
|
if (rdev->pm.dpm_enabled) {
|
2015-10-23 08:38:52 -06:00
|
|
|
if (!rdev->pm.sysfs_initialized) {
|
|
|
|
ret = device_create_file(rdev->dev, &dev_attr_power_dpm_state);
|
|
|
|
if (ret)
|
|
|
|
DRM_ERROR("failed to create device file for dpm state\n");
|
|
|
|
ret = device_create_file(rdev->dev, &dev_attr_power_dpm_force_performance_level);
|
|
|
|
if (ret)
|
|
|
|
DRM_ERROR("failed to create device file for dpm state\n");
|
|
|
|
/* XXX: these are noops for dpm but are here for backwards compat */
|
|
|
|
ret = device_create_file(rdev->dev, &dev_attr_power_profile);
|
|
|
|
if (ret)
|
|
|
|
DRM_ERROR("failed to create device file for power profile\n");
|
|
|
|
ret = device_create_file(rdev->dev, &dev_attr_power_method);
|
|
|
|
if (ret)
|
|
|
|
DRM_ERROR("failed to create device file for power method\n");
|
2015-11-10 11:01:35 -07:00
|
|
|
rdev->pm.sysfs_initialized = true;
|
2015-10-23 08:38:52 -06:00
|
|
|
}
|
2015-09-30 14:45:52 -06:00
|
|
|
|
|
|
|
mutex_lock(&rdev->pm.mutex);
|
|
|
|
ret = radeon_dpm_late_enable(rdev);
|
|
|
|
mutex_unlock(&rdev->pm.mutex);
|
|
|
|
if (ret) {
|
|
|
|
rdev->pm.dpm_enabled = false;
|
|
|
|
DRM_ERROR("radeon_pm_late_init failed, disabling dpm\n");
|
|
|
|
} else {
|
|
|
|
/* set the dpm state for PX since there won't be
|
|
|
|
* a modeset to call this.
|
|
|
|
*/
|
|
|
|
radeon_pm_compute_clocks(rdev);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
} else {
|
2015-10-23 08:38:52 -06:00
|
|
|
if ((rdev->pm.num_power_states > 1) &&
|
|
|
|
(!rdev->pm.sysfs_initialized)) {
|
2015-09-30 14:45:52 -06:00
|
|
|
/* where's the best place to put these? */
|
|
|
|
ret = device_create_file(rdev->dev, &dev_attr_power_profile);
|
|
|
|
if (ret)
|
|
|
|
DRM_ERROR("failed to create device file for power profile\n");
|
|
|
|
ret = device_create_file(rdev->dev, &dev_attr_power_method);
|
|
|
|
if (ret)
|
|
|
|
DRM_ERROR("failed to create device file for power method\n");
|
2015-10-23 08:38:52 -06:00
|
|
|
if (!ret)
|
|
|
|
rdev->pm.sysfs_initialized = true;
|
2015-09-30 14:45:52 -06:00
|
|
|
}
|
2013-12-19 09:37:22 -07:00
|
|
|
}
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2013-04-12 11:55:22 -06:00
|
|
|
static void radeon_pm_fini_old(struct radeon_device *rdev)
|
2010-03-11 08:01:17 -07:00
|
|
|
{
|
2010-05-07 13:10:16 -06:00
|
|
|
if (rdev->pm.num_power_states > 1) {
|
2010-04-24 12:50:23 -06:00
|
|
|
mutex_lock(&rdev->pm.mutex);
|
2010-05-07 13:10:16 -06:00
|
|
|
if (rdev->pm.pm_method == PM_METHOD_PROFILE) {
|
|
|
|
rdev->pm.profile = PM_PROFILE_DEFAULT;
|
|
|
|
radeon_pm_update_profile(rdev);
|
|
|
|
radeon_pm_set_clocks(rdev);
|
|
|
|
} else if (rdev->pm.pm_method == PM_METHOD_DYNPM) {
|
|
|
|
/* reset default clocks */
|
|
|
|
rdev->pm.dynpm_state = DYNPM_STATE_DISABLED;
|
|
|
|
rdev->pm.dynpm_planned_action = DYNPM_ACTION_DEFAULT;
|
|
|
|
radeon_pm_set_clocks(rdev);
|
|
|
|
}
|
2010-04-24 12:50:23 -06:00
|
|
|
mutex_unlock(&rdev->pm.mutex);
|
2011-01-03 06:49:32 -07:00
|
|
|
|
|
|
|
cancel_delayed_work_sync(&rdev->pm.dynpm_idle_work);
|
2010-03-22 11:31:08 -06:00
|
|
|
|
2010-05-07 13:10:16 -06:00
|
|
|
device_remove_file(rdev->dev, &dev_attr_power_profile);
|
|
|
|
device_remove_file(rdev->dev, &dev_attr_power_method);
|
|
|
|
}
|
2010-04-24 12:50:23 -06:00
|
|
|
|
2014-04-15 10:44:32 -06:00
|
|
|
radeon_hwmon_fini(rdev);
|
2014-07-04 13:37:09 -06:00
|
|
|
kfree(rdev->pm.power_state);
|
2010-03-11 08:01:17 -07:00
|
|
|
}
|
|
|
|
|
2013-04-12 11:55:22 -06:00
|
|
|
static void radeon_pm_fini_dpm(struct radeon_device *rdev)
|
|
|
|
{
|
|
|
|
if (rdev->pm.num_power_states > 1) {
|
|
|
|
mutex_lock(&rdev->pm.mutex);
|
|
|
|
radeon_dpm_disable(rdev);
|
|
|
|
mutex_unlock(&rdev->pm.mutex);
|
|
|
|
|
|
|
|
device_remove_file(rdev->dev, &dev_attr_power_dpm_state);
|
2013-07-02 16:38:02 -06:00
|
|
|
device_remove_file(rdev->dev, &dev_attr_power_dpm_force_performance_level);
|
2013-04-12 11:55:22 -06:00
|
|
|
/* XXX backwards compat */
|
|
|
|
device_remove_file(rdev->dev, &dev_attr_power_profile);
|
|
|
|
device_remove_file(rdev->dev, &dev_attr_power_method);
|
|
|
|
}
|
|
|
|
radeon_dpm_fini(rdev);
|
|
|
|
|
2014-04-15 10:44:32 -06:00
|
|
|
radeon_hwmon_fini(rdev);
|
2014-07-04 13:37:09 -06:00
|
|
|
kfree(rdev->pm.power_state);
|
2013-04-12 11:55:22 -06:00
|
|
|
}
|
|
|
|
|
|
|
|
void radeon_pm_fini(struct radeon_device *rdev)
|
|
|
|
{
|
|
|
|
if (rdev->pm.pm_method == PM_METHOD_DPM)
|
|
|
|
radeon_pm_fini_dpm(rdev);
|
|
|
|
else
|
|
|
|
radeon_pm_fini_old(rdev);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void radeon_pm_compute_clocks_old(struct radeon_device *rdev)
|
2009-12-22 15:02:16 -07:00
|
|
|
{
|
|
|
|
struct drm_device *ddev = rdev->ddev;
|
2010-04-22 12:03:55 -06:00
|
|
|
struct drm_crtc *crtc;
|
2009-12-22 15:02:16 -07:00
|
|
|
struct radeon_crtc *radeon_crtc;
|
|
|
|
|
2010-05-07 13:10:16 -06:00
|
|
|
if (rdev->pm.num_power_states < 2)
|
|
|
|
return;
|
|
|
|
|
2009-12-22 15:02:16 -07:00
|
|
|
mutex_lock(&rdev->pm.mutex);
|
|
|
|
|
|
|
|
rdev->pm.active_crtcs = 0;
|
2010-04-22 12:03:55 -06:00
|
|
|
rdev->pm.active_crtc_count = 0;
|
2014-04-15 10:44:33 -06:00
|
|
|
if (rdev->num_crtc && rdev->mode_info.mode_config_initialized) {
|
|
|
|
list_for_each_entry(crtc,
|
|
|
|
&ddev->mode_config.crtc_list, head) {
|
|
|
|
radeon_crtc = to_radeon_crtc(crtc);
|
|
|
|
if (radeon_crtc->enabled) {
|
|
|
|
rdev->pm.active_crtcs |= (1 << radeon_crtc->crtc_id);
|
|
|
|
rdev->pm.active_crtc_count++;
|
|
|
|
}
|
2009-12-22 15:02:16 -07:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2010-05-07 13:10:16 -06:00
|
|
|
if (rdev->pm.pm_method == PM_METHOD_PROFILE) {
|
|
|
|
radeon_pm_update_profile(rdev);
|
|
|
|
radeon_pm_set_clocks(rdev);
|
|
|
|
} else if (rdev->pm.pm_method == PM_METHOD_DYNPM) {
|
|
|
|
if (rdev->pm.dynpm_state != DYNPM_STATE_DISABLED) {
|
|
|
|
if (rdev->pm.active_crtc_count > 1) {
|
|
|
|
if (rdev->pm.dynpm_state == DYNPM_STATE_ACTIVE) {
|
|
|
|
cancel_delayed_work(&rdev->pm.dynpm_idle_work);
|
|
|
|
|
|
|
|
rdev->pm.dynpm_state = DYNPM_STATE_PAUSED;
|
|
|
|
rdev->pm.dynpm_planned_action = DYNPM_ACTION_DEFAULT;
|
|
|
|
radeon_pm_get_dynpm_state(rdev);
|
|
|
|
radeon_pm_set_clocks(rdev);
|
|
|
|
|
2010-08-01 18:42:55 -06:00
|
|
|
DRM_DEBUG_DRIVER("radeon: dynamic power management deactivated\n");
|
2010-05-07 13:10:16 -06:00
|
|
|
}
|
|
|
|
} else if (rdev->pm.active_crtc_count == 1) {
|
|
|
|
/* TODO: Increase clocks if needed for current mode */
|
|
|
|
|
|
|
|
if (rdev->pm.dynpm_state == DYNPM_STATE_MINIMUM) {
|
|
|
|
rdev->pm.dynpm_state = DYNPM_STATE_ACTIVE;
|
|
|
|
rdev->pm.dynpm_planned_action = DYNPM_ACTION_UPCLOCK;
|
|
|
|
radeon_pm_get_dynpm_state(rdev);
|
|
|
|
radeon_pm_set_clocks(rdev);
|
|
|
|
|
2011-01-03 06:49:32 -07:00
|
|
|
schedule_delayed_work(&rdev->pm.dynpm_idle_work,
|
|
|
|
msecs_to_jiffies(RADEON_IDLE_LOOP_MS));
|
2010-05-07 13:10:16 -06:00
|
|
|
} else if (rdev->pm.dynpm_state == DYNPM_STATE_PAUSED) {
|
|
|
|
rdev->pm.dynpm_state = DYNPM_STATE_ACTIVE;
|
2011-01-03 06:49:32 -07:00
|
|
|
schedule_delayed_work(&rdev->pm.dynpm_idle_work,
|
|
|
|
msecs_to_jiffies(RADEON_IDLE_LOOP_MS));
|
2010-08-01 18:42:55 -06:00
|
|
|
DRM_DEBUG_DRIVER("radeon: dynamic power management activated\n");
|
2010-05-07 13:10:16 -06:00
|
|
|
}
|
|
|
|
} else { /* count == 0 */
|
|
|
|
if (rdev->pm.dynpm_state != DYNPM_STATE_MINIMUM) {
|
|
|
|
cancel_delayed_work(&rdev->pm.dynpm_idle_work);
|
|
|
|
|
|
|
|
rdev->pm.dynpm_state = DYNPM_STATE_MINIMUM;
|
|
|
|
rdev->pm.dynpm_planned_action = DYNPM_ACTION_MINIMUM;
|
|
|
|
radeon_pm_get_dynpm_state(rdev);
|
|
|
|
radeon_pm_set_clocks(rdev);
|
|
|
|
}
|
|
|
|
}
|
2009-12-22 15:02:16 -07:00
|
|
|
}
|
|
|
|
}
|
2010-01-07 16:22:47 -07:00
|
|
|
|
|
|
|
mutex_unlock(&rdev->pm.mutex);
|
2009-12-22 15:02:16 -07:00
|
|
|
}
|
|
|
|
|
2013-04-12 11:55:22 -06:00
|
|
|
static void radeon_pm_compute_clocks_dpm(struct radeon_device *rdev)
|
|
|
|
{
|
|
|
|
struct drm_device *ddev = rdev->ddev;
|
|
|
|
struct drm_crtc *crtc;
|
|
|
|
struct radeon_crtc *radeon_crtc;
|
|
|
|
|
2013-12-18 12:07:14 -07:00
|
|
|
if (!rdev->pm.dpm_enabled)
|
|
|
|
return;
|
|
|
|
|
2013-04-12 11:55:22 -06:00
|
|
|
mutex_lock(&rdev->pm.mutex);
|
|
|
|
|
2012-11-30 08:56:57 -07:00
|
|
|
/* update active crtc counts */
|
2013-04-12 11:55:22 -06:00
|
|
|
rdev->pm.dpm.new_active_crtcs = 0;
|
|
|
|
rdev->pm.dpm.new_active_crtc_count = 0;
|
2014-04-15 10:44:33 -06:00
|
|
|
if (rdev->num_crtc && rdev->mode_info.mode_config_initialized) {
|
|
|
|
list_for_each_entry(crtc,
|
|
|
|
&ddev->mode_config.crtc_list, head) {
|
|
|
|
radeon_crtc = to_radeon_crtc(crtc);
|
|
|
|
if (crtc->enabled) {
|
|
|
|
rdev->pm.dpm.new_active_crtcs |= (1 << radeon_crtc->crtc_id);
|
|
|
|
rdev->pm.dpm.new_active_crtc_count++;
|
|
|
|
}
|
2013-04-12 11:55:22 -06:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2012-11-30 08:56:57 -07:00
|
|
|
/* update battery/ac status */
|
|
|
|
if (power_supply_is_system_supplied() > 0)
|
|
|
|
rdev->pm.dpm.ac_power = true;
|
|
|
|
else
|
|
|
|
rdev->pm.dpm.ac_power = false;
|
|
|
|
|
2013-04-12 11:55:22 -06:00
|
|
|
radeon_dpm_change_power_state_locked(rdev);
|
|
|
|
|
|
|
|
mutex_unlock(&rdev->pm.mutex);
|
2013-06-21 13:12:57 -06:00
|
|
|
|
2013-04-12 11:55:22 -06:00
|
|
|
}
|
|
|
|
|
|
|
|
void radeon_pm_compute_clocks(struct radeon_device *rdev)
|
|
|
|
{
|
|
|
|
if (rdev->pm.pm_method == PM_METHOD_DPM)
|
|
|
|
radeon_pm_compute_clocks_dpm(rdev);
|
|
|
|
else
|
|
|
|
radeon_pm_compute_clocks_old(rdev);
|
|
|
|
}
|
|
|
|
|
2010-05-07 13:10:16 -06:00
|
|
|
static bool radeon_pm_in_vbl(struct radeon_device *rdev)
|
2010-02-17 22:58:36 -07:00
|
|
|
{
|
2010-10-05 17:57:37 -06:00
|
|
|
int crtc, vpos, hpos, vbl_status;
|
2010-02-17 22:58:36 -07:00
|
|
|
bool in_vbl = true;
|
|
|
|
|
2010-10-05 17:57:37 -06:00
|
|
|
/* Iterate over all active crtc's. All crtc's must be in vblank,
|
|
|
|
* otherwise return in_vbl == false.
|
|
|
|
*/
|
|
|
|
for (crtc = 0; (crtc < rdev->num_crtc) && in_vbl; crtc++) {
|
|
|
|
if (rdev->pm.active_crtcs & (1 << crtc)) {
|
drm/radeon: Fixup hw vblank counter/ts for new drm_update_vblank_count() (v2)
commit 4dfd6486 "drm: Use vblank timestamps to guesstimate how many
vblanks were missed" introduced in Linux 4.4-rc1 makes the drm core
more fragile to drivers which don't update hw vblank counters and
vblank timestamps in sync with firing of the vblank irq and
essentially at leading edge of vblank.
This exposed a problem with radeon-kms/amdgpu-kms which do not
satisfy above requirements:
The vblank irq fires a few scanlines before start of vblank, but
programmed pageflips complete at start of vblank and
vblank timestamps update at start of vblank, whereas the
hw vblank counter increments only later, at start of vsync.
This leads to problems like off by one errors for vblank counter
updates, vblank counters apparently going backwards or vblank
timestamps apparently having time going backwards. The net result
is stuttering of graphics in games, or little hangs, as well as
total failure of timing sensitive applications.
See bug #93147 for an example of the regression on Linux 4.4-rc:
https://bugs.freedesktop.org/show_bug.cgi?id=93147
This patch tries to align all above events better from the
viewpoint of the drm core / of external callers to fix the problem:
1. The apparent start of vblank is shifted a few scanlines earlier,
so the vblank irq now always happens after start of this extended
vblank interval and thereby drm_update_vblank_count() always samples
the updated vblank count and timestamp of the new vblank interval.
To achieve this, the reporting of scanout positions by
radeon_get_crtc_scanoutpos() now operates as if the vblank starts
radeon_crtc->lb_vblank_lead_lines before the real start of the hw
vblank interval. This means that the vblank timestamps which are based
on these scanout positions will now update at this earlier start of
vblank.
2. The driver->get_vblank_counter() function will bump the returned
vblank count as read from the hw by +1 if the query happens after
the shifted earlier start of the vblank, but before the real hw increment
at start of vsync, so the counter appears to increment at start of vblank
in sync with the timestamp update.
3. Calls from vblank irq-context and regular non-irq calls are now
treated identical, always simulating the shifted vblank start, to
avoid inconsistent results for queries happening from vblank irq vs.
happening from drm_vblank_enable() or vblank_disable_fn().
4. The radeon_flip_work_func will delay mmio programming a pageflip until
the start of the real vblank iff it happens to execute inside the shifted
earlier start of the vblank, so pageflips now also appear to execute at
start of the shifted vblank, in sync with vblank counter and timestamp
updates. This to avoid some races between updates of vblank count and
timestamps that are used for swap scheduling and pageflip execution which
could cause pageflips to execute before the scheduled target vblank.
The lb_vblank_lead_lines "fudge" value is calculated as the size of
the display controllers line buffer in scanlines for the given video
mode: Vblank irq's are triggered by the line buffer logic when the line
buffer refill for a video frame ends, ie. when the line buffer source read
position enters the hw vblank. This means that a vblank irq could fire at
most as many scanlines before the current reported scanout position of the
crtc timing generator as the number of scanlines the line buffer can
maximally hold for a given video mode.
This patch has been successfully tested on a RV730 card with DCE-3 display
engine and on a evergreen card with DCE-4 display engine, in single-display
and dual-display configuration, with different video modes.
A similar patch is needed for amdgpu-kms to fix the same problem.
Limitations:
- Line buffer sizes in pixels are hard-coded on < DCE-4 to a value
i just guessed to be high enough to work ok, lacking info on the true
sizes atm.
Fixes: fdo#93147
Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: Michel Dänzer <michel.daenzer@amd.com>
Cc: Harry Wentland <Harry.Wentland@amd.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
(v1) Tested-by: Dave Witbrodt <dawitbro@sbcglobal.net>
(v2) Refine radeon_flip_work_func() for better efficiency:
In radeon_flip_work_func, replace the busy waiting udelay(5)
with event lock held by a more performance and energy efficient
usleep_range() until at least predicted true start of hw vblank,
with some slack for scheduler happiness. Release the event lock
during waits to not delay other outputs in doing their stuff, as
the waiting can last up to 200 usecs in some cases.
Retested on DCE-3 and DCE-4 to verify it still works nicely.
(v2) Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-11-25 12:14:31 -07:00
|
|
|
vbl_status = radeon_get_crtc_scanoutpos(rdev->ddev,
|
|
|
|
crtc,
|
|
|
|
USE_REAL_VBLANKSTART,
|
2015-09-14 13:43:44 -06:00
|
|
|
&vpos, &hpos, NULL, NULL,
|
|
|
|
&rdev->mode_info.crtcs[crtc]->base.hwmode);
|
2010-10-22 20:42:17 -06:00
|
|
|
if ((vbl_status & DRM_SCANOUTPOS_VALID) &&
|
2014-09-10 09:36:11 -06:00
|
|
|
!(vbl_status & DRM_SCANOUTPOS_IN_VBLANK))
|
2010-02-17 22:58:36 -07:00
|
|
|
in_vbl = false;
|
|
|
|
}
|
|
|
|
}
|
2010-04-28 10:13:06 -06:00
|
|
|
|
|
|
|
return in_vbl;
|
|
|
|
}
|
|
|
|
|
2010-05-07 13:10:16 -06:00
|
|
|
static bool radeon_pm_debug_check_in_vbl(struct radeon_device *rdev, bool finish)
|
2010-04-28 10:13:06 -06:00
|
|
|
{
|
|
|
|
u32 stat_crtc = 0;
|
|
|
|
bool in_vbl = radeon_pm_in_vbl(rdev);
|
|
|
|
|
2010-02-17 22:58:36 -07:00
|
|
|
if (in_vbl == false)
|
2010-08-01 18:42:55 -06:00
|
|
|
DRM_DEBUG_DRIVER("not in vbl for pm change %08x at %s\n", stat_crtc,
|
2010-04-22 11:38:05 -06:00
|
|
|
finish ? "exit" : "entry");
|
2010-02-17 22:58:36 -07:00
|
|
|
return in_vbl;
|
|
|
|
}
|
2009-12-22 15:02:16 -07:00
|
|
|
|
2010-05-07 13:10:16 -06:00
|
|
|
static void radeon_dynpm_idle_work_handler(struct work_struct *work)
|
2009-12-22 15:02:16 -07:00
|
|
|
{
|
|
|
|
struct radeon_device *rdev;
|
2010-04-26 14:02:26 -06:00
|
|
|
int resched;
|
2009-12-22 15:02:16 -07:00
|
|
|
rdev = container_of(work, struct radeon_device,
|
2010-05-07 13:10:16 -06:00
|
|
|
pm.dynpm_idle_work.work);
|
2009-12-22 15:02:16 -07:00
|
|
|
|
2010-04-26 14:02:26 -06:00
|
|
|
resched = ttm_bo_lock_delayed_workqueue(&rdev->mman.bdev);
|
2009-12-22 15:02:16 -07:00
|
|
|
mutex_lock(&rdev->pm.mutex);
|
2010-05-07 13:10:16 -06:00
|
|
|
if (rdev->pm.dynpm_state == DYNPM_STATE_ACTIVE) {
|
2009-12-22 15:02:16 -07:00
|
|
|
int not_processed = 0;
|
2011-08-25 11:39:48 -06:00
|
|
|
int i;
|
|
|
|
|
|
|
|
for (i = 0; i < RADEON_NUM_RINGS; ++i) {
|
2012-06-14 13:54:57 -06:00
|
|
|
struct radeon_ring *ring = &rdev->ring[i];
|
|
|
|
|
|
|
|
if (ring->ready) {
|
|
|
|
not_processed += radeon_fence_count_emitted(rdev, i);
|
|
|
|
if (not_processed >= 3)
|
|
|
|
break;
|
|
|
|
}
|
2009-12-22 15:02:16 -07:00
|
|
|
}
|
|
|
|
|
|
|
|
if (not_processed >= 3) { /* should upclock */
|
2010-05-07 13:10:16 -06:00
|
|
|
if (rdev->pm.dynpm_planned_action == DYNPM_ACTION_DOWNCLOCK) {
|
|
|
|
rdev->pm.dynpm_planned_action = DYNPM_ACTION_NONE;
|
|
|
|
} else if (rdev->pm.dynpm_planned_action == DYNPM_ACTION_NONE &&
|
|
|
|
rdev->pm.dynpm_can_upclock) {
|
|
|
|
rdev->pm.dynpm_planned_action =
|
|
|
|
DYNPM_ACTION_UPCLOCK;
|
|
|
|
rdev->pm.dynpm_action_timeout = jiffies +
|
2009-12-22 15:02:16 -07:00
|
|
|
msecs_to_jiffies(RADEON_RECLOCK_DELAY_MS);
|
|
|
|
}
|
|
|
|
} else if (not_processed == 0) { /* should downclock */
|
2010-05-07 13:10:16 -06:00
|
|
|
if (rdev->pm.dynpm_planned_action == DYNPM_ACTION_UPCLOCK) {
|
|
|
|
rdev->pm.dynpm_planned_action = DYNPM_ACTION_NONE;
|
|
|
|
} else if (rdev->pm.dynpm_planned_action == DYNPM_ACTION_NONE &&
|
|
|
|
rdev->pm.dynpm_can_downclock) {
|
|
|
|
rdev->pm.dynpm_planned_action =
|
|
|
|
DYNPM_ACTION_DOWNCLOCK;
|
|
|
|
rdev->pm.dynpm_action_timeout = jiffies +
|
2009-12-22 15:02:16 -07:00
|
|
|
msecs_to_jiffies(RADEON_RECLOCK_DELAY_MS);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2010-05-02 23:13:14 -06:00
|
|
|
/* Note, radeon_pm_set_clocks is called with static_switch set
|
|
|
|
* to false since we want to wait for vbl to avoid flicker.
|
|
|
|
*/
|
2010-05-07 13:10:16 -06:00
|
|
|
if (rdev->pm.dynpm_planned_action != DYNPM_ACTION_NONE &&
|
|
|
|
jiffies > rdev->pm.dynpm_action_timeout) {
|
|
|
|
radeon_pm_get_dynpm_state(rdev);
|
|
|
|
radeon_pm_set_clocks(rdev);
|
2009-12-22 15:02:16 -07:00
|
|
|
}
|
DRM / radeon / KMS: Fix hibernation regression related to radeon PM (was: Re: [Regression, post-2.6.34] Hibernation broken on machines with radeon/KMS and r300)
There is a regression from 2.6.34 related to the recent radeon power
management changes, caused by attempting to cancel a delayed work
item that's never been scheduled. However, the code as is has some
other issues potentially leading to visible problems.
First, the mutex around cancel_delayed_work() in radeon_pm_suspend()
doesn't really serve any purpose, because cancel_delayed_work() only
tries to delete the work's timer. Moreover, it doesn't prevent the
work handler from running, so the handler can do some wrong things if
it wins the race and in that case it will rearm itself to do some
more wrong things going forward. So, I think it's better to wait for
the handler to return in case it's already been queued up for
execution. Also, it should be prevented from rearming itself in that
case.
Second, in radeon_set_pm_method() the cancel_delayed_work() is not
sufficient to prevent the work handler from running and queing up
itself for the next run (the failure scenario is that
cancel_delayed_work() returns 0, so the handler is run, it waits on
the mutex and then rearms itself after the mutex has been released),
so again the work handler should be prevented from rearming itself in
that case..
Finally, there's a potential deadlock in radeon_pm_fini(), because
cancel_delayed_work_sync() is called under rdev->pm.mutex, but the
work handler tries to acquire the same mutex (if it wins the race).
Fix the issues described above.
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
Reviewed-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-06-17 17:02:27 -06:00
|
|
|
|
2011-01-03 06:49:32 -07:00
|
|
|
schedule_delayed_work(&rdev->pm.dynpm_idle_work,
|
|
|
|
msecs_to_jiffies(RADEON_IDLE_LOOP_MS));
|
2009-12-22 15:02:16 -07:00
|
|
|
}
|
|
|
|
mutex_unlock(&rdev->pm.mutex);
|
2010-04-26 14:02:26 -06:00
|
|
|
ttm_bo_unlock_delayed_workqueue(&rdev->mman.bdev, resched);
|
2009-12-22 15:02:16 -07:00
|
|
|
}
|
|
|
|
|
2009-11-02 16:53:02 -07:00
|
|
|
/*
|
|
|
|
* Debugfs info
|
|
|
|
*/
|
|
|
|
#if defined(CONFIG_DEBUG_FS)
|
|
|
|
|
|
|
|
static int radeon_debugfs_pm_info(struct seq_file *m, void *data)
|
|
|
|
{
|
|
|
|
struct drm_info_node *node = (struct drm_info_node *) m->private;
|
|
|
|
struct drm_device *dev = node->minor->dev;
|
|
|
|
struct radeon_device *rdev = dev->dev_private;
|
2014-05-19 17:21:29 -06:00
|
|
|
struct drm_device *ddev = rdev->ddev;
|
2009-11-02 16:53:02 -07:00
|
|
|
|
2014-05-19 17:21:29 -06:00
|
|
|
if ((rdev->flags & RADEON_IS_PX) &&
|
|
|
|
(ddev->switch_power_state != DRM_SWITCH_POWER_ON)) {
|
|
|
|
seq_printf(m, "PX asic powered off\n");
|
|
|
|
} else if (rdev->pm.dpm_enabled) {
|
2013-06-28 07:28:39 -06:00
|
|
|
mutex_lock(&rdev->pm.mutex);
|
|
|
|
if (rdev->asic->dpm.debugfs_print_current_performance_level)
|
|
|
|
radeon_dpm_debugfs_print_current_performance_level(rdev, m);
|
|
|
|
else
|
2013-07-02 07:11:39 -06:00
|
|
|
seq_printf(m, "Debugfs support not implemented for this asic\n");
|
2013-06-28 07:28:39 -06:00
|
|
|
mutex_unlock(&rdev->pm.mutex);
|
|
|
|
} else {
|
|
|
|
seq_printf(m, "default engine clock: %u0 kHz\n", rdev->pm.default_sclk);
|
|
|
|
/* radeon_get_engine_clock is not reliable on APUs so just print the current clock */
|
|
|
|
if ((rdev->family >= CHIP_PALM) && (rdev->flags & RADEON_IS_IGP))
|
|
|
|
seq_printf(m, "current engine clock: %u0 kHz\n", rdev->pm.current_sclk);
|
|
|
|
else
|
|
|
|
seq_printf(m, "current engine clock: %u0 kHz\n", radeon_get_engine_clock(rdev));
|
|
|
|
seq_printf(m, "default memory clock: %u0 kHz\n", rdev->pm.default_mclk);
|
|
|
|
if (rdev->asic->pm.get_memory_clock)
|
|
|
|
seq_printf(m, "current memory clock: %u0 kHz\n", radeon_get_memory_clock(rdev));
|
|
|
|
if (rdev->pm.current_vddc)
|
|
|
|
seq_printf(m, "voltage: %u mV\n", rdev->pm.current_vddc);
|
|
|
|
if (rdev->asic->pm.get_pcie_lanes)
|
|
|
|
seq_printf(m, "PCIE lanes: %d\n", radeon_get_pcie_lanes(rdev));
|
|
|
|
}
|
2009-11-02 16:53:02 -07:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static struct drm_info_list radeon_pm_info_list[] = {
|
|
|
|
{"radeon_pm_info", radeon_debugfs_pm_info, 0, NULL},
|
|
|
|
};
|
|
|
|
#endif
|
|
|
|
|
2009-12-22 15:02:16 -07:00
|
|
|
static int radeon_debugfs_pm_init(struct radeon_device *rdev)
|
2009-11-02 16:53:02 -07:00
|
|
|
{
|
|
|
|
#if defined(CONFIG_DEBUG_FS)
|
|
|
|
return radeon_debugfs_add_files(rdev, radeon_pm_info_list, ARRAY_SIZE(radeon_pm_info_list));
|
|
|
|
#else
|
|
|
|
return 0;
|
|
|
|
#endif
|
|
|
|
}
|