2005-11-10 07:26:51 -07:00
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/*
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* linux/arch/arm/mach-omap2/io.c
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*
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* OMAP2 I/O mapping code
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*
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* Copyright (C) 2005 Nokia Corporation
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2009-05-28 15:16:04 -06:00
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* Copyright (C) 2007-2009 Texas Instruments
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2008-10-06 06:49:36 -06:00
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*
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* Author:
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* Juha Yrjola <juha.yrjola@nokia.com>
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* Syed Khasim <x0khasim@ti.com>
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2005-11-10 07:26:51 -07:00
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*
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2009-05-28 15:16:04 -06:00
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* Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
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*
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2005-11-10 07:26:51 -07:00
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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2008-09-06 05:10:45 -06:00
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#include <linux/io.h>
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2009-06-19 19:08:25 -06:00
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#include <linux/clk.h>
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2005-11-10 07:26:51 -07:00
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2006-04-02 10:46:27 -06:00
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#include <asm/tlb.h>
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#include <asm/mach/map.h>
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2009-10-20 10:40:47 -06:00
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#include <plat/sram.h>
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#include <plat/sdrc.h>
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#include <plat/serial.h>
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#include <plat/omap-pm.h>
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2012-02-24 11:34:35 -07:00
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#include <plat/omap_hwmod.h>
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#include <plat/multi.h>
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#include "iomap.h"
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2011-03-16 15:25:45 -06:00
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#include "voltage.h"
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2010-12-21 21:05:16 -07:00
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#include "powerdomain.h"
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2010-12-21 21:05:15 -07:00
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#include "clockdomain.h"
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2011-11-10 14:45:17 -07:00
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#include "common.h"
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2012-02-24 11:34:35 -07:00
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#include "clock2xxx.h"
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#include "clock3xxx.h"
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#include "clock44xx.h"
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2009-09-03 11:14:05 -06:00
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2005-11-10 07:26:51 -07:00
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/*
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* The machine specific code may provide the extra mapping besides the
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* default mapping provided here.
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*/
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2008-10-09 08:51:41 -06:00
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2012-03-06 12:49:22 -07:00
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#if defined(CONFIG_SOC_OMAP2420) || defined(CONFIG_SOC_OMAP2430)
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2008-10-09 08:51:41 -06:00
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static struct map_desc omap24xx_io_desc[] __initdata = {
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2005-11-10 07:26:51 -07:00
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{
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.virtual = L3_24XX_VIRT,
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.pfn = __phys_to_pfn(L3_24XX_PHYS),
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.length = L3_24XX_SIZE,
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.type = MT_DEVICE
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},
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2008-02-20 16:30:06 -07:00
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{
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2008-10-09 08:51:41 -06:00
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.virtual = L4_24XX_VIRT,
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.pfn = __phys_to_pfn(L4_24XX_PHYS),
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.length = L4_24XX_SIZE,
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.type = MT_DEVICE
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2008-02-20 16:30:06 -07:00
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},
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2008-10-09 08:51:41 -06:00
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};
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2011-01-27 17:39:40 -07:00
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#ifdef CONFIG_SOC_OMAP2420
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2008-10-09 08:51:41 -06:00
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static struct map_desc omap242x_io_desc[] __initdata = {
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{
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2010-01-08 15:23:05 -07:00
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.virtual = DSP_MEM_2420_VIRT,
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.pfn = __phys_to_pfn(DSP_MEM_2420_PHYS),
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.length = DSP_MEM_2420_SIZE,
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2008-10-09 08:51:41 -06:00
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.type = MT_DEVICE
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},
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{
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2010-01-08 15:23:05 -07:00
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.virtual = DSP_IPI_2420_VIRT,
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.pfn = __phys_to_pfn(DSP_IPI_2420_PHYS),
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.length = DSP_IPI_2420_SIZE,
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2008-10-09 08:51:41 -06:00
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.type = MT_DEVICE
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2008-02-20 16:30:06 -07:00
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},
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2008-10-09 08:51:41 -06:00
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{
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2010-01-08 15:23:05 -07:00
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.virtual = DSP_MMU_2420_VIRT,
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.pfn = __phys_to_pfn(DSP_MMU_2420_PHYS),
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.length = DSP_MMU_2420_SIZE,
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2008-10-09 08:51:41 -06:00
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.type = MT_DEVICE
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},
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};
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#endif
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2011-01-27 17:39:40 -07:00
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#ifdef CONFIG_SOC_OMAP2430
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2008-10-09 08:51:41 -06:00
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static struct map_desc omap243x_io_desc[] __initdata = {
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2006-12-06 18:14:05 -07:00
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{
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.virtual = L4_WK_243X_VIRT,
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.pfn = __phys_to_pfn(L4_WK_243X_PHYS),
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.length = L4_WK_243X_SIZE,
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.type = MT_DEVICE
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},
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{
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.virtual = OMAP243X_GPMC_VIRT,
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.pfn = __phys_to_pfn(OMAP243X_GPMC_PHYS),
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.length = OMAP243X_GPMC_SIZE,
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.type = MT_DEVICE
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},
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2008-10-09 08:51:41 -06:00
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{
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.virtual = OMAP243X_SDRC_VIRT,
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.pfn = __phys_to_pfn(OMAP243X_SDRC_PHYS),
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.length = OMAP243X_SDRC_SIZE,
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.type = MT_DEVICE
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},
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{
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.virtual = OMAP243X_SMS_VIRT,
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.pfn = __phys_to_pfn(OMAP243X_SMS_PHYS),
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.length = OMAP243X_SMS_SIZE,
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.type = MT_DEVICE
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},
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};
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2006-12-06 18:14:05 -07:00
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#endif
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#endif
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2008-10-09 08:51:41 -06:00
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2010-02-12 13:26:48 -07:00
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#ifdef CONFIG_ARCH_OMAP3
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2008-10-09 08:51:41 -06:00
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static struct map_desc omap34xx_io_desc[] __initdata = {
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2005-11-10 07:26:51 -07:00
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{
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2008-10-09 08:51:41 -06:00
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.virtual = L3_34XX_VIRT,
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.pfn = __phys_to_pfn(L3_34XX_PHYS),
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.length = L3_34XX_SIZE,
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2006-12-07 14:58:10 -07:00
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.type = MT_DEVICE
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},
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{
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2008-10-09 08:51:41 -06:00
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.virtual = L4_34XX_VIRT,
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.pfn = __phys_to_pfn(L4_34XX_PHYS),
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.length = L4_34XX_SIZE,
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2006-12-07 14:58:10 -07:00
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.type = MT_DEVICE
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},
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2008-10-09 08:51:41 -06:00
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{
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.virtual = OMAP34XX_GPMC_VIRT,
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.pfn = __phys_to_pfn(OMAP34XX_GPMC_PHYS),
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.length = OMAP34XX_GPMC_SIZE,
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2005-11-10 07:26:51 -07:00
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.type = MT_DEVICE
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2008-10-09 08:51:41 -06:00
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},
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{
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.virtual = OMAP343X_SMS_VIRT,
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.pfn = __phys_to_pfn(OMAP343X_SMS_PHYS),
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.length = OMAP343X_SMS_SIZE,
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.type = MT_DEVICE
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},
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{
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.virtual = OMAP343X_SDRC_VIRT,
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.pfn = __phys_to_pfn(OMAP343X_SDRC_PHYS),
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.length = OMAP343X_SDRC_SIZE,
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2005-11-10 07:26:51 -07:00
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.type = MT_DEVICE
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2008-10-09 08:51:41 -06:00
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},
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{
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.virtual = L4_PER_34XX_VIRT,
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.pfn = __phys_to_pfn(L4_PER_34XX_PHYS),
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.length = L4_PER_34XX_SIZE,
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.type = MT_DEVICE
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},
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{
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.virtual = L4_EMU_34XX_VIRT,
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.pfn = __phys_to_pfn(L4_EMU_34XX_PHYS),
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.length = L4_EMU_34XX_SIZE,
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.type = MT_DEVICE
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},
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2010-04-30 13:57:14 -06:00
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#if defined(CONFIG_DEBUG_LL) && \
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(defined(CONFIG_MACH_OMAP_ZOOM2) || defined(CONFIG_MACH_OMAP_ZOOM3))
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{
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.virtual = ZOOM_UART_VIRT,
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.pfn = __phys_to_pfn(ZOOM_UART_BASE),
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.length = SZ_1M,
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.type = MT_DEVICE
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},
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#endif
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2005-11-10 07:26:51 -07:00
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};
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2008-10-09 08:51:41 -06:00
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#endif
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2011-02-16 09:31:39 -07:00
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2011-12-13 11:46:44 -07:00
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#ifdef CONFIG_SOC_OMAPTI81XX
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static struct map_desc omapti81xx_io_desc[] __initdata = {
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2011-12-13 11:46:43 -07:00
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{
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.virtual = L4_34XX_VIRT,
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.pfn = __phys_to_pfn(L4_34XX_PHYS),
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.length = L4_34XX_SIZE,
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.type = MT_DEVICE
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}
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};
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#endif
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#ifdef CONFIG_SOC_OMAPAM33XX
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static struct map_desc omapam33xx_io_desc[] __initdata = {
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2011-02-16 09:31:39 -07:00
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{
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.virtual = L4_34XX_VIRT,
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.pfn = __phys_to_pfn(L4_34XX_PHYS),
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.length = L4_34XX_SIZE,
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.type = MT_DEVICE
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},
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2011-12-13 11:46:43 -07:00
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{
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.virtual = L4_WK_AM33XX_VIRT,
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.pfn = __phys_to_pfn(L4_WK_AM33XX_PHYS),
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.length = L4_WK_AM33XX_SIZE,
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.type = MT_DEVICE
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}
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2011-02-16 09:31:39 -07:00
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};
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#endif
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2009-05-28 15:16:04 -06:00
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#ifdef CONFIG_ARCH_OMAP4
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static struct map_desc omap44xx_io_desc[] __initdata = {
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{
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.virtual = L3_44XX_VIRT,
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.pfn = __phys_to_pfn(L3_44XX_PHYS),
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.length = L3_44XX_SIZE,
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.type = MT_DEVICE,
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},
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{
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.virtual = L4_44XX_VIRT,
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.pfn = __phys_to_pfn(L4_44XX_PHYS),
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.length = L4_44XX_SIZE,
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.type = MT_DEVICE,
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},
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{
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.virtual = OMAP44XX_GPMC_VIRT,
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.pfn = __phys_to_pfn(OMAP44XX_GPMC_PHYS),
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.length = OMAP44XX_GPMC_SIZE,
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.type = MT_DEVICE,
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},
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2009-10-19 18:25:57 -06:00
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{
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.virtual = OMAP44XX_EMIF1_VIRT,
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.pfn = __phys_to_pfn(OMAP44XX_EMIF1_PHYS),
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.length = OMAP44XX_EMIF1_SIZE,
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.type = MT_DEVICE,
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},
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{
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.virtual = OMAP44XX_EMIF2_VIRT,
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.pfn = __phys_to_pfn(OMAP44XX_EMIF2_PHYS),
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.length = OMAP44XX_EMIF2_SIZE,
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.type = MT_DEVICE,
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},
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{
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.virtual = OMAP44XX_DMM_VIRT,
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.pfn = __phys_to_pfn(OMAP44XX_DMM_PHYS),
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.length = OMAP44XX_DMM_SIZE,
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.type = MT_DEVICE,
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},
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2009-05-28 15:16:04 -06:00
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{
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.virtual = L4_PER_44XX_VIRT,
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.pfn = __phys_to_pfn(L4_PER_44XX_PHYS),
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.length = L4_PER_44XX_SIZE,
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.type = MT_DEVICE,
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},
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{
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.virtual = L4_EMU_44XX_VIRT,
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.pfn = __phys_to_pfn(L4_EMU_44XX_PHYS),
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.length = L4_EMU_44XX_SIZE,
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.type = MT_DEVICE,
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},
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2011-06-25 19:04:31 -06:00
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#ifdef CONFIG_OMAP4_ERRATA_I688
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{
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.virtual = OMAP4_SRAM_VA,
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.pfn = __phys_to_pfn(OMAP4_SRAM_PA),
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.length = PAGE_SIZE,
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.type = MT_MEMORY_SO,
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},
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#endif
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2009-05-28 15:16:04 -06:00
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};
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#endif
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2005-11-10 07:26:51 -07:00
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2011-01-27 17:39:40 -07:00
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#ifdef CONFIG_SOC_OMAP2420
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2010-03-03 09:24:53 -07:00
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void __init omap242x_map_common_io(void)
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2005-11-10 07:26:51 -07:00
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{
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2008-10-09 08:51:41 -06:00
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iotable_init(omap24xx_io_desc, ARRAY_SIZE(omap24xx_io_desc));
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iotable_init(omap242x_io_desc, ARRAY_SIZE(omap242x_io_desc));
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2010-02-12 13:26:47 -07:00
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}
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2008-10-09 08:51:41 -06:00
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#endif
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2011-01-27 17:39:40 -07:00
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#ifdef CONFIG_SOC_OMAP2430
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2010-03-03 09:24:53 -07:00
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void __init omap243x_map_common_io(void)
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2010-02-12 13:26:47 -07:00
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{
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2008-10-09 08:51:41 -06:00
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iotable_init(omap24xx_io_desc, ARRAY_SIZE(omap24xx_io_desc));
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iotable_init(omap243x_io_desc, ARRAY_SIZE(omap243x_io_desc));
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2010-02-12 13:26:47 -07:00
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}
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2008-10-09 08:51:41 -06:00
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#endif
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2010-02-12 13:26:48 -07:00
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#ifdef CONFIG_ARCH_OMAP3
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2010-03-03 09:24:53 -07:00
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void __init omap34xx_map_common_io(void)
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2010-02-12 13:26:47 -07:00
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{
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2008-10-09 08:51:41 -06:00
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iotable_init(omap34xx_io_desc, ARRAY_SIZE(omap34xx_io_desc));
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2010-02-12 13:26:47 -07:00
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}
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2008-10-09 08:51:41 -06:00
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#endif
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2006-04-02 10:46:27 -06:00
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2011-12-13 11:46:44 -07:00
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#ifdef CONFIG_SOC_OMAPTI81XX
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void __init omapti81xx_map_common_io(void)
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2011-02-16 09:31:39 -07:00
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{
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2011-12-13 11:46:44 -07:00
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iotable_init(omapti81xx_io_desc, ARRAY_SIZE(omapti81xx_io_desc));
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2011-02-16 09:31:39 -07:00
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}
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#endif
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|
|
2011-12-13 11:46:43 -07:00
|
|
|
#ifdef CONFIG_SOC_OMAPAM33XX
|
|
|
|
void __init omapam33xx_map_common_io(void)
|
2011-02-16 09:31:39 -07:00
|
|
|
{
|
2011-12-13 11:46:43 -07:00
|
|
|
iotable_init(omapam33xx_io_desc, ARRAY_SIZE(omapam33xx_io_desc));
|
2011-02-16 09:31:39 -07:00
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
2010-02-12 13:26:47 -07:00
|
|
|
#ifdef CONFIG_ARCH_OMAP4
|
2010-03-03 09:24:53 -07:00
|
|
|
void __init omap44xx_map_common_io(void)
|
2010-02-12 13:26:47 -07:00
|
|
|
{
|
2009-05-28 15:16:04 -06:00
|
|
|
iotable_init(omap44xx_io_desc, ARRAY_SIZE(omap44xx_io_desc));
|
2012-02-02 07:03:55 -07:00
|
|
|
omap_barriers_init();
|
2006-04-02 10:46:27 -06:00
|
|
|
}
|
2010-02-12 13:26:47 -07:00
|
|
|
#endif
|
2006-04-02 10:46:27 -06:00
|
|
|
|
2009-06-19 19:08:25 -06:00
|
|
|
/*
|
|
|
|
* omap2_init_reprogram_sdrc - reprogram SDRC timing parameters
|
|
|
|
*
|
|
|
|
* Sets the CORE DPLL3 M2 divider to the same value that it's at
|
|
|
|
* currently. This has the effect of setting the SDRC SDRAM AC timing
|
|
|
|
* registers to the values currently defined by the kernel. Currently
|
|
|
|
* only defined for OMAP3; will return 0 if called on OMAP2. Returns
|
|
|
|
* -EINVAL if the dpll3_m2_ck cannot be found, 0 if called on OMAP2,
|
|
|
|
* or passes along the return value of clk_set_rate().
|
|
|
|
*/
|
|
|
|
static int __init _omap2_init_reprogram_sdrc(void)
|
|
|
|
{
|
|
|
|
struct clk *dpll3_m2_ck;
|
|
|
|
int v = -EINVAL;
|
|
|
|
long rate;
|
|
|
|
|
|
|
|
if (!cpu_is_omap34xx())
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
dpll3_m2_ck = clk_get(NULL, "dpll3_m2_ck");
|
2010-11-30 07:17:58 -07:00
|
|
|
if (IS_ERR(dpll3_m2_ck))
|
2009-06-19 19:08:25 -06:00
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
rate = clk_get_rate(dpll3_m2_ck);
|
|
|
|
pr_info("Reprogramming SDRC clock to %ld Hz\n", rate);
|
|
|
|
v = clk_set_rate(dpll3_m2_ck, rate);
|
|
|
|
if (v)
|
|
|
|
pr_err("dpll3_m2_clk rate change failed: %d\n", v);
|
|
|
|
|
|
|
|
clk_put(dpll3_m2_ck);
|
|
|
|
|
|
|
|
return v;
|
|
|
|
}
|
|
|
|
|
2010-12-14 12:42:35 -07:00
|
|
|
static int _set_hwmod_postsetup_state(struct omap_hwmod *oh, void *data)
|
|
|
|
{
|
|
|
|
return omap_hwmod_set_postsetup_state(oh, *(u8 *)data);
|
|
|
|
}
|
|
|
|
|
2011-10-04 19:26:28 -06:00
|
|
|
static void __init omap_common_init_early(void)
|
2006-04-02 10:46:27 -06:00
|
|
|
{
|
2011-11-01 06:47:27 -06:00
|
|
|
omap_init_consistent_dma_size();
|
2011-10-04 19:26:28 -06:00
|
|
|
}
|
2010-12-14 12:42:35 -07:00
|
|
|
|
2011-10-04 19:26:28 -06:00
|
|
|
static void __init omap_hwmod_init_postsetup(void)
|
|
|
|
{
|
|
|
|
u8 postsetup_state;
|
2010-12-14 12:42:35 -07:00
|
|
|
|
|
|
|
/* Set the default postsetup state for all hwmods */
|
|
|
|
#ifdef CONFIG_PM_RUNTIME
|
|
|
|
postsetup_state = _HWMOD_STATE_IDLE;
|
|
|
|
#else
|
|
|
|
postsetup_state = _HWMOD_STATE_ENABLED;
|
|
|
|
#endif
|
|
|
|
omap_hwmod_for_each(_set_hwmod_postsetup_state, &postsetup_state);
|
2010-05-12 09:54:36 -06:00
|
|
|
|
OMAP2+: wd_timer: disable on boot via hwmod postsetup mechanism
The OMAP watchdog timer IP blocks require a specific set of register
writes to occur before they will be disabled[1], even if the device
clocks appear to be disabled in the CM_*CLKEN registers. In the MPU
watchdog case, failure to execute this reset sequence will eventually
cause the watchdog to reset the OMAP unexpectedly.
Previously, the code to disable this watchdog was manually called from
mach-omap2/devices.c during device initialization. This causes the
watchdog to be unconditionally disabled for a portion of kernel
initialization. This should be controllable by the board-*.c files,
since some system integrators will want full watchdog coverage of
kernel initialization. Also, the watchdog disable code was not
connected to the hwmod shutdown code. This means that calling
omap_hwmod_shutdown() will not, in fact, disable the watchdog, and the
goal of omap_hwmod_shutdown() is to be able to shutdown any on-chip
OMAP device.
To resolve the latter problem, populate the pre_shutdown pointer in
the watchdog timer hwmod classes with a function that executes the
watchdog shutdown sequence. This allows the hwmod code to fully
disable the watchdog.
Then, to allow some board files to support watchdog coverage
throughout kernel initialization, add common code to mach-omap2/io.c
to cause the MPU watchdog to be disabled on boot unless a board file
specifically requests it to remain enabled. Board files can do this
by changing the watchdog timer hwmod's postsetup state between the
omap2_init_common_infrastructure() and omap2_init_common_devices()
function calls.
1. OMAP34xx Multimedia Device Silicon Revision 3.1.x Rev. ZH
[SWPU222H], Section 16.4.3.6, "Start/Stop Sequence for WDTs (Using
WDTi.WSPR Register)"
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Charulatha Varadarajan <charu@ti.com>
2010-12-21 15:39:15 -07:00
|
|
|
/*
|
|
|
|
* Set the default postsetup state for unusual modules (like
|
|
|
|
* MPU WDT).
|
|
|
|
*
|
|
|
|
* The postsetup_state is not actually used until
|
|
|
|
* omap_hwmod_late_init(), so boards that desire full watchdog
|
|
|
|
* coverage of kernel initialization can reprogram the
|
|
|
|
* postsetup_state between the calls to
|
2011-08-23 00:57:23 -06:00
|
|
|
* omap2_init_common_infra() and omap_sdrc_init().
|
OMAP2+: wd_timer: disable on boot via hwmod postsetup mechanism
The OMAP watchdog timer IP blocks require a specific set of register
writes to occur before they will be disabled[1], even if the device
clocks appear to be disabled in the CM_*CLKEN registers. In the MPU
watchdog case, failure to execute this reset sequence will eventually
cause the watchdog to reset the OMAP unexpectedly.
Previously, the code to disable this watchdog was manually called from
mach-omap2/devices.c during device initialization. This causes the
watchdog to be unconditionally disabled for a portion of kernel
initialization. This should be controllable by the board-*.c files,
since some system integrators will want full watchdog coverage of
kernel initialization. Also, the watchdog disable code was not
connected to the hwmod shutdown code. This means that calling
omap_hwmod_shutdown() will not, in fact, disable the watchdog, and the
goal of omap_hwmod_shutdown() is to be able to shutdown any on-chip
OMAP device.
To resolve the latter problem, populate the pre_shutdown pointer in
the watchdog timer hwmod classes with a function that executes the
watchdog shutdown sequence. This allows the hwmod code to fully
disable the watchdog.
Then, to allow some board files to support watchdog coverage
throughout kernel initialization, add common code to mach-omap2/io.c
to cause the MPU watchdog to be disabled on boot unless a board file
specifically requests it to remain enabled. Board files can do this
by changing the watchdog timer hwmod's postsetup state between the
omap2_init_common_infrastructure() and omap2_init_common_devices()
function calls.
1. OMAP34xx Multimedia Device Silicon Revision 3.1.x Rev. ZH
[SWPU222H], Section 16.4.3.6, "Start/Stop Sequence for WDTs (Using
WDTi.WSPR Register)"
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Charulatha Varadarajan <charu@ti.com>
2010-12-21 15:39:15 -07:00
|
|
|
*
|
|
|
|
* XXX ideally we could detect whether the MPU WDT was currently
|
|
|
|
* enabled here and make this conditional
|
|
|
|
*/
|
|
|
|
postsetup_state = _HWMOD_STATE_DISABLED;
|
|
|
|
omap_hwmod_for_each_by_class("wd_timer",
|
|
|
|
_set_hwmod_postsetup_state,
|
|
|
|
&postsetup_state);
|
|
|
|
|
2010-12-09 08:13:48 -07:00
|
|
|
omap_pm_if_early_init();
|
OMAP2+: io: split omap2_init_common_hw()
Split omap2_init_common_hw() into two functions. The first,
omap2_init_common_infrastructure(), initializes the hwmod code and
data, the OMAP PM code, and the clock code and data. The second,
omap2_init_common_devices(), handles any other early device
initialization that, for whatever reason, has not been or cannot be
moved to initcalls or early platform devices.
This patch is required for the hwmod postsetup patch, which allows
board files to change the state that hwmods should be placed into at
the conclusion of the hwmod _setup() function. For example, for a
board whose creators wish to ensure watchdog coverage across the
entire kernel boot process, code to change the watchdog's postsetup
state will be added in the board-*.c file between the
omap2_init_common_infrastructure() and omap2_init_common_devices() function
calls.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Tony Lindgren <tony@atomide.com>
2010-12-21 15:25:10 -07:00
|
|
|
}
|
|
|
|
|
2012-01-25 12:57:46 -07:00
|
|
|
#ifdef CONFIG_SOC_OMAP2420
|
2011-08-23 00:57:24 -06:00
|
|
|
void __init omap2420_init_early(void)
|
|
|
|
{
|
2011-10-04 19:17:41 -06:00
|
|
|
omap2_set_globals_242x();
|
2011-12-19 03:20:15 -07:00
|
|
|
omap2xxx_check_revision();
|
2011-10-04 19:26:28 -06:00
|
|
|
omap_common_init_early();
|
|
|
|
omap2xxx_voltagedomains_init();
|
|
|
|
omap242x_powerdomains_init();
|
|
|
|
omap242x_clockdomains_init();
|
|
|
|
omap2420_hwmod_init();
|
|
|
|
omap_hwmod_init_postsetup();
|
|
|
|
omap2420_clk_init();
|
2011-08-23 00:57:24 -06:00
|
|
|
}
|
2012-01-25 12:57:46 -07:00
|
|
|
#endif
|
2011-08-23 00:57:24 -06:00
|
|
|
|
2012-01-25 12:57:46 -07:00
|
|
|
#ifdef CONFIG_SOC_OMAP2430
|
2011-08-23 00:57:24 -06:00
|
|
|
void __init omap2430_init_early(void)
|
|
|
|
{
|
2011-10-04 19:17:41 -06:00
|
|
|
omap2_set_globals_243x();
|
2011-12-19 03:20:15 -07:00
|
|
|
omap2xxx_check_revision();
|
2011-10-04 19:26:28 -06:00
|
|
|
omap_common_init_early();
|
|
|
|
omap2xxx_voltagedomains_init();
|
|
|
|
omap243x_powerdomains_init();
|
|
|
|
omap243x_clockdomains_init();
|
|
|
|
omap2430_hwmod_init();
|
|
|
|
omap_hwmod_init_postsetup();
|
|
|
|
omap2430_clk_init();
|
|
|
|
}
|
2011-10-13 10:14:10 -06:00
|
|
|
#endif
|
2011-10-04 19:26:28 -06:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Currently only board-omap3beagle.c should call this because of the
|
|
|
|
* same machine_id for 34xx and 36xx beagle.. Will get fixed with DT.
|
|
|
|
*/
|
2011-10-13 10:14:10 -06:00
|
|
|
#ifdef CONFIG_ARCH_OMAP3
|
2011-10-04 19:26:28 -06:00
|
|
|
void __init omap3_init_early(void)
|
|
|
|
{
|
2011-10-04 19:17:41 -06:00
|
|
|
omap2_set_globals_3xxx();
|
2011-12-19 03:20:15 -07:00
|
|
|
omap3xxx_check_revision();
|
|
|
|
omap3xxx_check_features();
|
2011-10-04 19:26:28 -06:00
|
|
|
omap_common_init_early();
|
|
|
|
omap3xxx_voltagedomains_init();
|
|
|
|
omap3xxx_powerdomains_init();
|
|
|
|
omap3xxx_clockdomains_init();
|
|
|
|
omap3xxx_hwmod_init();
|
|
|
|
omap_hwmod_init_postsetup();
|
|
|
|
omap3xxx_clk_init();
|
2011-08-23 00:57:24 -06:00
|
|
|
}
|
|
|
|
|
|
|
|
void __init omap3430_init_early(void)
|
|
|
|
{
|
2011-10-04 19:26:28 -06:00
|
|
|
omap3_init_early();
|
2011-08-23 00:57:24 -06:00
|
|
|
}
|
|
|
|
|
|
|
|
void __init omap35xx_init_early(void)
|
|
|
|
{
|
2011-10-04 19:26:28 -06:00
|
|
|
omap3_init_early();
|
2011-08-23 00:57:24 -06:00
|
|
|
}
|
|
|
|
|
|
|
|
void __init omap3630_init_early(void)
|
|
|
|
{
|
2011-10-04 19:26:28 -06:00
|
|
|
omap3_init_early();
|
2011-08-23 00:57:24 -06:00
|
|
|
}
|
|
|
|
|
|
|
|
void __init am35xx_init_early(void)
|
|
|
|
{
|
2011-10-04 19:26:28 -06:00
|
|
|
omap3_init_early();
|
2011-08-23 00:57:24 -06:00
|
|
|
}
|
|
|
|
|
2011-12-13 11:46:44 -07:00
|
|
|
void __init ti81xx_init_early(void)
|
2011-08-23 00:57:24 -06:00
|
|
|
{
|
2011-12-13 11:46:44 -07:00
|
|
|
omap2_set_globals_ti81xx();
|
2011-12-19 03:20:15 -07:00
|
|
|
omap3xxx_check_revision();
|
|
|
|
ti81xx_check_features();
|
2011-10-04 19:17:41 -06:00
|
|
|
omap_common_init_early();
|
|
|
|
omap3xxx_voltagedomains_init();
|
|
|
|
omap3xxx_powerdomains_init();
|
|
|
|
omap3xxx_clockdomains_init();
|
|
|
|
omap3xxx_hwmod_init();
|
|
|
|
omap_hwmod_init_postsetup();
|
|
|
|
omap3xxx_clk_init();
|
2011-08-23 00:57:24 -06:00
|
|
|
}
|
2011-10-13 10:14:10 -06:00
|
|
|
#endif
|
2011-08-23 00:57:24 -06:00
|
|
|
|
2011-10-13 10:14:10 -06:00
|
|
|
#ifdef CONFIG_ARCH_OMAP4
|
2011-08-23 00:57:24 -06:00
|
|
|
void __init omap4430_init_early(void)
|
|
|
|
{
|
2011-10-04 19:17:41 -06:00
|
|
|
omap2_set_globals_443x();
|
2011-12-19 03:20:15 -07:00
|
|
|
omap4xxx_check_revision();
|
|
|
|
omap4xxx_check_features();
|
2011-10-04 19:26:28 -06:00
|
|
|
omap_common_init_early();
|
|
|
|
omap44xx_voltagedomains_init();
|
|
|
|
omap44xx_powerdomains_init();
|
|
|
|
omap44xx_clockdomains_init();
|
|
|
|
omap44xx_hwmod_init();
|
|
|
|
omap_hwmod_init_postsetup();
|
|
|
|
omap4xxx_clk_init();
|
2011-08-23 00:57:24 -06:00
|
|
|
}
|
2011-10-13 10:14:10 -06:00
|
|
|
#endif
|
2011-08-23 00:57:24 -06:00
|
|
|
|
2011-08-23 00:57:23 -06:00
|
|
|
void __init omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0,
|
OMAP2+: io: split omap2_init_common_hw()
Split omap2_init_common_hw() into two functions. The first,
omap2_init_common_infrastructure(), initializes the hwmod code and
data, the OMAP PM code, and the clock code and data. The second,
omap2_init_common_devices(), handles any other early device
initialization that, for whatever reason, has not been or cannot be
moved to initcalls or early platform devices.
This patch is required for the hwmod postsetup patch, which allows
board files to change the state that hwmods should be placed into at
the conclusion of the hwmod _setup() function. For example, for a
board whose creators wish to ensure watchdog coverage across the
entire kernel boot process, code to change the watchdog's postsetup
state will be added in the board-*.c file between the
omap2_init_common_infrastructure() and omap2_init_common_devices() function
calls.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Tony Lindgren <tony@atomide.com>
2010-12-21 15:25:10 -07:00
|
|
|
struct omap_sdrc_params *sdrc_cs1)
|
|
|
|
{
|
2011-10-04 14:52:57 -06:00
|
|
|
omap_sram_init();
|
|
|
|
|
2011-02-16 09:31:39 -07:00
|
|
|
if (cpu_is_omap24xx() || omap3_has_sdrc()) {
|
2010-03-10 10:16:31 -07:00
|
|
|
omap2_sdrc_init(sdrc_cs0, sdrc_cs1);
|
|
|
|
_omap2_init_reprogram_sdrc();
|
|
|
|
}
|
2005-11-10 07:26:51 -07:00
|
|
|
}
|