At SPDIF TX interrupt the firmware running on M0+ core
overwrites TX DPATH BYPASS FEM bit which turns the
expected PHY DMAC TX PLL clock 2*bitclock instead of
expected 10*bitclock if SAI PLL is used as PHY DMAC TX
PLL.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
The existing "shutdown" callback does not consider
full duplex mode, fix this.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Update drivers constrains, limit sample rates to
[8Khz - 64Khz] and up to 8 channels.
Use SND_SOC_DAIFMT_PDM format type and remove
tdm slot settings to allow capture from multiple
SAI_RxD pins.
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Signed-off-by: Adrian Alonso <adrian.alonso@nxp.com>
The criteria used to drop eARC mode into ARC mode
makes eARC function to fail. Drop it for now.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
With route "Playback" -> "Playback", dapm will enable
the "Playback" widget to be power on, there is this same
widget for codec component, then codec will enter
the SND_SOC_BIAS_ON level, then mclk is enabled
When the mclk is bound with a power domain, the power
domain will be enabled always.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Peng Zhang <peng.zhang_8@nxp.com>
On imx8mp, there is no dedicated reset controller for DSP and
there is no dedicated power domain for DSP.
The power of DSP is bound with audiomix, so we need to check
the DSP status for judging the audiomix is reset or not.
We use the PID register for status check, after reset, it will
be set to zero, when DSP is used we set it to 1.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Peng Zhang <peng.zhang_8@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
Fix the error handler in probe. otherwise the resource
can't be release when error happen.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Peng Zhang <peng.zhang_8@nxp.com>
Need to use pm_runtime_get_sync & pm_runtime_put_sync in probe
to bind the attached power domain with device.
Fixes: ee1a47b87f ("MLK-23618-6: ASoC: fsl_dsp: refine handling of multi power domain")
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Peng Zhang <peng.zhang_8@nxp.com>
The call flow:
devm_regmap_init_mmio_clk
- clk_prepare()
- clk_pm_runtime_get()
Cause the power domain of ipg clock always be enabled.
which impact the power consumption.
so we can't bind clock with regmap, but explicitly enable
clock when using.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Viorel Suman <viorel.suman@nxp.com>
The call flow:
devm_regmap_init_mmio_clk
- clk_prepare()
- clk_pm_runtime_get()
Cause the power domain of mem clock always be enabled.
which impact the power consumption.
so we can't bind clock with regmap, but explicitly enable
clock when using.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Viorel Suman <viorel.suman@nxp.com>
With imx-pcm-dma, the dma channel is created in probe, when
there is power domain attached with dma device, the power
domain will be enabled when channel is created, then the
power of the domain will be always enabled from beginning.
So switch to imx-pcm-dma-v2, then the dma channel will be
created when playback or capture really started.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Viorel Suman <viorel.suman@nxp.com>
The call flow:
devm_regmap_init_mmio_clk
- clk_prepare()
- clk_pm_runtime_get()
Cause the power domain of bus clock always be enabled.
which impact the power consumption.
So we can't bind clock with regmap, then explicitly enable
clock when using.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Viorel Suman <viorel.suman@nxp.com>
A power domain associated with a device may be disabled in
a separate thread by "genpd_power_off_work_fn" function in
case the device has no PM runtime enabled at that moment.
This will stop the parent clock of "bus" clk and hang
the probe in regmap read/write operation. In order to avoid
this PM runtime must be enabled before any regmap read/write
ops. Aside of this replace clk bus clocks with
pm_runtime_get/put_sync calls.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Fixes: c2641e1974 ("MLK-23618-9: ASoC: fsl_sai: Don't bind clock with regmap")
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Set regmap to use regcache only in probe in order to avoid
issue on cat /sys/kernel/debug/regmap/30cc0000.xcvr/registers
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
The issue is GPU will crash when do dsp suspend test, and only
meet this issue when load GPU as module.
The reason is that dsp framework's global data set size little
than actul size. So dsp will touch the memory that not owned
dsp, then caused GPU crash.
Signed-off-by: Zhang Peng <peng.zhang_8@nxp.com>
M0+ core must be released prior raising any interrupt
to M0+ core, otherwise interrupt will be lost.
Fixes: b164260078 ("MLK-23567-2 ASoC: fsl_xcvr: enable SPDIF TX")
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Before the parameters getting from dsp is not right, now correct it.
Signed-off-by: Zhang Peng <peng.zhang_8@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
XCVR driver working mode is set by "fsl,xcvr-mode" DTS
property. Being static - it does not allow changing
XCVR driver mode at runtime. Rework the driver by replacing
static DTS property with amixer control.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
For IEC958 kcontrol type amixer tool returns just first 4 bytes,
add a byte array control so that we'll be able to set all 24 bytes
of TX CS by using amixer.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
As we use one spare sai instance to monitor the spdif rx
clock, there isn't belong to a sound card, we can't access
the registers by amixer controls.
So remove the amixer controls, replace them with the device
attribute.
And add an additional device attribute for enablement of
monitorring spdif. This feature only be supported on imx8mm.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Viorel Suman <viorel.suman@nxp.com>
Add an amixer interface which allows to load
capabilities data structure.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Before fixed codec name cs42888, now also support wm8960 codec,
thus add to choose set codec name depend on enabled codec.
Signed-off-by: Zhang Peng <peng.zhang_8@nxp.com>
There are 2 configurable options for eARC RX fallback
to ARC mode: "ARC single ended" or "ARC common".
Add amixer control in order to allow setting it
from userspace.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Sample bits constraint is meaningless given that the only
supported format is SNDRV_PCM_FMTBIT_IEC958_SUBFRAME_LE.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
For IEC958 kcontrol type amixer tool returns just first 4 bytes,
add a byte array control so that we'll be able to see all 24 bytes
by using amixer.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
CS_DATA registers are supposed to be used by M0+
core, according to block guide host core must read
channel status structure from data memory.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
in i.MX8MP, the audio codec is registered by DT, and we reserve
a memory in DT that we can allocate dma memory from the
reserved pool.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Viorel Suman <viorel.suman@nxp.com>
in i.MX8MP, the audio codec is registered by DT. So we add
a new flag: codec_in_dt
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Viorel Suman <viorel.suman@nxp.com>
Move clocks prepare_enable and disable_unprepare calls
into runtime_resume and runtime_suspend respectively.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Move static XCVR IP configuration code into firmware load
method in order to avoid the need to have bus clock started
in "startup" callback.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Set watermarks values at half FIFO size, and max burst to 1/8
of FIFO size.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
"startup" callback is not called in a subsequent
"runtime_resume" sequence, so move IP init code
into "prepare" callback. Aside of this move
constraint check code from "prepare" to "startup"
since constraint checking is required once at stream
startup.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Refactor constraint handling in order to facilitate
unimplemented cases, such as for ARC and SPDIF.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Don't need to add one more buffer, if the buffer
size is same as ASRC_MAX_BUFFER_SIZE.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Viorel Suman <viorel.suman@nxp.com>
In reboot, system will try to access regisers through
the dai controls, but the clock is not bind with regmap,
then system hang.
So we enable regcache_cache_only in probe to fix this
issue.
Fixes: d55d453fdf ("MLK-23618-11: ASoC: fsl_spdif: Don't bind clock with regmap")
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Viorel Suman <viorel.suman@nxp.com>
The call flow:
devm_regmap_init_mmio_clk
- clk_prepare()
- clk_pm_runtime_get()
Cause the power domain of lpcg clock always be enabled.
which impact the power consumption.
So we can't bind clock with regmap, then explicitly enable
clock when using. As we already enable all clock in
pm_runtime_resume, so only need to enable clock in probe.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
The call flow:
devm_regmap_init_mmio_clk
- clk_prepare()
- clk_pm_runtime_get()
Cause the power domain of lpcg clock always be enabled.
which impact the power consumption.
So we can't bind clock with regmap, then explicitly enable
clock when using. As we already enable all clock in
pm_runtime_resume, so only need to enable clock in probe.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
The call flow:
devm_regmap_init_mmio_clk
- clk_prepare()
- clk_pm_runtime_get()
Cause the power domain of lpcg clock always be enabled.
which impact the power consumption.
So we can't bind clock with regmap, then explicitly enable
clock when using. As we already enable all clock in
pm_runtime_resume, so only need to enable clock in probe.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
The call flow:
devm_regmap_init_mmio_clk
- clk_prepare()
- clk_pm_runtime_get()
Cause the power domain of lpcg clock always be enabled.
which impact the power consumption.
So we can't bind clock with regmap, then explicitly enable
clock when using. As we already enable all clock in
pm_runtime_resume, so only need to enable clock in probe.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
The call flow:
devm_regmap_init_mmio_clk
- clk_prepare()
- clk_pm_runtime_get()
Cause the power domain of lpcg clock always be enabled.
which impact the power consumption.
So we can't bind clock with regmap, then explicitly enable
clock when using. As we already enable all clock in
pm_runtime_resume, so only need to enable clock in probe.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
The attached multi power domain is enabled by device_link_add
So we need to disable them in probe, otherwise it may impact
the power consumption.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
This reverts commit bd7b26036e.
The power domain of clock should be controlled by clock driver,
We don't need to control it in audio driver, so we don't
need to support multi power domain in audio driver.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
This reverts commit 442ad6fd0c.
The power domain of clock should be controlled by clock driver,
We don't need to control it in audio driver, so we don't
need to support multi power domain in audio driver.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
This reverts commit 4058ef0bb8.
The power domain of clock should be controlled by clock driver,
We don't need to control it in audio driver, so we don't
need to support multi power domain in audio driver.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
This reverts commit 53915e7ea9.
The power domain of clock should be controlled by clock driver,
We don't need to control it in audio driver, so we don't
need to support multi power domain in audio driver.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
In imx8dxl-evk, some of wm8960s only support capture function,
So we support capture_only and playback_only in driver
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Move the golbal variables to structure, so all variables
are private for each instance.
replace the DRIVER_ATTR with DEVICE_ATTR to support
multi instance.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
1. Add check pm runtime state to decide send suspend msg to dsp when
call fsl_dsp_suspend.
2. Set proxy->dsp_mu_init be zero in fsl_dsp_suspend for imx.mp.
Signed-off-by: Zhang Peng <peng_zhang_8@nxp.com>
With 128 taps of resampling filter, there is performance issue
for high sample rate and mulitchannel. For example, there is
noise issue for converting 48kHz to 768kHz, channel number
is larger than 5 channels, and p2p case.
So in order to increase performance, we reduce the taps number
to 32 in default, the quality is relatively downgraded.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
TX CS control is needed for SPDIF/eARC TX function,
so add it. Aside of this separate TX controls from
RX controls so that controls can be added as function
of RX/TX flags of "fsl,xcvr-mode" DTS variable.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
The only supported XCVR format is IEC958_SUBFRAME_LE, so use it
for both RX and TX.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
The chan_name is missed, otherwise:
[ 68.051062] of_dma_request_slave_channel: not enough information provided
[ 68.058700] fsl-esai-dai 59010000.esai: ASoC: can't open component 59010000.esai: -6
Fixes: 6ee6ebd6efae ("LF-601-1: ASoC: fsl_esai: Switch to imx-pcm-dma-v2")
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
With EDMA, there is two dma channels can be used for p2p,
one is from ASRC, one is from another peripheral (ESAI or SAI)
previously we select the dma channel of ASRC, but find an issue
for ideal ratio case, there is no control for data copy
speed, the speed is faster than expected.
So we switch to dma channel of peripheral (ESAI or SAI), that
copy speed of DMA is controlled by data consumption speed
in the peripheral FIFO.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Viorel Suman <viorel.suman@nxp.com>
With the imx-pcm-dma, the dma channel will be allocated in probe,
with EDMA, the channel allocation is fixed for each peripheral.
In ASRC->ESAI->CODEC case, we have two sound card device, hw:x,0
and hw:x,1, with imx-pcm-dma, the channel for esai will be ocuppied
by hw:x,0 in boot up. when asrc platform driver want to request
the dma channnel for esai, it will fail.
So we switch to imx-pcm-dma-v2, with imx-pcm-dma-v2, the dma
channel is allocated when running, not in probe.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Viorel Suman <viorel.suman@nxp.com>
With the help of dai-index we figure out the correct name for a DAI.
In topology files DAI name is formed by concatenating DAI type ("sai",
"esai", etc) with DAI index.
So, this patch removes hardcoded DAI names esai0, sai1 and figures out
the names based on DAI type/index.
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
commit d152088978 upstream.
If the imx-sdma driver is built as a module, the fsl-sai device doesn't
disable on probing failure, which causes the warning in the next probing:
==================================================================
fsl-sai 308a0000.sai: Unbalanced pm_runtime_enable!
fsl-sai 308a0000.sai: Unbalanced pm_runtime_enable!
fsl-sai 308a0000.sai: Unbalanced pm_runtime_enable!
fsl-sai 308a0000.sai: Unbalanced pm_runtime_enable!
fsl-sai 308a0000.sai: Unbalanced pm_runtime_enable!
fsl-sai 308a0000.sai: Unbalanced pm_runtime_enable!
==================================================================
Disabling the device properly fixes the issue.
Fixes: 812ad463e0 ("ASoC: fsl_sai: Add support for runtime pm")
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Link: https://lore.kernel.org/r/20200205160436.3813642-1-oleksandr.suvorov@toradex.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
The hack was added to allow XCVR to record data at high FS rate,
remove it since it impacts other drivers such as MICFIL.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
The patch implements Audio XCVR CPU DAI driver for NXP iMX8 SOCs.
Audio XCVR is a on-chip functional module and implements
HDMI 2.1 spec eARC, ARC and SPDIF modes.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
The driver will switch to normal mode for 1 channel, so the slot width
is not fixed to 32 bit in this mode, and even in mono mode, the slot
number is 2.
But if the bit clock calulation still use the bit width=32, and slot
number=1, then it cause the output frameclock is not correct. So there
will be noise in output sound.
This patch is to change the bit clock formula of mono mode to be
2channels * params_width * sample rate.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Viorel Suman <viorel.suman@nxp.com>
This is needed by DSP driver on i.MX8MP. Need to find an elegant
way to only select it on this board.
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
1. Introduce new board type and compatible string in preparation for
i.MX8MP board.
2. Add support configure and start DSP for i.MX8MP.
3. Add clocks for i.MX8MP, and do special process when suspend and
resume because dsp haven't independent power.
4. Add special handle for i.MX8MP, because in imx8mp there is audiomix
power domains, and only one power domain.
Signed-off-by: Zhang Peng <peng_zhang_8@nxp.com>
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
1. Factor out SCU configuration from fsl_dsp_probe because
i.MX8 MP which doesn't have an SCU.
2. Factor out DSP start function operation in a separate function
in preparation for adding support for i.MX8MP.
Signed-off-by: Zhang Peng <peng_zhang_8@nxp.com>
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
This is a subdevice of audiomix MFD device, exposing
access to DSP control register from AudioMIX subsystem.
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
The AUD2HTX is a digital module that provides a bridge between
the Audio Subsystem and the HDMI RTX Subsystem. This module
includes intermediate storage to queue SDMA transactions prior
to being synchronized and passed to the HDMI RTX Subsystem over
the Audio Link.
The AUD2HTX contains a DMA request routed to the SDMA module.
This DMA request is controlled based on the watermark level in
the 32-entry sample buffer.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Viorel Suman <viorel.suman@nxp.com>
[ Upstream commit 77fffa7422 ]
The driver forgets to call pm_runtime_disable in probe failure
and remove.
Add the missed calls to fix it.
Signed-off-by: Chuhong Yuan <hslester96@gmail.com>
Acked-by: Nicolin Chen <nicoleotsuka@gmail.com>
Link: https://lore.kernel.org/r/20191203111303.12933-1-hslester96@gmail.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
In imx8mp there is audiomix power domains, and only
one power domain, that we don't need to call
dev_pm_domain_attach_by_id, which should return the EEXIST.
And we need to enable the MCLK output even it is in slave
mode.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
The new features are:
1. The output is 24 more significative bits in 32bit slot
2. The fifo depth is 32 entries.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Request dma channel from specific dma controller instead of generic dma
controller list, otherwise, may get the wrong dma controller if there are
multi dma controllers such as i.mx8mp.
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
commit 35dac62747 upstream.
xrun may happen at the end of stream, the
trigger->fsl_esai_trigger_stop maybe called in the middle of
fsl_esai_hw_reset, this may cause esai in wrong state
after stop, and there may be endless xrun interrupt.
This issue may also happen with trigger->fsl_esai_trigger_start.
So Add spin lock to lock those functions.
Fixes: 7ccafa2b38 ("ASoC: fsl_esai: recover the channel swap after xrun")
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Acked-by: Nicolin Chen <nicoleotsuka@gmail.com>
Link: https://lore.kernel.org/r/52e92c4221a83e39a84a6cd92fc3d5479b44894c.1572252321.git.shengjiu.wang@nxp.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
In order to support the odd channels for ASRC case, we
force to enable TDM mode. In non-tdm case, we enable
multi lane to support multi channels, but limitation
is odd multi channels can't be supported.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
In imx8mn, M7 image has poor quality for 8kHz ~ 22kHz sample rate
case, but M7 side don't want to fix this issue in their image, so
we remove these sample rate in supported list.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
commit fe965096c9 upstream.
Audmix support two substream, When two substream start
to run, the trigger function may be called by two substream
in same time, that the priv->tdms may be updated wrongly.
The expected priv->tdms is 0x3, but sometimes the
result is 0x2, or 0x1.
Fixes: be1df61cf0 ("ASoC: fsl: Add Audio Mixer CPU DAI driver")
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Acked-by: Nicolin Chen <nicoleotsuka@gmail.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
Link: https://lore.kernel.org/r/1e706afe53fdd1fbbbc79277c48a98f8416ba873.1573458378.git.shengjiu.wang@nxp.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Cc: <stable@vger.kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
As we enabled WQ_FREEZABLE for workqueue, flush_workqueue in suspend
stage will not success, for the workqueue is freezed.
flush_workqueue in suspend is a wrong operation with WQ_FREEZABLE,
so remove it.
Fixes: 5b07f684deb1 ("LF-215: ASoC: fsl_rpmsg_i2s: Enable WQ_FREEZABLE for workqueue")
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
SAI software reset is done in runtime resume,
there is no need to do it in fsl_sai_dai_probe.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
On recent kernels clks which are marked with CLK_SET_RATE_GATE are
"protected" against further changes at clk_prepare time, including clk
set_parent and set_rate. See commit 9461f7b33d ("clk: fix
CLK_SET_RATE_GATE with clock rate protection"). The current fsl_sai
implementation ensures the clock is not in use prior set_parent,
extend this for set_rate also by moving if (sai->mclk_streams == 0)
outside fsl_sai_set_mclk_rate(). Aside of this avoid changing rate and
parent for BUS clk.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
When build with CONFIG_SND_SOC_IMX_PCM_DMA=m, there is error:
ERROR: "snd_pcm_lib_preallocate_free" [sound/soc/fsl/imx-pcm-dma-v2.ko] undefined!
The reason is that snd_pcm_lib_preallocate_free is not declared
with EXPORT_SYMBOL.
In this patch, we use snd_dma_alloc_pages & snd_dma_free_pages to replace
the snd_pcm_lib_preallocate_pages & snd_pcm_lib_preallocate_free to fix
the build issue.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
The channel num (9 - 15) should not be supported in tdm & daisy chain
mode for there is two dataline, this channel number can't be
symmetrically distributed on two dataline (the first one is fixed to
be 8 channel)
Fixes commit 8d29874365c3 ("MLK-17817-2: ASoC: imx-ak4458: enable 16
channels in TDM mode")
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
(cherry picked from commit 0bc47b31660efd3dbbeee7e51fca6f75e7ecb69f)
This aligns DSP node description with upstream. No need
to add backward compatibility for older dtbs because
FSL DSP driver is obsolete and it will be removed in the future
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
Viorel Suman