The attached multi power domain is enabled by device_link_add
So we need to disable them in probe, otherwise it may impact
the power consumption.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
This reverts commit bd7b26036e.
The power domain of clock should be controlled by clock driver,
We don't need to control it in audio driver, so we don't
need to support multi power domain in audio driver.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
This reverts commit 442ad6fd0c.
The power domain of clock should be controlled by clock driver,
We don't need to control it in audio driver, so we don't
need to support multi power domain in audio driver.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
This reverts commit 4058ef0bb8.
The power domain of clock should be controlled by clock driver,
We don't need to control it in audio driver, so we don't
need to support multi power domain in audio driver.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
This reverts commit 53915e7ea9.
The power domain of clock should be controlled by clock driver,
We don't need to control it in audio driver, so we don't
need to support multi power domain in audio driver.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
In imx8dxl-evk, some of wm8960s only support capture function,
So we support capture_only and playback_only in driver
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Move the golbal variables to structure, so all variables
are private for each instance.
replace the DRIVER_ATTR with DEVICE_ATTR to support
multi instance.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
1. Add check pm runtime state to decide send suspend msg to dsp when
call fsl_dsp_suspend.
2. Set proxy->dsp_mu_init be zero in fsl_dsp_suspend for imx.mp.
Signed-off-by: Zhang Peng <peng_zhang_8@nxp.com>
With 128 taps of resampling filter, there is performance issue
for high sample rate and mulitchannel. For example, there is
noise issue for converting 48kHz to 768kHz, channel number
is larger than 5 channels, and p2p case.
So in order to increase performance, we reduce the taps number
to 32 in default, the quality is relatively downgraded.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
TX CS control is needed for SPDIF/eARC TX function,
so add it. Aside of this separate TX controls from
RX controls so that controls can be added as function
of RX/TX flags of "fsl,xcvr-mode" DTS variable.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
The only supported XCVR format is IEC958_SUBFRAME_LE, so use it
for both RX and TX.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
The chan_name is missed, otherwise:
[ 68.051062] of_dma_request_slave_channel: not enough information provided
[ 68.058700] fsl-esai-dai 59010000.esai: ASoC: can't open component 59010000.esai: -6
Fixes: 6ee6ebd6efae ("LF-601-1: ASoC: fsl_esai: Switch to imx-pcm-dma-v2")
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
With EDMA, there is two dma channels can be used for p2p,
one is from ASRC, one is from another peripheral (ESAI or SAI)
previously we select the dma channel of ASRC, but find an issue
for ideal ratio case, there is no control for data copy
speed, the speed is faster than expected.
So we switch to dma channel of peripheral (ESAI or SAI), that
copy speed of DMA is controlled by data consumption speed
in the peripheral FIFO.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Viorel Suman <viorel.suman@nxp.com>
With the imx-pcm-dma, the dma channel will be allocated in probe,
with EDMA, the channel allocation is fixed for each peripheral.
In ASRC->ESAI->CODEC case, we have two sound card device, hw:x,0
and hw:x,1, with imx-pcm-dma, the channel for esai will be ocuppied
by hw:x,0 in boot up. when asrc platform driver want to request
the dma channnel for esai, it will fail.
So we switch to imx-pcm-dma-v2, with imx-pcm-dma-v2, the dma
channel is allocated when running, not in probe.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Viorel Suman <viorel.suman@nxp.com>
With the help of dai-index we figure out the correct name for a DAI.
In topology files DAI name is formed by concatenating DAI type ("sai",
"esai", etc) with DAI index.
So, this patch removes hardcoded DAI names esai0, sai1 and figures out
the names based on DAI type/index.
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
commit d152088978 upstream.
If the imx-sdma driver is built as a module, the fsl-sai device doesn't
disable on probing failure, which causes the warning in the next probing:
==================================================================
fsl-sai 308a0000.sai: Unbalanced pm_runtime_enable!
fsl-sai 308a0000.sai: Unbalanced pm_runtime_enable!
fsl-sai 308a0000.sai: Unbalanced pm_runtime_enable!
fsl-sai 308a0000.sai: Unbalanced pm_runtime_enable!
fsl-sai 308a0000.sai: Unbalanced pm_runtime_enable!
fsl-sai 308a0000.sai: Unbalanced pm_runtime_enable!
==================================================================
Disabling the device properly fixes the issue.
Fixes: 812ad463e0 ("ASoC: fsl_sai: Add support for runtime pm")
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Link: https://lore.kernel.org/r/20200205160436.3813642-1-oleksandr.suvorov@toradex.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
The hack was added to allow XCVR to record data at high FS rate,
remove it since it impacts other drivers such as MICFIL.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
The patch implements Audio XCVR CPU DAI driver for NXP iMX8 SOCs.
Audio XCVR is a on-chip functional module and implements
HDMI 2.1 spec eARC, ARC and SPDIF modes.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
The driver will switch to normal mode for 1 channel, so the slot width
is not fixed to 32 bit in this mode, and even in mono mode, the slot
number is 2.
But if the bit clock calulation still use the bit width=32, and slot
number=1, then it cause the output frameclock is not correct. So there
will be noise in output sound.
This patch is to change the bit clock formula of mono mode to be
2channels * params_width * sample rate.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Viorel Suman <viorel.suman@nxp.com>
This is needed by DSP driver on i.MX8MP. Need to find an elegant
way to only select it on this board.
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
1. Introduce new board type and compatible string in preparation for
i.MX8MP board.
2. Add support configure and start DSP for i.MX8MP.
3. Add clocks for i.MX8MP, and do special process when suspend and
resume because dsp haven't independent power.
4. Add special handle for i.MX8MP, because in imx8mp there is audiomix
power domains, and only one power domain.
Signed-off-by: Zhang Peng <peng_zhang_8@nxp.com>
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
1. Factor out SCU configuration from fsl_dsp_probe because
i.MX8 MP which doesn't have an SCU.
2. Factor out DSP start function operation in a separate function
in preparation for adding support for i.MX8MP.
Signed-off-by: Zhang Peng <peng_zhang_8@nxp.com>
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
This is a subdevice of audiomix MFD device, exposing
access to DSP control register from AudioMIX subsystem.
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
The AUD2HTX is a digital module that provides a bridge between
the Audio Subsystem and the HDMI RTX Subsystem. This module
includes intermediate storage to queue SDMA transactions prior
to being synchronized and passed to the HDMI RTX Subsystem over
the Audio Link.
The AUD2HTX contains a DMA request routed to the SDMA module.
This DMA request is controlled based on the watermark level in
the 32-entry sample buffer.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Viorel Suman <viorel.suman@nxp.com>
[ Upstream commit 77fffa7422 ]
The driver forgets to call pm_runtime_disable in probe failure
and remove.
Add the missed calls to fix it.
Signed-off-by: Chuhong Yuan <hslester96@gmail.com>
Acked-by: Nicolin Chen <nicoleotsuka@gmail.com>
Link: https://lore.kernel.org/r/20191203111303.12933-1-hslester96@gmail.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
In imx8mp there is audiomix power domains, and only
one power domain, that we don't need to call
dev_pm_domain_attach_by_id, which should return the EEXIST.
And we need to enable the MCLK output even it is in slave
mode.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
The new features are:
1. The output is 24 more significative bits in 32bit slot
2. The fifo depth is 32 entries.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Request dma channel from specific dma controller instead of generic dma
controller list, otherwise, may get the wrong dma controller if there are
multi dma controllers such as i.mx8mp.
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
commit 35dac62747 upstream.
xrun may happen at the end of stream, the
trigger->fsl_esai_trigger_stop maybe called in the middle of
fsl_esai_hw_reset, this may cause esai in wrong state
after stop, and there may be endless xrun interrupt.
This issue may also happen with trigger->fsl_esai_trigger_start.
So Add spin lock to lock those functions.
Fixes: 7ccafa2b38 ("ASoC: fsl_esai: recover the channel swap after xrun")
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Acked-by: Nicolin Chen <nicoleotsuka@gmail.com>
Link: https://lore.kernel.org/r/52e92c4221a83e39a84a6cd92fc3d5479b44894c.1572252321.git.shengjiu.wang@nxp.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
In order to support the odd channels for ASRC case, we
force to enable TDM mode. In non-tdm case, we enable
multi lane to support multi channels, but limitation
is odd multi channels can't be supported.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
In imx8mn, M7 image has poor quality for 8kHz ~ 22kHz sample rate
case, but M7 side don't want to fix this issue in their image, so
we remove these sample rate in supported list.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
commit fe965096c9 upstream.
Audmix support two substream, When two substream start
to run, the trigger function may be called by two substream
in same time, that the priv->tdms may be updated wrongly.
The expected priv->tdms is 0x3, but sometimes the
result is 0x2, or 0x1.
Fixes: be1df61cf0 ("ASoC: fsl: Add Audio Mixer CPU DAI driver")
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Acked-by: Nicolin Chen <nicoleotsuka@gmail.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
Link: https://lore.kernel.org/r/1e706afe53fdd1fbbbc79277c48a98f8416ba873.1573458378.git.shengjiu.wang@nxp.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Cc: <stable@vger.kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
As we enabled WQ_FREEZABLE for workqueue, flush_workqueue in suspend
stage will not success, for the workqueue is freezed.
flush_workqueue in suspend is a wrong operation with WQ_FREEZABLE,
so remove it.
Fixes: 5b07f684deb1 ("LF-215: ASoC: fsl_rpmsg_i2s: Enable WQ_FREEZABLE for workqueue")
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
SAI software reset is done in runtime resume,
there is no need to do it in fsl_sai_dai_probe.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
On recent kernels clks which are marked with CLK_SET_RATE_GATE are
"protected" against further changes at clk_prepare time, including clk
set_parent and set_rate. See commit 9461f7b33d ("clk: fix
CLK_SET_RATE_GATE with clock rate protection"). The current fsl_sai
implementation ensures the clock is not in use prior set_parent,
extend this for set_rate also by moving if (sai->mclk_streams == 0)
outside fsl_sai_set_mclk_rate(). Aside of this avoid changing rate and
parent for BUS clk.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
When build with CONFIG_SND_SOC_IMX_PCM_DMA=m, there is error:
ERROR: "snd_pcm_lib_preallocate_free" [sound/soc/fsl/imx-pcm-dma-v2.ko] undefined!
The reason is that snd_pcm_lib_preallocate_free is not declared
with EXPORT_SYMBOL.
In this patch, we use snd_dma_alloc_pages & snd_dma_free_pages to replace
the snd_pcm_lib_preallocate_pages & snd_pcm_lib_preallocate_free to fix
the build issue.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
The channel num (9 - 15) should not be supported in tdm & daisy chain
mode for there is two dataline, this channel number can't be
symmetrically distributed on two dataline (the first one is fixed to
be 8 channel)
Fixes commit 8d29874365c3 ("MLK-17817-2: ASoC: imx-ak4458: enable 16
channels in TDM mode")
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
(cherry picked from commit 0bc47b31660efd3dbbeee7e51fca6f75e7ecb69f)
This aligns DSP node description with upstream. No need
to add backward compatibility for older dtbs because
FSL DSP driver is obsolete and it will be removed in the future
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
* origin/audio/sof: (21 commits)
ASoC: SOF: Read tplg filename from board descriptor
ASoC: SOF: Update fw_filename from board description
ASoC: SOF: Allow probe to continue when we have an actual codec
ASoC: SOF: Hardcode ignore_machine
ASoC: fsl: Add generic DAI driver
...
* origin/audio/fm: (8 commits)
MLK-11429-21: ASoC: fsl: port si476x machine driver from imx_3.10.y
MLK-11305 radio-si476x: support set V4L2_CID_AUDIO_MUTE CTRL
MLK-22355: mfd: si476x: Use system_freezable_wq instead of system_wq
MLK-10055-2: mfd: si476x-i2c: sound is registered when no FM module attached
MLK-10038-1: mfd: si476x-i2c: Add support of si476x-rev4.0 board
...
* origin/audio/esai: (7 commits)
LF-276: ASoC: fsl_easi: constrain period size for edma case
ASoC: fsl_esai: Remove the tasklet
ASoC: fsl_esai: Add spin lock to protect reset, stop and start
ASoC: fsl_esai: Remove expensive print in irq handler
ASoC: fsl_esai: support multi power domain
...
There is limitaion for EDMA, which can only accept the period bytes
that can be divided by maxburst with no remainder. Otherwise EDMA
will not copy the left data in the end, and it will cause noise.
so add constraint for these chips.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
In the end of playback, when the suspend happen, there will be error
in m4 side.
RTM_SaiSdmaAdapter_SetParam: Tx in wrong state 2!
SRTM_SaiSdmaAdapter_SetBuf: Tx in wrong state 2!
SRTM_SaiSdmaAdapter_Start: Tx in wrong state 2!
The reason is that the I2S_TX_TERMINATE happen in the middle of
I2S_TX_SUSPEND and I2S_TX_RESUME, this sequence is not allowed.
So we make the rpmsg message workqueue enter freeze in suspend
to avoid such issue. that the command sequence will be
I2S_TX_SUSPEND->I2S_TX_RESUME->I2S_TX_TERMINATE
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
On i.MX8 platforms that have a DSP the DAI handling is taken care
of by two entities:
* Application Processor (AP), which runs Linux
* DSP, which runs a firmware (typically Sound Open Firmware)
The DSP has access to DAI IP registers, but it cannot easily handle
resources like:
* clock
* power domain management
* pinctrl.
For this reason we introduce a generic FSL DAI driver which will take
care of the resources above.
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
This reverts commit 9aca4d89de.
Reverting this because the patch suffered a lot of changes and
I don't want to do a first push. This should be squasehd
with 9aca4d89de.
On i.MX8 platforms that have a DSP the DAI handling is taken care
of by two entities:
* Application Processor (AP), which runs Linux
* DSP, which runs a firmware (typically Sound Open Firmware)
The DSP has access to DAI IP registers, but it cannot easily handle
resources like:
* clock
* power domain management
* pinctrl.
For this reason we introduce a generic FSL DAI driver which will take
care of the resources above.
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
cherry-pick below patch from imx_3.14.y
ENGR00330403-3: ASoC: fsl: port si476x machine driver from imx_3.10.y
Port si476x machine dirver for i.MX series SoC and binding doc from imx_3.10.y
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
With dual fifo enabled, the case recording mono sound
in the background, playback sound twice in parallal,
the second time playback sound may distort, the possible
reason is using dual fifo to playback mono sound is not
recommended.
This patch is to provide a option to use multi fifo script,
which can be dynamically configured as one fifo or two fifo
mode.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
(cherry picked from commit 9d71068cf7d1fc1ec36e5fb34a321c1bdbaad324)
On recent kernels clks which are marked with CLK_SET_RATE_GATE are
"protected" against further changes at clk_prepare time, including clk
reparent. Wrap clk set_parent and set_rate operations with
disable_unprepare and prepare_enable.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Allow PLL switch for playback stream only and remove
PLL switch guard with regard to capture stream as the
clock for capture stream is provided externally.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
(cherry picked from commit c8213da5fbcd370acb4d764bef5df5981a517c11)
Set SPDIF master clock frequency as function of rate.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
(cherry picked from commit 407430a03994e4acff508afe8c9772680558c1c5)
iMX8 platforms typically have 2 AUDIO PLLs being configured to handle
8k and 11k audio rates. The patch implements the functionality to
select at runtime the appropriate AUDIO PLL as function of audio
file rate.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
(cherry picked from commit 3a29374cfbe0bfaf1785fa66163ffd3b9e30aca3)
Use txclk array to keep all 7 TxClk sources instead of keeping clocks per
rate - need to do this in order to avoid multiple prepare_enable /
disable_unprepare of the same clock during suspend/resume.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
(cherry picked from commit 61bc5c83af0713a09b520486051a2efcbe852763)
Since i.MX8 MQ SPDIF interface is able to capture raw data.
Add support in SPDIF driver for this functionality.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
(cherry picked from commit e13a302391f56a6bb547ff89e3fac73941cee429)
specify the spdif in imx8mm for the ipg clock is higher that
it can support 192kHz
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Viorel Suman <viorel.suman@nxp.com>
The ipg clock is higher enough to support 192kHz in imx8
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Viorel Suman <viorel.suman@nxp.com>
Base on latest power management design in MLK-17074, every driver
need to enter runtime suspend state in suspend, so the driver should
call the pm_runtime_force_suspend in suspend. with this implementation
the suspend function almost same as runtime suspend function. so remove
the suspend function, just use pm_runtime_force_suspend instead.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
In imx8 when systerm enter suspend state, the power of subsystem will be
off, the clock enable state will be lost after resume, but the runtime
resume function will be called after resume by pm, so need to move clock
enablement to runtime resume and clock disablement to runtime suspend.
Then after resume the clock enable state can be recovered.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
In imx8qm/imx8qxp, the power domain of IP is enabled when
pm_runtime_get_sync() is called, and disabled when pm_runtime
_put_sync() is called. when power domain is disabled, the value
of registers will lost, so we need to use the regcache_sync()
to restore the registers in fsl_spdif_runtime_resume.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
Introduce a SoC data struct which contains the differences between
the different SoCs this driver supports. This makes it easy to support
more differences without having to introduce a new switch/case each
time.
And in imx8qm, the spdif has two interrupt numbers and the burst size
should be 2 for EDMA limitation to support dual FIFO.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
Validity bit is set in default, which means the data is not reliable,
The receive device may drop this data. So clear it in default, and
provide a mixer interface for user to control this bit.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
Add snd_soc_pm_ops in machine driver to make the trigger suspend/resume
be called in suspend/resume. Remove platform_set_drvdata for redundance,
When register card, it has been called.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
(cherry picked from commit fe21119eed18804b2bc7c47216b6f4478de0268d)
In imx6qp, there is no mega fast. After suspend, but before resume,
there will be spdif interrupt, if set cache only in suspend, then we
can't clear the interrupt, because regmap_write only write to cache.
So the system will hang for the interrupt can't be cleared.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
(cherry picked from commit 2a6a522c86d6c0fe80023c4327ca7ce4792035c8)
cherry-pick below patch from imx_3.14.y
ENGR00331799-2 ASoC: fsl_spdif: don't change the root clock rate of spdif in driver
The spdif root clock may be used by other module or defined with
CLK_SET_RATE_GATE, so we can't change the clock rate in driver.
In this patch remove the clk_set_rate and clk_round_rate to protect the
clock.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
(cherry picked from commit c77170b2c9a9737f6fd61a5ea85a43b90e8ef02b)
[ Aisheng: fix incorrectly removing u64 rate_actual ]
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
This is needed so that at resume will restore the
correct SAI registers.
Looks like the call to regcache_mark_dirty was missed when
porting commit 760bd6187413e37c8 ("MLK-15960-2: ASoC: fsl_sai: refine
the pm runtime function")
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
In file included from ../sound/soc/fsl/fsl_sai.c:15:0:
../sound/soc/fsl/fsl_sai.c: In function ‘fsl_sai_startup’:
../sound/soc/fsl/fsl_sai.c:957:51: error: ‘offset’ undeclared (first use in this function)
regmap_update_bits(sai->regmap, FSL_SAI_xCR3(tx, offset),
^
../include/linux/regmap.h:77:31: note: in definition of macro ‘regmap_update_bits’
regmap_update_bits_base(map, reg, mask, val, NULL, false, false)
^
../sound/soc/fsl/fsl_sai.h:84:37: note: in expansion of macro ‘FSL_SAI_TCR3’
#define FSL_SAI_xCR3(tx, off) (tx ? FSL_SAI_TCR3(off) : FSL_SAI_RCR3(off))
^
../sound/soc/fsl/fsl_sai.c:957:34: note: in expansion of macro ‘FSL_SAI_xCR3’
regmap_update_bits(sai->regmap, FSL_SAI_xCR3(tx, offset),
^
../sound/soc/fsl/fsl_sai.c:957:51: note: each undeclared identifier is reported only once for each function it appears in
regmap_update_bits(sai->regmap, FSL_SAI_xCR3(tx, offset),
^
../include/linux/regmap.h:77:31: note: in definition of macro ‘regmap_update_bits’
regmap_update_bits_base(map, reg, mask, val, NULL, false, false)
^
../sound/soc/fsl/fsl_sai.h:84:37: note: in expansion of macro ‘FSL_SAI_TCR3’
#define FSL_SAI_xCR3(tx, off) (tx ? FSL_SAI_TCR3(off) : FSL_SAI_RCR3(off))
^
../sound/soc/fsl/fsl_sai.c:957:34: note: in expansion of macro ‘FSL_SAI_xCR3’
regmap_update_bits(sai->regmap, FSL_SAI_xCR3(tx, offset),
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
The patch enable mapping the number of pins required to play or record
a specific number of channels to a specific dataline mask.
Three consequent elements in "fsl,dataline" and "fsl,dataline,dsd" defines a
particular mapping, for instance for: fsl,dataline = "0 0xff 0xff 2 0x11 0x11"
there are two mappings defined:
default (0 pins) "rx" and "tx" dataline masks: 0 0xff 0xff
2 pins "rx" and "tx" dataline masks: 2 0x11 0x11
In case if property is missing, then default value "0 0x1 0x1" is considered.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Both dataline_off and dataline_off_dsd fields are unsigned,
thus checking negative values make no sense. Use a signed
variable to calculate offset instead.
This fixes Coverity issue: CID1899299
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Commit 786c8bd56324 ("MLK-19734-3: dmaengine: imx-sdma: change
fifo offset of fifo_num") change the offset of fifo_off, so
the sai driver need to be updated.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
(cherry picked from commit c94ce8776e01f1f40a866d4da89603ab042dde0f)
Make fsl_get_pins_state function inline.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
(cherry picked from commit badcb97ebd8c0aae89f76e979bcc801be35c7400)
Similar to DSD512 case we need a PCM pinctrl state option to map SAI BCLK
to codec MCLK pin. Given that bitclock rate is function of slots number and
slot width - pass bclk rate as parameter value from SAI driver.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
(cherry picked from commit 826caeae32713cff7ad50de8ebc9915de975edd9)
The FSL_SAI_VERID and FSL_SAI_PARAM only available
when reg_offset is 8
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
(cherry picked from commit 0a0695672dc7ecf07a7642ff6f99f0b9d3a26b32)
Currently SAI master clock derives from an audio pll that cannot be
changed at runtime. iMX8 SoC has 2 audio plls usually configured to support
either 8000Hz (8k,16k,32k,48k,etc) or 11025Hz (11k,22k,44.1k,88.2k,etc)
ranges of rates - thus at runtime a SAI interface is able to play only one
range of rates. The patch allows dynamic SAI master clock reparenting to
the appropriate audio pll as function of the audio stream rate to be
played/recorded.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
ALSA API has a standard way to configure DAI BCLK by calling
"snd_soc_dai_set_bclk_ratio" function. So use it to set BCLK ratio
and calculate SAI BCLK frequency.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
[ Aisheng: split machine imx-pdm changes ]
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
a) Add support for new SAI (VERID, PARAM, MCTL, MDIV) registers
available in i.MX 850d (SAI v3.00) and i.MX 845s (SAI v3.01).
b) Handle SAI MCLK register as function of SAI IP version.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
For some cases (like AMIX) pinctrl may be null - this
breaks SAI functionality. Enforce pinctrl null pointer
checking prior calling any function which involves
pins state changes.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Replace DSD related code with calls to DSD helper functions.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com
Transmit data pins will output zero when slots are masked or channels
are disabled. In CHMOD TDM mode, transmit data pins are tri-stated when
slots are masked or channels are disabled. When data pins are tri-stated,
there is noise on some channels when FS clock value is high and data is
read while fsclk is transitioning from high to low.
Signed-off-by: Cosmin-Gabriel Samoila <cosmin.samoila@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
ULP B0 integrate the latest SAI IP, there is version id and
parameter id register in the beginning, so update the offset
for ULP B0
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
Set the requested clock rate in "set_sysclk" for specified clock id.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Suggested-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
Introduce FSL_SAI_CLK_BIT clock id in order to distinguish
the bit clock and master clocks in "set_sysclk" API.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Suggested-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
The register definition is not completed for SAI support
8 transmit data register and 8 receive data register.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
Because fsl_sai_dai rates doesn't have a specific set of
rate values (.rates = SNDRV_PCM_RATE_KNOT) we need to provide
rate_min and rate_max otherwise functions trying to get
supported parameters will get confused and return an error.
Fixes: 1b6f0496e013 ("MLK-17428-8: ASoC: fsl_sai: support 768KHz sample rate")
Reviewed-by: Viorel Suman <viorel.suman@nxp.com>
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
With the existing implementation the SAI pinctrl state is restored to
default after resume - this breaks DSD playback after resume.
Restore DSD pinctrl state in snd_soc_dai_driver resume callback.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Fix build warning
sound/soc/fsl/fsl_sai.c: In function ‘fsl_sai_trigger’:
sound/soc/fsl/fsl_sai.c:736:3: warning: this ‘while’ clause does not guard... [-Wmisleading-indentation]
while (tx && i < channels)
^~~~~
sound/soc/fsl/fsl_sai.c:742:4: note: ...this statement, but the latter is misleadingly indented as if it is guarded by the ‘while’
j++;
^
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
The codec always mux the LRCLK pin to DSD data line, so when
we want to support DSD, the pinmux is different. For two channel
DSD, the DSDL is mapped to TX0, but the DSDR is mapped to TX4,
there is address offset for the fifo address of TX0 and TX4, TX4's
fifo is not adjacent to TX0's.
Usually, if mapping is TX0 and TX1, that will be easy for SAI
and SDMA to handle, that SAI can use the FIFO combine mode, SDMA
can use the normal script.
so for DSD:
1. The SDMA should use the multi-fifo script, and SAI can't
use the FIFO combine mode.
2. driver should to check the dts configuration(fsl,dataline) for
which dataline is used corrently
3. maxburst is the multiply of datalines
4. each channel of DSD occupy one data lane
5. according to data lane, set TRCE bits
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Viorel Suman <viorel.suman@nxp.com>
The filter_data should be used for dma_filter_fn function,
but we used the filter_data wrongly for dma channel name.
This patch is to fix the issue.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviwed-by: Daniel Baluta <daniel.baluta@nxp.com>
[ Aisheng: split out esai and pcm changes ]
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Allow set SAI bit clock frequency trough snd_soc_dai_set_sysclk
function call on machine sound drivers.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Signed-off-by: Adrian Alonso <adrian.alonso@nxp.com>
xMR setting must be set as min(channels,slots) since
both "channels < slots" and "channels > slots" scenarios
are possible.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
When there is multi data line enabled, the xMR setting is
wrong if according to the channel number. which should
according to the slot number
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
If there is only two channels input and slots is 2, then enable one
port is enough for data transfer. so enable the TCE/RCE according to
the input channels and slots configuration.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
The patch introduces the master flag handling
as function of direction and the option to provide
the flag value from DTS.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
In imx8qm/imx8qxp, the power domain of IP is enabled when
pm_runtime_get_sync() is called, and disabled when pm_runtime
_put_sync() is called. when power domain is disabled, the value
of registers will lost, so we need to use the regcache_sync()
to restore the registers in fsl_sai_runtime_resume.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
The fifo_depth is changed to 64 in imx8qm/imx8qxp, in imx8mq, the
fifo_depth is 128. which is mentioned in their ADD.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
EDMA requires the period size to be multiple of maxburst. Otherwise the
remaining bytes are not transferred and thus noise is produced.
We can handle this issue by adding a constraint on
SNDRV_PCM_HW_PARAM_PERIOD_SIZE to be multiple of tx/rx maxburst value.
This is based on a similar patch we have for ESAI:
commit bd3f3eb2a37c
("MLK-15109-2: ASoC: fsl_esai: add constrain_period_size")
Signed-off-by: Mihai Serban <mihai.serban@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
The version of sai is upgrate in imx8mq, which add two register
in beginning, there is VERID and PARAM. the driver need to be
update
Signed-off-by: Mihai Serban <mihai.serban@nxp.com>
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
When starting a playback the initialization data used to reduce underruns
was send to the transmit data register after the DMA requests were enabled.
This patch moves the initialization phase before enabling the DMA so the
data is transmitted in correct order.
Signed-off-by: Mihai Serban <mihai.serban@nxp.com>
With current clock configuration we cannot derive bitclk for S20_3LE
format in SAI master mode. There was an attempt to fix this in commit
65e6b5f1b4a7 ("MLK-14536: ASoC: wm8960: Fix playback in CPU DAI master mode")
but this broke codec-master mode, thus the patch was partially reverted in
96f0d36e420 ("MLK-14798: arm: dts: imx6ul: Fix wm8960 codec master mode")
So, remove S20_3LE support for SAI master mode. Clients using this
feature should use codec master mode, which is the default one in the
dts anyway.
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
This reverts commit c768ed336bba ("ASoC: fsl-sai: set xCR4/xCR5/xMR for
SAI master mode")
This change was already introduced by commit 51659ca069 ("ASoC: fsl-sai:
set xCR4/xCR5/xMR for SAI master mode") from upstream.
Manually adjust the code to match the changes introduced by subsequent
commit b2936555bb38 ("MLK-13609: ASoC: fsl_sai: fix for synchronize mode")
by removing updates to FSL_SAI_TMR/FSL_SAI_RMR registers.
Signed-off-by: Mihai Serban <mihai.serban@nxp.com>
which don't request the dma channel in the probe, but request
dma channel when needed. for the dma channel of cpu dai in BE
can be reused by the FE.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
[ Aisheng: split PCM changes ]
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Set specific fmt, for i2s xtor receiver is
in slave mode and i2s xtor transmitter is in master mode.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
The SAI interface can be a clock supplier or consummer
as function of stream direction, ie when interacting
with I2S XTOR. Removed FSL_SAI_RFR define as it is now
referred as FSL_SAI_RFR0.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
SAI & ESAI interfaces may share the same interrupt with EDMA,
so that we need a flag to trigger proper shared interrupt
handling. For compatibility the same DT flag, "shared-interrupt",
is introduced as the one used in drivers/dma/fsl-edma-v3.c.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
[ Aisheng: split easi changes ]
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
TX synchronous with receiver: the RMR should not be changed and
the RCSR.RE should be set in playback.
RX synchronous with transmitter: the TMR should not be changed and
the TCSR.TE should be set in recording.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
In imx7ulp1, the sai can support two TX channel and two RX
channels, So the usage need to be updated.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
When audio stop, it will first stop dma, then stop cpu_dai.
If there is delay between dma stop and cpu dai stop, there
will be underrun error, the print will cost time, then will
cause another underrun error, it is a infinite loop.
Which will cause the cpu dai can't stop.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
For SAI master mode, when Tx(Rx) sync with Rx(Tx) clock, Rx(Tx) will
generate bclk and frame clock for Tx(Rx), we should set RCR4(TCR4),
RCR5(TCR5) and RMR(TMR) for playback(capture), or there will be sync
error sometimes.
Signed-off-by: Zidan Wang <zidan.wang@freescale.com>
Acked-by: Nicolin Chen <nicoleotsuka@gmail.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
(cherry picked from commit 51659ca069)
After playback audio with sai<->wm8960 sound card, is_slave_mode
will be set, but it will not be cleared. So playback audio with
sai<->sii902x sound card will have no voice.
Signed-off-by: Zidan Wang <zidan.wang@freescale.com>
Just one device can playback(captrue) when using the same SAI.
Signed-off-by: Zidan Wang <zidan.wang@freescale.com>
(cherry picked from commit 7981a488c4da440db21f0544b519b44636a0cabb)
Write initial words to SAI FIFO to reduce underrun error
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
(cherry picked from commit 7ba8ae883d84540fac5ed4147d124399537bc0b3)
(cherry picked from commit f4435f35aa2a97551d2c4a12ca316c354a880f85)
Shengjiu Wang